Kumar Gala | 243be8e | 2011-01-19 03:05:26 -0600 | [diff] [blame] | 1 | /* |
Prabhakar Kushwaha | 19a8dbd | 2012-04-24 20:16:49 +0000 | [diff] [blame] | 2 | * Copyright 2011-2012 Freescale Semiconductor, Inc. |
Kumar Gala | 243be8e | 2011-01-19 03:05:26 -0600 | [diff] [blame] | 3 | * |
Wolfgang Denk | 1a45966 | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 4 | * SPDX-License-Identifier: GPL-2.0+ |
Kumar Gala | 243be8e | 2011-01-19 03:05:26 -0600 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | #ifndef _ASM_MPC85xx_CONFIG_H_ |
| 8 | #define _ASM_MPC85xx_CONFIG_H_ |
| 9 | |
| 10 | /* SoC specific defines for Freescale MPC85xx (PQ3) and QorIQ processors */ |
| 11 | |
Timur Tabi | e46fedf | 2011-08-04 18:03:41 -0500 | [diff] [blame] | 12 | #ifdef CONFIG_SYS_CCSRBAR_DEFAULT |
| 13 | #error "Do not define CONFIG_SYS_CCSRBAR_DEFAULT in the board header file." |
| 14 | #endif |
| 15 | |
York Sun | 2a5fcb8 | 2012-10-28 08:12:54 +0000 | [diff] [blame] | 16 | /* |
| 17 | * This macro should be removed when we no longer care about backwards |
| 18 | * compatibility with older operating systems. |
| 19 | */ |
| 20 | #define CONFIG_PPC_SPINTABLE_COMPATIBLE |
| 21 | |
York Sun | 34e026f | 2014-03-27 17:54:47 -0700 | [diff] [blame] | 22 | #include <fsl_ddrc_version.h> |
| 23 | #define CONFIG_SYS_FSL_DDR_BE |
York Sun | 57495e4 | 2012-10-08 07:44:22 +0000 | [diff] [blame] | 24 | |
Prabhakar Kushwaha | 1b4175d | 2014-01-18 12:28:30 +0530 | [diff] [blame] | 25 | /* IP endianness */ |
| 26 | #define CONFIG_SYS_FSL_IFC_BE |
Ruchika Gupta | 028dbb8 | 2014-09-09 11:50:31 +0530 | [diff] [blame] | 27 | #define CONFIG_SYS_FSL_SEC_BE |
gaurav rana | a2e225e | 2015-02-27 09:43:49 +0530 | [diff] [blame] | 28 | #define CONFIG_SYS_FSL_SFP_BE |
gaurav rana | e04916a | 2015-02-27 09:46:17 +0530 | [diff] [blame] | 29 | #define CONFIG_SYS_FSL_SEC_MON_BE |
Prabhakar Kushwaha | 1b4175d | 2014-01-18 12:28:30 +0530 | [diff] [blame] | 30 | |
Kumar Gala | 243be8e | 2011-01-19 03:05:26 -0600 | [diff] [blame] | 31 | /* Number of TLB CAM entries we have on FSL Book-E chips */ |
| 32 | #if defined(CONFIG_E500MC) |
| 33 | #define CONFIG_SYS_NUM_TLBCAMS 64 |
| 34 | #elif defined(CONFIG_E500) |
| 35 | #define CONFIG_SYS_NUM_TLBCAMS 16 |
| 36 | #endif |
| 37 | |
| 38 | #if defined(CONFIG_MPC8536) |
| 39 | #define CONFIG_MAX_CPUS 1 |
| 40 | #define CONFIG_SYS_FSL_NUM_LAWS 12 |
Prabhakar Kushwaha | e4879af | 2012-08-15 04:12:43 +0000 | [diff] [blame] | 41 | #define CONFIG_SYS_PPC_E500_DEBUG_TLB 1 |
Kumar Gala | 243be8e | 2011-01-19 03:05:26 -0600 | [diff] [blame] | 42 | #define CONFIG_SYS_FSL_SEC_COMPAT 2 |
Timur Tabi | e46fedf | 2011-08-04 18:03:41 -0500 | [diff] [blame] | 43 | #define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000 |
York Sun | 9855b3b | 2014-05-23 13:15:00 -0700 | [diff] [blame] | 44 | #define CONFIG_SYS_FSL_ERRATUM_A004508 |
York Sun | 954a1a4 | 2013-08-20 15:09:43 -0700 | [diff] [blame] | 45 | #define CONFIG_SYS_FSL_ERRATUM_A005125 |
Kumar Gala | 243be8e | 2011-01-19 03:05:26 -0600 | [diff] [blame] | 46 | |
Wolfgang Denk | d1a24f0 | 2011-02-02 22:36:10 +0100 | [diff] [blame] | 47 | #elif defined(CONFIG_MPC8540) |
Kumar Gala | 243be8e | 2011-01-19 03:05:26 -0600 | [diff] [blame] | 48 | #define CONFIG_MAX_CPUS 1 |
| 49 | #define CONFIG_SYS_FSL_NUM_LAWS 8 |
York Sun | 5614e71 | 2013-09-30 09:22:09 -0700 | [diff] [blame] | 50 | #define CONFIG_SYS_FSL_DDRC_GEN1 |
Timur Tabi | e46fedf | 2011-08-04 18:03:41 -0500 | [diff] [blame] | 51 | #define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000 |
Kumar Gala | 243be8e | 2011-01-19 03:05:26 -0600 | [diff] [blame] | 52 | |
Wolfgang Denk | d1a24f0 | 2011-02-02 22:36:10 +0100 | [diff] [blame] | 53 | #elif defined(CONFIG_MPC8541) |
Kumar Gala | 243be8e | 2011-01-19 03:05:26 -0600 | [diff] [blame] | 54 | #define CONFIG_MAX_CPUS 1 |
| 55 | #define CONFIG_SYS_FSL_NUM_LAWS 8 |
York Sun | 5614e71 | 2013-09-30 09:22:09 -0700 | [diff] [blame] | 56 | #define CONFIG_SYS_FSL_DDRC_GEN1 |
Kumar Gala | 243be8e | 2011-01-19 03:05:26 -0600 | [diff] [blame] | 57 | #define CONFIG_SYS_FSL_SEC_COMPAT 2 |
Timur Tabi | e46fedf | 2011-08-04 18:03:41 -0500 | [diff] [blame] | 58 | #define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000 |
Kumar Gala | 243be8e | 2011-01-19 03:05:26 -0600 | [diff] [blame] | 59 | |
| 60 | #elif defined(CONFIG_MPC8544) |
| 61 | #define CONFIG_MAX_CPUS 1 |
| 62 | #define CONFIG_SYS_FSL_NUM_LAWS 10 |
York Sun | 5614e71 | 2013-09-30 09:22:09 -0700 | [diff] [blame] | 63 | #define CONFIG_SYS_FSL_DDRC_GEN2 |
Prabhakar Kushwaha | e4879af | 2012-08-15 04:12:43 +0000 | [diff] [blame] | 64 | #define CONFIG_SYS_PPC_E500_DEBUG_TLB 0 |
Kumar Gala | 243be8e | 2011-01-19 03:05:26 -0600 | [diff] [blame] | 65 | #define CONFIG_SYS_FSL_SEC_COMPAT 2 |
Timur Tabi | e46fedf | 2011-08-04 18:03:41 -0500 | [diff] [blame] | 66 | #define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000 |
York Sun | 954a1a4 | 2013-08-20 15:09:43 -0700 | [diff] [blame] | 67 | #define CONFIG_SYS_FSL_ERRATUM_A005125 |
Kumar Gala | 243be8e | 2011-01-19 03:05:26 -0600 | [diff] [blame] | 68 | |
| 69 | #elif defined(CONFIG_MPC8548) |
| 70 | #define CONFIG_MAX_CPUS 1 |
| 71 | #define CONFIG_SYS_FSL_NUM_LAWS 10 |
York Sun | 5614e71 | 2013-09-30 09:22:09 -0700 | [diff] [blame] | 72 | #define CONFIG_SYS_FSL_DDRC_GEN2 |
Prabhakar Kushwaha | e4879af | 2012-08-15 04:12:43 +0000 | [diff] [blame] | 73 | #define CONFIG_SYS_PPC_E500_DEBUG_TLB 0 |
Kumar Gala | 243be8e | 2011-01-19 03:05:26 -0600 | [diff] [blame] | 74 | #define CONFIG_SYS_FSL_SEC_COMPAT 2 |
Timur Tabi | e46fedf | 2011-08-04 18:03:41 -0500 | [diff] [blame] | 75 | #define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000 |
Kumar Gala | 5ace299 | 2011-09-16 09:54:30 -0500 | [diff] [blame] | 76 | #define CONFIG_SYS_FSL_ERRATUM_NMG_DDR120 |
Kumar Gala | 2b3a1cd | 2011-10-03 08:37:57 -0500 | [diff] [blame] | 77 | #define CONFIG_SYS_FSL_ERRATUM_NMG_LBC103 |
chenhui zhao | aada81d | 2011-10-03 08:38:50 -0500 | [diff] [blame] | 78 | #define CONFIG_SYS_FSL_ERRATUM_NMG_ETSEC129 |
Liu Gang | 7d67ed5 | 2012-03-08 00:33:14 +0000 | [diff] [blame] | 79 | #define CONFIG_SYS_FSL_SRIO_MAX_PORTS 1 |
| 80 | #define CONFIG_SYS_FSL_SRIO_OB_WIN_NUM 9 |
| 81 | #define CONFIG_SYS_FSL_SRIO_IB_WIN_NUM 5 |
| 82 | #define CONFIG_SYS_FSL_RMU |
| 83 | #define CONFIG_SYS_FSL_SRIO_MSG_UNIT_NUM 2 |
York Sun | 954a1a4 | 2013-08-20 15:09:43 -0700 | [diff] [blame] | 84 | #define CONFIG_SYS_FSL_ERRATUM_A005125 |
Chunhe Lan | 9c3f77e | 2013-08-16 15:10:37 +0800 | [diff] [blame] | 85 | #define CONFIG_SYS_FSL_ERRATUM_I2C_A004447 |
| 86 | #define CONFIG_SYS_FSL_A004447_SVR_REV 0x00 |
Kumar Gala | 243be8e | 2011-01-19 03:05:26 -0600 | [diff] [blame] | 87 | |
| 88 | #elif defined(CONFIG_MPC8555) |
| 89 | #define CONFIG_MAX_CPUS 1 |
| 90 | #define CONFIG_SYS_FSL_NUM_LAWS 8 |
York Sun | 5614e71 | 2013-09-30 09:22:09 -0700 | [diff] [blame] | 91 | #define CONFIG_SYS_FSL_DDRC_GEN1 |
Kumar Gala | 243be8e | 2011-01-19 03:05:26 -0600 | [diff] [blame] | 92 | #define CONFIG_SYS_FSL_SEC_COMPAT 2 |
Timur Tabi | e46fedf | 2011-08-04 18:03:41 -0500 | [diff] [blame] | 93 | #define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000 |
Kumar Gala | 243be8e | 2011-01-19 03:05:26 -0600 | [diff] [blame] | 94 | |
| 95 | #elif defined(CONFIG_MPC8560) |
| 96 | #define CONFIG_MAX_CPUS 1 |
| 97 | #define CONFIG_SYS_FSL_NUM_LAWS 8 |
York Sun | 5614e71 | 2013-09-30 09:22:09 -0700 | [diff] [blame] | 98 | #define CONFIG_SYS_FSL_DDRC_GEN1 |
Timur Tabi | e46fedf | 2011-08-04 18:03:41 -0500 | [diff] [blame] | 99 | #define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000 |
Kumar Gala | 243be8e | 2011-01-19 03:05:26 -0600 | [diff] [blame] | 100 | |
| 101 | #elif defined(CONFIG_MPC8568) |
| 102 | #define CONFIG_MAX_CPUS 1 |
| 103 | #define CONFIG_SYS_FSL_NUM_LAWS 10 |
York Sun | 5614e71 | 2013-09-30 09:22:09 -0700 | [diff] [blame] | 104 | #define CONFIG_SYS_FSL_DDRC_GEN2 |
Kumar Gala | 243be8e | 2011-01-19 03:05:26 -0600 | [diff] [blame] | 105 | #define CONFIG_SYS_FSL_SEC_COMPAT 2 |
Kumar Gala | fdb4dad | 2011-01-31 23:09:25 -0600 | [diff] [blame] | 106 | #define QE_MURAM_SIZE 0x10000UL |
| 107 | #define MAX_QE_RISC 2 |
| 108 | #define QE_NUM_OF_SNUM 28 |
Timur Tabi | e46fedf | 2011-08-04 18:03:41 -0500 | [diff] [blame] | 109 | #define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000 |
Liu Gang | 7d67ed5 | 2012-03-08 00:33:14 +0000 | [diff] [blame] | 110 | #define CONFIG_SYS_FSL_SRIO_MAX_PORTS 1 |
| 111 | #define CONFIG_SYS_FSL_SRIO_OB_WIN_NUM 9 |
| 112 | #define CONFIG_SYS_FSL_SRIO_IB_WIN_NUM 5 |
| 113 | #define CONFIG_SYS_FSL_RMU |
| 114 | #define CONFIG_SYS_FSL_SRIO_MSG_UNIT_NUM 2 |
Kumar Gala | 243be8e | 2011-01-19 03:05:26 -0600 | [diff] [blame] | 115 | |
| 116 | #elif defined(CONFIG_MPC8569) |
| 117 | #define CONFIG_MAX_CPUS 1 |
| 118 | #define CONFIG_SYS_FSL_NUM_LAWS 10 |
| 119 | #define CONFIG_SYS_FSL_SEC_COMPAT 2 |
Kumar Gala | fdb4dad | 2011-01-31 23:09:25 -0600 | [diff] [blame] | 120 | #define QE_MURAM_SIZE 0x20000UL |
| 121 | #define MAX_QE_RISC 4 |
| 122 | #define QE_NUM_OF_SNUM 46 |
Timur Tabi | e46fedf | 2011-08-04 18:03:41 -0500 | [diff] [blame] | 123 | #define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000 |
Liu Gang | 7d67ed5 | 2012-03-08 00:33:14 +0000 | [diff] [blame] | 124 | #define CONFIG_SYS_FSL_SRIO_MAX_PORTS 1 |
| 125 | #define CONFIG_SYS_FSL_SRIO_OB_WIN_NUM 9 |
| 126 | #define CONFIG_SYS_FSL_SRIO_IB_WIN_NUM 5 |
| 127 | #define CONFIG_SYS_FSL_RMU |
| 128 | #define CONFIG_SYS_FSL_SRIO_MSG_UNIT_NUM 2 |
York Sun | 9855b3b | 2014-05-23 13:15:00 -0700 | [diff] [blame] | 129 | #define CONFIG_SYS_FSL_ERRATUM_A004508 |
York Sun | 954a1a4 | 2013-08-20 15:09:43 -0700 | [diff] [blame] | 130 | #define CONFIG_SYS_FSL_ERRATUM_A005125 |
Kumar Gala | 243be8e | 2011-01-19 03:05:26 -0600 | [diff] [blame] | 131 | |
| 132 | #elif defined(CONFIG_MPC8572) |
| 133 | #define CONFIG_MAX_CPUS 2 |
| 134 | #define CONFIG_SYS_FSL_NUM_LAWS 12 |
Prabhakar Kushwaha | e4879af | 2012-08-15 04:12:43 +0000 | [diff] [blame] | 135 | #define CONFIG_SYS_PPC_E500_DEBUG_TLB 2 |
Kumar Gala | 243be8e | 2011-01-19 03:05:26 -0600 | [diff] [blame] | 136 | #define CONFIG_SYS_FSL_SEC_COMPAT 2 |
Timur Tabi | e46fedf | 2011-08-04 18:03:41 -0500 | [diff] [blame] | 137 | #define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000 |
York Sun | eb0aff7 | 2011-01-25 21:51:27 -0800 | [diff] [blame] | 138 | #define CONFIG_SYS_FSL_ERRATUM_DDR_115 |
York Sun | 9167191 | 2011-01-25 22:05:49 -0800 | [diff] [blame] | 139 | #define CONFIG_SYS_FSL_ERRATUM_DDR111_DDR134 |
York Sun | 9855b3b | 2014-05-23 13:15:00 -0700 | [diff] [blame] | 140 | #define CONFIG_SYS_FSL_ERRATUM_A004508 |
York Sun | 954a1a4 | 2013-08-20 15:09:43 -0700 | [diff] [blame] | 141 | #define CONFIG_SYS_FSL_ERRATUM_A005125 |
Kumar Gala | 243be8e | 2011-01-19 03:05:26 -0600 | [diff] [blame] | 142 | |
| 143 | #elif defined(CONFIG_P1010) |
| 144 | #define CONFIG_MAX_CPUS 1 |
Priyanka Jain | 32c8cfb | 2011-02-09 09:24:10 +0530 | [diff] [blame] | 145 | #define CONFIG_FSL_SDHC_V2_3 |
Kumar Gala | 243be8e | 2011-01-19 03:05:26 -0600 | [diff] [blame] | 146 | #define CONFIG_SYS_FSL_NUM_LAWS 12 |
Prabhakar Kushwaha | ad75d44 | 2012-04-29 23:57:12 +0000 | [diff] [blame] | 147 | #define CONFIG_SYS_PPC_E500_DEBUG_TLB 3 |
Kumar Gala | 243be8e | 2011-01-19 03:05:26 -0600 | [diff] [blame] | 148 | #define CONFIG_TSECV2 |
| 149 | #define CONFIG_SYS_FSL_SEC_COMPAT 4 |
Poonam Aggrwal | 1fbf348 | 2011-02-06 11:31:44 +0530 | [diff] [blame] | 150 | #define CONFIG_SYS_FSL_ERRATUM_ESDHC111 |
| 151 | #define CONFIG_NUM_DDR_CONTROLLERS 1 |
ramneek mehresh | f1810d8 | 2013-10-18 17:40:17 +0530 | [diff] [blame] | 152 | #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 |
Mingkai Hu | 362ee04 | 2013-05-16 10:18:13 +0800 | [diff] [blame] | 153 | #define CONFIG_SYS_FSL_IFC_BANK_COUNT 4 |
Poonam Aggrwal | 1fbf348 | 2011-02-06 11:31:44 +0530 | [diff] [blame] | 154 | #define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000 |
Kumar Gala | 8f29084 | 2011-05-20 00:39:21 -0500 | [diff] [blame] | 155 | #define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v2.2" |
Ramneek Mehresh | 1b719e6 | 2011-03-23 15:20:43 +0530 | [diff] [blame] | 156 | #define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY |
Poonam Aggrwal | 42aee64 | 2011-06-30 03:00:28 -0500 | [diff] [blame] | 157 | #define CONFIG_SYS_FSL_ERRATUM_IFC_A002769 |
Poonam Aggrwal | fb855f4 | 2011-06-29 16:32:52 +0530 | [diff] [blame] | 158 | #define CONFIG_SYS_FSL_ERRATUM_P1010_A003549 |
Shengzhou Liu | 424bf94 | 2013-08-15 09:31:47 +0800 | [diff] [blame] | 159 | #define CONFIG_SYS_FSL_ERRATUM_SEC_A003571 |
Poonam Aggrwal | bc6bbd6 | 2011-07-07 20:36:47 +0530 | [diff] [blame] | 160 | #define CONFIG_SYS_FSL_ERRATUM_IFC_A003399 |
York Sun | 954a1a4 | 2013-08-20 15:09:43 -0700 | [diff] [blame] | 161 | #define CONFIG_SYS_FSL_ERRATUM_A005125 |
Chunhe Lan | 9c3f77e | 2013-08-16 15:10:37 +0800 | [diff] [blame] | 162 | #define CONFIG_SYS_FSL_ERRATUM_I2C_A004447 |
York Sun | 9855b3b | 2014-05-23 13:15:00 -0700 | [diff] [blame] | 163 | #define CONFIG_SYS_FSL_ERRATUM_A004508 |
Nikhil Badola | 1185691 | 2014-02-26 17:43:15 +0530 | [diff] [blame] | 164 | #define CONFIG_SYS_FSL_ERRATUM_A007075 |
Sriram Dash | 15a6d49 | 2016-08-17 11:47:53 +0530 | [diff] [blame^] | 165 | #define CONFIG_SYS_FSL_USB1_PHY_ENABLE |
Suresh Gupta | 9c641a8 | 2014-02-26 14:29:12 +0530 | [diff] [blame] | 166 | #define CONFIG_SYS_FSL_ERRATUM_A006261 |
Nikhil Badola | 0dc78ff | 2014-11-21 17:25:21 +0530 | [diff] [blame] | 167 | #define CONFIG_SYS_FSL_ERRATUM_A004477 |
Chunhe Lan | 9c3f77e | 2013-08-16 15:10:37 +0800 | [diff] [blame] | 168 | #define CONFIG_SYS_FSL_A004447_SVR_REV 0x10 |
Haijun.Zhang | f28bea0 | 2014-01-10 13:52:19 +0800 | [diff] [blame] | 169 | #define CONFIG_ESDHC_HC_BLK_ADDR |
Kumar Gala | 243be8e | 2011-01-19 03:05:26 -0600 | [diff] [blame] | 170 | |
Kumar Gala | 093cffb | 2011-02-05 13:45:07 -0600 | [diff] [blame] | 171 | /* P1011 is single core version of P1020 */ |
Kumar Gala | 243be8e | 2011-01-19 03:05:26 -0600 | [diff] [blame] | 172 | #elif defined(CONFIG_P1011) |
| 173 | #define CONFIG_MAX_CPUS 1 |
| 174 | #define CONFIG_SYS_FSL_NUM_LAWS 12 |
Prabhakar Kushwaha | ad75d44 | 2012-04-29 23:57:12 +0000 | [diff] [blame] | 175 | #define CONFIG_SYS_PPC_E500_DEBUG_TLB 2 |
Kumar Gala | 243be8e | 2011-01-19 03:05:26 -0600 | [diff] [blame] | 176 | #define CONFIG_TSECV2 |
Prabhakar Kushwaha | b03a466 | 2011-02-01 15:55:58 +0000 | [diff] [blame] | 177 | #define CONFIG_FSL_PCIE_DISABLE_ASPM |
Kumar Gala | 243be8e | 2011-01-19 03:05:26 -0600 | [diff] [blame] | 178 | #define CONFIG_SYS_FSL_SEC_COMPAT 2 |
ramneek mehresh | f1810d8 | 2013-10-18 17:40:17 +0530 | [diff] [blame] | 179 | #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 |
Timur Tabi | e46fedf | 2011-08-04 18:03:41 -0500 | [diff] [blame] | 180 | #define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000 |
Kumar Gala | 093cffb | 2011-02-05 13:45:07 -0600 | [diff] [blame] | 181 | #define CONFIG_SYS_FSL_ERRATUM_ELBC_A001 |
| 182 | #define CONFIG_SYS_FSL_ERRATUM_ESDHC111 |
York Sun | 9855b3b | 2014-05-23 13:15:00 -0700 | [diff] [blame] | 183 | #define CONFIG_SYS_FSL_ERRATUM_A004508 |
York Sun | 954a1a4 | 2013-08-20 15:09:43 -0700 | [diff] [blame] | 184 | #define CONFIG_SYS_FSL_ERRATUM_A005125 |
Kumar Gala | 243be8e | 2011-01-19 03:05:26 -0600 | [diff] [blame] | 185 | |
Kumar Gala | 093cffb | 2011-02-05 13:45:07 -0600 | [diff] [blame] | 186 | /* P1012 is single core version of P1021 */ |
Kumar Gala | 243be8e | 2011-01-19 03:05:26 -0600 | [diff] [blame] | 187 | #elif defined(CONFIG_P1012) |
| 188 | #define CONFIG_MAX_CPUS 1 |
| 189 | #define CONFIG_SYS_FSL_NUM_LAWS 12 |
ramneek mehresh | f1810d8 | 2013-10-18 17:40:17 +0530 | [diff] [blame] | 190 | #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 |
Prabhakar Kushwaha | ad75d44 | 2012-04-29 23:57:12 +0000 | [diff] [blame] | 191 | #define CONFIG_SYS_PPC_E500_DEBUG_TLB 2 |
Kumar Gala | 243be8e | 2011-01-19 03:05:26 -0600 | [diff] [blame] | 192 | #define CONFIG_TSECV2 |
Prabhakar Kushwaha | b03a466 | 2011-02-01 15:55:58 +0000 | [diff] [blame] | 193 | #define CONFIG_FSL_PCIE_DISABLE_ASPM |
Kumar Gala | 243be8e | 2011-01-19 03:05:26 -0600 | [diff] [blame] | 194 | #define CONFIG_SYS_FSL_SEC_COMPAT 2 |
Timur Tabi | e46fedf | 2011-08-04 18:03:41 -0500 | [diff] [blame] | 195 | #define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000 |
Kumar Gala | 093cffb | 2011-02-05 13:45:07 -0600 | [diff] [blame] | 196 | #define CONFIG_SYS_FSL_ERRATUM_ELBC_A001 |
| 197 | #define CONFIG_SYS_FSL_ERRATUM_ESDHC111 |
Haiying Wang | a52d2f8 | 2011-02-11 01:25:30 -0600 | [diff] [blame] | 198 | #define QE_MURAM_SIZE 0x6000UL |
| 199 | #define MAX_QE_RISC 1 |
| 200 | #define QE_NUM_OF_SNUM 28 |
York Sun | 9855b3b | 2014-05-23 13:15:00 -0700 | [diff] [blame] | 201 | #define CONFIG_SYS_FSL_ERRATUM_A004508 |
York Sun | 954a1a4 | 2013-08-20 15:09:43 -0700 | [diff] [blame] | 202 | #define CONFIG_SYS_FSL_ERRATUM_A005125 |
Kumar Gala | 243be8e | 2011-01-19 03:05:26 -0600 | [diff] [blame] | 203 | |
Kumar Gala | 093cffb | 2011-02-05 13:45:07 -0600 | [diff] [blame] | 204 | /* P1013 is single core version of P1022 */ |
Kumar Gala | 243be8e | 2011-01-19 03:05:26 -0600 | [diff] [blame] | 205 | #elif defined(CONFIG_P1013) |
| 206 | #define CONFIG_MAX_CPUS 1 |
| 207 | #define CONFIG_SYS_FSL_NUM_LAWS 12 |
Ying Zhang | 703f568 | 2015-01-30 14:52:11 +0800 | [diff] [blame] | 208 | #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 |
Prabhakar Kushwaha | ad75d44 | 2012-04-29 23:57:12 +0000 | [diff] [blame] | 209 | #define CONFIG_SYS_PPC_E500_DEBUG_TLB 2 |
Kumar Gala | 243be8e | 2011-01-19 03:05:26 -0600 | [diff] [blame] | 210 | #define CONFIG_TSECV2 |
| 211 | #define CONFIG_SYS_FSL_SEC_COMPAT 2 |
Timur Tabi | e46fedf | 2011-08-04 18:03:41 -0500 | [diff] [blame] | 212 | #define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000 |
Jiang Yutang | 2d7534a | 2011-01-30 17:06:20 -0600 | [diff] [blame] | 213 | #define CONFIG_SYS_FSL_ERRATUM_ELBC_A001 |
| 214 | #define CONFIG_SYS_FSL_ERRATUM_ESDHC111 |
| 215 | #define CONFIG_FSL_SATA_ERRATUM_A001 |
York Sun | 9855b3b | 2014-05-23 13:15:00 -0700 | [diff] [blame] | 216 | #define CONFIG_SYS_FSL_ERRATUM_A004508 |
York Sun | 954a1a4 | 2013-08-20 15:09:43 -0700 | [diff] [blame] | 217 | #define CONFIG_SYS_FSL_ERRATUM_A005125 |
Kumar Gala | 243be8e | 2011-01-19 03:05:26 -0600 | [diff] [blame] | 218 | |
| 219 | #elif defined(CONFIG_P1014) |
| 220 | #define CONFIG_MAX_CPUS 1 |
Priyanka Jain | 32c8cfb | 2011-02-09 09:24:10 +0530 | [diff] [blame] | 221 | #define CONFIG_FSL_SDHC_V2_3 |
Kumar Gala | 243be8e | 2011-01-19 03:05:26 -0600 | [diff] [blame] | 222 | #define CONFIG_SYS_FSL_NUM_LAWS 12 |
Prabhakar Kushwaha | ad75d44 | 2012-04-29 23:57:12 +0000 | [diff] [blame] | 223 | #define CONFIG_SYS_PPC_E500_DEBUG_TLB 3 |
Kumar Gala | 243be8e | 2011-01-19 03:05:26 -0600 | [diff] [blame] | 224 | #define CONFIG_TSECV2 |
| 225 | #define CONFIG_SYS_FSL_SEC_COMPAT 4 |
Poonam Aggrwal | 1fbf348 | 2011-02-06 11:31:44 +0530 | [diff] [blame] | 226 | #define CONFIG_SYS_FSL_ERRATUM_ESDHC111 |
| 227 | #define CONFIG_NUM_DDR_CONTROLLERS 1 |
ramneek mehresh | f1810d8 | 2013-10-18 17:40:17 +0530 | [diff] [blame] | 228 | #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 |
Poonam Aggrwal | 1fbf348 | 2011-02-06 11:31:44 +0530 | [diff] [blame] | 229 | #define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000 |
Ramneek Mehresh | 1b719e6 | 2011-03-23 15:20:43 +0530 | [diff] [blame] | 230 | #define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY |
Poonam Aggrwal | 42aee64 | 2011-06-30 03:00:28 -0500 | [diff] [blame] | 231 | #define CONFIG_SYS_FSL_ERRATUM_IFC_A002769 |
Poonam Aggrwal | fb855f4 | 2011-06-29 16:32:52 +0530 | [diff] [blame] | 232 | #define CONFIG_SYS_FSL_ERRATUM_P1010_A003549 |
Poonam Aggrwal | bc6bbd6 | 2011-07-07 20:36:47 +0530 | [diff] [blame] | 233 | #define CONFIG_SYS_FSL_ERRATUM_IFC_A003399 |
York Sun | 9855b3b | 2014-05-23 13:15:00 -0700 | [diff] [blame] | 234 | #define CONFIG_SYS_FSL_ERRATUM_A004508 |
Kumar Gala | 243be8e | 2011-01-19 03:05:26 -0600 | [diff] [blame] | 235 | |
Kumar Gala | 093cffb | 2011-02-05 13:45:07 -0600 | [diff] [blame] | 236 | /* P1017 is single core version of P1023 */ |
Roy Zang | 67a719d | 2011-02-03 22:14:19 -0600 | [diff] [blame] | 237 | #elif defined(CONFIG_P1017) |
| 238 | #define CONFIG_MAX_CPUS 1 |
| 239 | #define CONFIG_SYS_FSL_NUM_LAWS 12 |
| 240 | #define CONFIG_SYS_FSL_SEC_COMPAT 4 |
| 241 | #define CONFIG_SYS_NUM_FMAN 1 |
| 242 | #define CONFIG_SYS_NUM_FM1_DTSEC 2 |
| 243 | #define CONFIG_NUM_DDR_CONTROLLERS 1 |
ramneek mehresh | f1810d8 | 2013-10-18 17:40:17 +0530 | [diff] [blame] | 244 | #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 |
Roy Zang | 67a719d | 2011-02-03 22:14:19 -0600 | [diff] [blame] | 245 | #define CONFIG_SYS_QMAN_NUM_PORTALS 3 |
| 246 | #define CONFIG_SYS_BMAN_NUM_PORTALS 3 |
Kumar Gala | c657d89 | 2011-02-04 00:43:34 -0600 | [diff] [blame] | 247 | #define CONFIG_SYS_FM_MURAM_SIZE 0x10000 |
Kumar Gala | 8f29084 | 2011-05-20 00:39:21 -0500 | [diff] [blame] | 248 | #define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v2.2" |
Timur Tabi | e46fedf | 2011-08-04 18:03:41 -0500 | [diff] [blame] | 249 | #define CONFIG_SYS_CCSRBAR_DEFAULT 0xff600000 |
York Sun | 9855b3b | 2014-05-23 13:15:00 -0700 | [diff] [blame] | 250 | #define CONFIG_SYS_FSL_ERRATUM_A004508 |
York Sun | 954a1a4 | 2013-08-20 15:09:43 -0700 | [diff] [blame] | 251 | #define CONFIG_SYS_FSL_ERRATUM_A005125 |
Roy Zang | 67a719d | 2011-02-03 22:14:19 -0600 | [diff] [blame] | 252 | |
Kumar Gala | 243be8e | 2011-01-19 03:05:26 -0600 | [diff] [blame] | 253 | #elif defined(CONFIG_P1020) |
| 254 | #define CONFIG_MAX_CPUS 2 |
| 255 | #define CONFIG_SYS_FSL_NUM_LAWS 12 |
Prabhakar Kushwaha | ad75d44 | 2012-04-29 23:57:12 +0000 | [diff] [blame] | 256 | #define CONFIG_SYS_PPC_E500_DEBUG_TLB 2 |
Kumar Gala | 243be8e | 2011-01-19 03:05:26 -0600 | [diff] [blame] | 257 | #define CONFIG_TSECV2 |
Prabhakar Kushwaha | b03a466 | 2011-02-01 15:55:58 +0000 | [diff] [blame] | 258 | #define CONFIG_FSL_PCIE_DISABLE_ASPM |
Kumar Gala | 243be8e | 2011-01-19 03:05:26 -0600 | [diff] [blame] | 259 | #define CONFIG_SYS_FSL_SEC_COMPAT 2 |
Timur Tabi | e46fedf | 2011-08-04 18:03:41 -0500 | [diff] [blame] | 260 | #define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000 |
Kumar Gala | 093cffb | 2011-02-05 13:45:07 -0600 | [diff] [blame] | 261 | #define CONFIG_SYS_FSL_ERRATUM_ELBC_A001 |
| 262 | #define CONFIG_SYS_FSL_ERRATUM_ESDHC111 |
York Sun | 9855b3b | 2014-05-23 13:15:00 -0700 | [diff] [blame] | 263 | #define CONFIG_SYS_FSL_ERRATUM_A004508 |
York Sun | 954a1a4 | 2013-08-20 15:09:43 -0700 | [diff] [blame] | 264 | #define CONFIG_SYS_FSL_ERRATUM_A005125 |
ramneek mehresh | 80ba6a6 | 2014-05-13 15:36:07 +0530 | [diff] [blame] | 265 | #ifndef CONFIG_USB_MAX_CONTROLLER_COUNT |
ramneek mehresh | f1810d8 | 2013-10-18 17:40:17 +0530 | [diff] [blame] | 266 | #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 |
ramneek mehresh | 80ba6a6 | 2014-05-13 15:36:07 +0530 | [diff] [blame] | 267 | #endif |
Kumar Gala | 243be8e | 2011-01-19 03:05:26 -0600 | [diff] [blame] | 268 | |
| 269 | #elif defined(CONFIG_P1021) |
| 270 | #define CONFIG_MAX_CPUS 2 |
| 271 | #define CONFIG_SYS_FSL_NUM_LAWS 12 |
Prabhakar Kushwaha | ad75d44 | 2012-04-29 23:57:12 +0000 | [diff] [blame] | 272 | #define CONFIG_SYS_PPC_E500_DEBUG_TLB 2 |
Kumar Gala | 243be8e | 2011-01-19 03:05:26 -0600 | [diff] [blame] | 273 | #define CONFIG_TSECV2 |
Prabhakar Kushwaha | b03a466 | 2011-02-01 15:55:58 +0000 | [diff] [blame] | 274 | #define CONFIG_FSL_PCIE_DISABLE_ASPM |
Kumar Gala | 243be8e | 2011-01-19 03:05:26 -0600 | [diff] [blame] | 275 | #define CONFIG_SYS_FSL_SEC_COMPAT 2 |
Timur Tabi | e46fedf | 2011-08-04 18:03:41 -0500 | [diff] [blame] | 276 | #define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000 |
Kumar Gala | 093cffb | 2011-02-05 13:45:07 -0600 | [diff] [blame] | 277 | #define CONFIG_SYS_FSL_ERRATUM_ELBC_A001 |
| 278 | #define CONFIG_SYS_FSL_ERRATUM_ESDHC111 |
Haiying Wang | a52d2f8 | 2011-02-11 01:25:30 -0600 | [diff] [blame] | 279 | #define QE_MURAM_SIZE 0x6000UL |
| 280 | #define MAX_QE_RISC 1 |
| 281 | #define QE_NUM_OF_SNUM 28 |
York Sun | 9855b3b | 2014-05-23 13:15:00 -0700 | [diff] [blame] | 282 | #define CONFIG_SYS_FSL_ERRATUM_A004508 |
York Sun | 954a1a4 | 2013-08-20 15:09:43 -0700 | [diff] [blame] | 283 | #define CONFIG_SYS_FSL_ERRATUM_A005125 |
ramneek mehresh | f1810d8 | 2013-10-18 17:40:17 +0530 | [diff] [blame] | 284 | #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 |
Kumar Gala | 243be8e | 2011-01-19 03:05:26 -0600 | [diff] [blame] | 285 | |
| 286 | #elif defined(CONFIG_P1022) |
| 287 | #define CONFIG_MAX_CPUS 2 |
| 288 | #define CONFIG_SYS_FSL_NUM_LAWS 12 |
Prabhakar Kushwaha | ad75d44 | 2012-04-29 23:57:12 +0000 | [diff] [blame] | 289 | #define CONFIG_SYS_PPC_E500_DEBUG_TLB 2 |
Kumar Gala | 243be8e | 2011-01-19 03:05:26 -0600 | [diff] [blame] | 290 | #define CONFIG_TSECV2 |
| 291 | #define CONFIG_SYS_FSL_SEC_COMPAT 2 |
Ying Zhang | 703f568 | 2015-01-30 14:52:11 +0800 | [diff] [blame] | 292 | #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 |
Timur Tabi | e46fedf | 2011-08-04 18:03:41 -0500 | [diff] [blame] | 293 | #define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000 |
Jiang Yutang | 2d7534a | 2011-01-30 17:06:20 -0600 | [diff] [blame] | 294 | #define CONFIG_SYS_FSL_ERRATUM_ELBC_A001 |
| 295 | #define CONFIG_SYS_FSL_ERRATUM_ESDHC111 |
| 296 | #define CONFIG_FSL_SATA_ERRATUM_A001 |
York Sun | 9855b3b | 2014-05-23 13:15:00 -0700 | [diff] [blame] | 297 | #define CONFIG_SYS_FSL_ERRATUM_A004508 |
York Sun | 954a1a4 | 2013-08-20 15:09:43 -0700 | [diff] [blame] | 298 | #define CONFIG_SYS_FSL_ERRATUM_A005125 |
Nikhil Badola | 0dc78ff | 2014-11-21 17:25:21 +0530 | [diff] [blame] | 299 | #define CONFIG_SYS_FSL_ERRATUM_A004477 |
Kumar Gala | 243be8e | 2011-01-19 03:05:26 -0600 | [diff] [blame] | 300 | |
Roy Zang | 67a719d | 2011-02-03 22:14:19 -0600 | [diff] [blame] | 301 | #elif defined(CONFIG_P1023) |
| 302 | #define CONFIG_MAX_CPUS 2 |
| 303 | #define CONFIG_SYS_FSL_NUM_LAWS 12 |
| 304 | #define CONFIG_SYS_FSL_SEC_COMPAT 4 |
| 305 | #define CONFIG_SYS_NUM_FMAN 1 |
| 306 | #define CONFIG_SYS_NUM_FM1_DTSEC 2 |
| 307 | #define CONFIG_NUM_DDR_CONTROLLERS 1 |
ramneek mehresh | f1810d8 | 2013-10-18 17:40:17 +0530 | [diff] [blame] | 308 | #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 |
Roy Zang | 67a719d | 2011-02-03 22:14:19 -0600 | [diff] [blame] | 309 | #define CONFIG_SYS_QMAN_NUM_PORTALS 3 |
| 310 | #define CONFIG_SYS_BMAN_NUM_PORTALS 3 |
Kumar Gala | c657d89 | 2011-02-04 00:43:34 -0600 | [diff] [blame] | 311 | #define CONFIG_SYS_FM_MURAM_SIZE 0x10000 |
Kumar Gala | 8f29084 | 2011-05-20 00:39:21 -0500 | [diff] [blame] | 312 | #define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v2.2" |
Timur Tabi | e46fedf | 2011-08-04 18:03:41 -0500 | [diff] [blame] | 313 | #define CONFIG_SYS_CCSRBAR_DEFAULT 0xff600000 |
York Sun | 9855b3b | 2014-05-23 13:15:00 -0700 | [diff] [blame] | 314 | #define CONFIG_SYS_FSL_ERRATUM_A004508 |
York Sun | 954a1a4 | 2013-08-20 15:09:43 -0700 | [diff] [blame] | 315 | #define CONFIG_SYS_FSL_ERRATUM_A005125 |
Chunhe Lan | 9c3f77e | 2013-08-16 15:10:37 +0800 | [diff] [blame] | 316 | #define CONFIG_SYS_FSL_ERRATUM_I2C_A004447 |
| 317 | #define CONFIG_SYS_FSL_A004447_SVR_REV 0x11 |
Roy Zang | 67a719d | 2011-02-03 22:14:19 -0600 | [diff] [blame] | 318 | |
Kumar Gala | 093cffb | 2011-02-05 13:45:07 -0600 | [diff] [blame] | 319 | /* P1024 is lower end variant of P1020 */ |
| 320 | #elif defined(CONFIG_P1024) |
| 321 | #define CONFIG_MAX_CPUS 2 |
| 322 | #define CONFIG_SYS_FSL_NUM_LAWS 12 |
Prabhakar Kushwaha | ad75d44 | 2012-04-29 23:57:12 +0000 | [diff] [blame] | 323 | #define CONFIG_SYS_PPC_E500_DEBUG_TLB 2 |
Kumar Gala | 093cffb | 2011-02-05 13:45:07 -0600 | [diff] [blame] | 324 | #define CONFIG_TSECV2 |
| 325 | #define CONFIG_FSL_PCIE_DISABLE_ASPM |
| 326 | #define CONFIG_SYS_FSL_SEC_COMPAT 2 |
ramneek mehresh | f1810d8 | 2013-10-18 17:40:17 +0530 | [diff] [blame] | 327 | #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 |
Timur Tabi | e46fedf | 2011-08-04 18:03:41 -0500 | [diff] [blame] | 328 | #define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000 |
Kumar Gala | 093cffb | 2011-02-05 13:45:07 -0600 | [diff] [blame] | 329 | #define CONFIG_SYS_FSL_ERRATUM_ELBC_A001 |
| 330 | #define CONFIG_SYS_FSL_ERRATUM_ESDHC111 |
York Sun | 9855b3b | 2014-05-23 13:15:00 -0700 | [diff] [blame] | 331 | #define CONFIG_SYS_FSL_ERRATUM_A004508 |
York Sun | 954a1a4 | 2013-08-20 15:09:43 -0700 | [diff] [blame] | 332 | #define CONFIG_SYS_FSL_ERRATUM_A005125 |
Kumar Gala | 093cffb | 2011-02-05 13:45:07 -0600 | [diff] [blame] | 333 | |
| 334 | /* P1025 is lower end variant of P1021 */ |
| 335 | #elif defined(CONFIG_P1025) |
| 336 | #define CONFIG_MAX_CPUS 2 |
| 337 | #define CONFIG_SYS_FSL_NUM_LAWS 12 |
Nikhil Badola | 1ff10a8 | 2015-05-21 09:07:53 +0530 | [diff] [blame] | 338 | #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 |
Prabhakar Kushwaha | ad75d44 | 2012-04-29 23:57:12 +0000 | [diff] [blame] | 339 | #define CONFIG_SYS_PPC_E500_DEBUG_TLB 2 |
Kumar Gala | 093cffb | 2011-02-05 13:45:07 -0600 | [diff] [blame] | 340 | #define CONFIG_TSECV2 |
| 341 | #define CONFIG_FSL_PCIE_DISABLE_ASPM |
| 342 | #define CONFIG_SYS_FSL_SEC_COMPAT 2 |
Timur Tabi | e46fedf | 2011-08-04 18:03:41 -0500 | [diff] [blame] | 343 | #define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000 |
Kumar Gala | 093cffb | 2011-02-05 13:45:07 -0600 | [diff] [blame] | 344 | #define CONFIG_SYS_FSL_ERRATUM_ELBC_A001 |
| 345 | #define CONFIG_SYS_FSL_ERRATUM_ESDHC111 |
Haiying Wang | a52d2f8 | 2011-02-11 01:25:30 -0600 | [diff] [blame] | 346 | #define QE_MURAM_SIZE 0x6000UL |
| 347 | #define MAX_QE_RISC 1 |
| 348 | #define QE_NUM_OF_SNUM 28 |
York Sun | 9855b3b | 2014-05-23 13:15:00 -0700 | [diff] [blame] | 349 | #define CONFIG_SYS_FSL_ERRATUM_A004508 |
York Sun | 954a1a4 | 2013-08-20 15:09:43 -0700 | [diff] [blame] | 350 | #define CONFIG_SYS_FSL_ERRATUM_A005125 |
Kumar Gala | 093cffb | 2011-02-05 13:45:07 -0600 | [diff] [blame] | 351 | |
| 352 | /* P2010 is single core version of P2020 */ |
Kumar Gala | 243be8e | 2011-01-19 03:05:26 -0600 | [diff] [blame] | 353 | #elif defined(CONFIG_P2010) |
| 354 | #define CONFIG_MAX_CPUS 1 |
| 355 | #define CONFIG_SYS_FSL_NUM_LAWS 12 |
Prabhakar Kushwaha | ad75d44 | 2012-04-29 23:57:12 +0000 | [diff] [blame] | 356 | #define CONFIG_SYS_PPC_E500_DEBUG_TLB 2 |
Kumar Gala | 243be8e | 2011-01-19 03:05:26 -0600 | [diff] [blame] | 357 | #define CONFIG_SYS_FSL_SEC_COMPAT 2 |
ramneek mehresh | f1810d8 | 2013-10-18 17:40:17 +0530 | [diff] [blame] | 358 | #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 |
Timur Tabi | e46fedf | 2011-08-04 18:03:41 -0500 | [diff] [blame] | 359 | #define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000 |
Kumar Gala | 6e7f0bc0 | 2011-01-26 01:43:15 -0600 | [diff] [blame] | 360 | #define CONFIG_SYS_FSL_ERRATUM_ESDHC111 |
Kumar Gala | 5103a03 | 2011-01-29 15:36:10 -0600 | [diff] [blame] | 361 | #define CONFIG_SYS_FSL_ERRATUM_ESDHC_A001 |
York Sun | 9855b3b | 2014-05-23 13:15:00 -0700 | [diff] [blame] | 362 | #define CONFIG_SYS_FSL_ERRATUM_A004508 |
York Sun | 954a1a4 | 2013-08-20 15:09:43 -0700 | [diff] [blame] | 363 | #define CONFIG_SYS_FSL_ERRATUM_A005125 |
Kumar Gala | 243be8e | 2011-01-19 03:05:26 -0600 | [diff] [blame] | 364 | |
| 365 | #elif defined(CONFIG_P2020) |
| 366 | #define CONFIG_MAX_CPUS 2 |
| 367 | #define CONFIG_SYS_FSL_NUM_LAWS 12 |
Prabhakar Kushwaha | ad75d44 | 2012-04-29 23:57:12 +0000 | [diff] [blame] | 368 | #define CONFIG_SYS_PPC_E500_DEBUG_TLB 2 |
Kumar Gala | 243be8e | 2011-01-19 03:05:26 -0600 | [diff] [blame] | 369 | #define CONFIG_SYS_FSL_SEC_COMPAT 2 |
Timur Tabi | e46fedf | 2011-08-04 18:03:41 -0500 | [diff] [blame] | 370 | #define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000 |
Kumar Gala | 6e7f0bc0 | 2011-01-26 01:43:15 -0600 | [diff] [blame] | 371 | #define CONFIG_SYS_FSL_ERRATUM_ESDHC111 |
Kumar Gala | 5103a03 | 2011-01-29 15:36:10 -0600 | [diff] [blame] | 372 | #define CONFIG_SYS_FSL_ERRATUM_ESDHC_A001 |
Liu Gang | 7d67ed5 | 2012-03-08 00:33:14 +0000 | [diff] [blame] | 373 | #define CONFIG_SYS_FSL_SRIO_MAX_PORTS 2 |
| 374 | #define CONFIG_SYS_FSL_SRIO_OB_WIN_NUM 9 |
| 375 | #define CONFIG_SYS_FSL_SRIO_IB_WIN_NUM 5 |
| 376 | #define CONFIG_SYS_FSL_RMU |
| 377 | #define CONFIG_SYS_FSL_SRIO_MSG_UNIT_NUM 2 |
York Sun | 9855b3b | 2014-05-23 13:15:00 -0700 | [diff] [blame] | 378 | #define CONFIG_SYS_FSL_ERRATUM_A004508 |
York Sun | 954a1a4 | 2013-08-20 15:09:43 -0700 | [diff] [blame] | 379 | #define CONFIG_SYS_FSL_ERRATUM_A005125 |
Nikhil Badola | 0dc78ff | 2014-11-21 17:25:21 +0530 | [diff] [blame] | 380 | #define CONFIG_SYS_FSL_ERRATUM_A004477 |
ramneek mehresh | f1810d8 | 2013-10-18 17:40:17 +0530 | [diff] [blame] | 381 | #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 |
York Sun | 9855b3b | 2014-05-23 13:15:00 -0700 | [diff] [blame] | 382 | |
Scott Wood | 3e978f5 | 2012-08-14 10:14:51 +0000 | [diff] [blame] | 383 | #elif defined(CONFIG_PPC_P2041) /* also supports P2040 */ |
York Sun | d1001e3 | 2012-10-08 07:44:15 +0000 | [diff] [blame] | 384 | #define CONFIG_SYS_FSL_QORIQ_CHASSIS1 |
York Sun | d2ab4bb | 2013-06-25 11:37:39 -0700 | [diff] [blame] | 385 | #define CONFIG_FSL_CORENET /* Freescale CoreNet platform */ |
Kumar Gala | 1f97987 | 2011-05-13 01:16:07 -0500 | [diff] [blame] | 386 | #define CONFIG_MAX_CPUS 4 |
| 387 | #define CONFIG_SYS_FSL_NUM_CC_PLLS 2 |
| 388 | #define CONFIG_SYS_FSL_NUM_LAWS 32 |
| 389 | #define CONFIG_SYS_FSL_SEC_COMPAT 4 |
| 390 | #define CONFIG_SYS_NUM_FMAN 1 |
| 391 | #define CONFIG_SYS_NUM_FM1_DTSEC 5 |
| 392 | #define CONFIG_SYS_NUM_FM1_10GEC 1 |
| 393 | #define CONFIG_NUM_DDR_CONTROLLERS 1 |
ramneek mehresh | f1810d8 | 2013-10-18 17:40:17 +0530 | [diff] [blame] | 394 | #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 |
Kumar Gala | 1f97987 | 2011-05-13 01:16:07 -0500 | [diff] [blame] | 395 | #define CONFIG_SYS_FM_MURAM_SIZE 0x28000 |
| 396 | #define CONFIG_SYS_FSL_TBCLK_DIV 32 |
| 397 | #define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v2.2" |
Timur Tabi | e46fedf | 2011-08-04 18:03:41 -0500 | [diff] [blame] | 398 | #define CONFIG_SYS_CCSRBAR_DEFAULT 0xfe000000 |
Kumar Gala | 1f97987 | 2011-05-13 01:16:07 -0500 | [diff] [blame] | 399 | #define CONFIG_SYS_FSL_USB1_PHY_ENABLE |
| 400 | #define CONFIG_SYS_FSL_USB2_PHY_ENABLE |
Kumar Gala | b6c3722 | 2011-04-13 00:19:10 -0500 | [diff] [blame] | 401 | #define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY |
Kumar Gala | 1f97987 | 2011-05-13 01:16:07 -0500 | [diff] [blame] | 402 | #define CONFIG_SYS_FSL_ERRATUM_ESDHC111 |
York Sun | 5e23ab0 | 2012-05-07 07:26:47 +0000 | [diff] [blame] | 403 | #define CONFIG_SYS_FSL_ERRATUM_NMG_CPU_A011 |
Xulei | 99d7b0a | 2013-03-11 17:56:34 +0000 | [diff] [blame] | 404 | #define CONFIG_SYS_FSL_ERRATUM_USB14 |
Kumar Gala | 43f082b | 2011-11-22 06:51:15 -0600 | [diff] [blame] | 405 | #define CONFIG_SYS_FSL_ERRATUM_CPU_A003999 |
York Sun | e22be77 | 2013-03-25 07:30:11 +0000 | [diff] [blame] | 406 | #define CONFIG_SYS_FSL_ERRATUM_DDR_A003 |
York Sun | 4108508 | 2011-11-20 10:01:35 -0800 | [diff] [blame] | 407 | #define CONFIG_SYS_FSL_ERRATUM_DDR_A003474 |
Liu Gang | 7d67ed5 | 2012-03-08 00:33:14 +0000 | [diff] [blame] | 408 | #define CONFIG_SYS_FSL_SRIO_MAX_PORTS 2 |
| 409 | #define CONFIG_SYS_FSL_SRIO_OB_WIN_NUM 9 |
| 410 | #define CONFIG_SYS_FSL_SRIO_IB_WIN_NUM 5 |
Scott Wood | 33eee33 | 2012-08-14 10:14:53 +0000 | [diff] [blame] | 411 | #define CONFIG_SYS_FSL_ERRATUM_A004510 |
| 412 | #define CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV 0x10 |
| 413 | #define CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV2 0x11 |
| 414 | #define CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY 0xf0000000 |
Liu Gang | d59c557 | 2012-09-28 21:26:19 +0000 | [diff] [blame] | 415 | #define CONFIG_SYS_FSL_ERRATUM_SRIO_A004034 |
Timur Tabi | 0118033 | 2012-10-25 12:40:00 +0000 | [diff] [blame] | 416 | #define CONFIG_SYS_FSL_ERRATUM_A004849 |
Chunhe Lan | 9c3f77e | 2013-08-16 15:10:37 +0800 | [diff] [blame] | 417 | #define CONFIG_SYS_FSL_ERRATUM_I2C_A004447 |
Suresh Gupta | 9c641a8 | 2014-02-26 14:29:12 +0530 | [diff] [blame] | 418 | #define CONFIG_SYS_FSL_ERRATUM_A006261 |
Chunhe Lan | 9c3f77e | 2013-08-16 15:10:37 +0800 | [diff] [blame] | 419 | #define CONFIG_SYS_FSL_A004447_SVR_REV 0x11 |
Kumar Gala | 1f97987 | 2011-05-13 01:16:07 -0500 | [diff] [blame] | 420 | |
Kumar Gala | 243be8e | 2011-01-19 03:05:26 -0600 | [diff] [blame] | 421 | #elif defined(CONFIG_PPC_P3041) |
York Sun | d1001e3 | 2012-10-08 07:44:15 +0000 | [diff] [blame] | 422 | #define CONFIG_SYS_FSL_QORIQ_CHASSIS1 |
York Sun | d2ab4bb | 2013-06-25 11:37:39 -0700 | [diff] [blame] | 423 | #define CONFIG_FSL_CORENET /* Freescale CoreNet platform */ |
Kumar Gala | 243be8e | 2011-01-19 03:05:26 -0600 | [diff] [blame] | 424 | #define CONFIG_MAX_CPUS 4 |
Kumar Gala | b5c8753 | 2011-02-16 02:03:29 -0600 | [diff] [blame] | 425 | #define CONFIG_SYS_FSL_NUM_CC_PLLS 2 |
Kumar Gala | 243be8e | 2011-01-19 03:05:26 -0600 | [diff] [blame] | 426 | #define CONFIG_SYS_FSL_NUM_LAWS 32 |
| 427 | #define CONFIG_SYS_FSL_SEC_COMPAT 4 |
Kumar Gala | fbee0f7 | 2011-01-25 12:42:32 -0600 | [diff] [blame] | 428 | #define CONFIG_SYS_NUM_FMAN 1 |
| 429 | #define CONFIG_SYS_NUM_FM1_DTSEC 5 |
| 430 | #define CONFIG_SYS_NUM_FM1_10GEC 1 |
| 431 | #define CONFIG_NUM_DDR_CONTROLLERS 1 |
York Sun | 34e026f | 2014-03-27 17:54:47 -0700 | [diff] [blame] | 432 | #define CONFIG_SYS_FSL_DDR_VER FSL_DDR_VER_4_5 |
Kumar Gala | c657d89 | 2011-02-04 00:43:34 -0600 | [diff] [blame] | 433 | #define CONFIG_SYS_FM_MURAM_SIZE 0x28000 |
Kumar Gala | 66412c6 | 2011-02-18 05:40:54 -0600 | [diff] [blame] | 434 | #define CONFIG_SYS_FSL_TBCLK_DIV 32 |
Kumar Gala | 8f29084 | 2011-05-20 00:39:21 -0500 | [diff] [blame] | 435 | #define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v2.2" |
Timur Tabi | e46fedf | 2011-08-04 18:03:41 -0500 | [diff] [blame] | 436 | #define CONFIG_SYS_CCSRBAR_DEFAULT 0xfe000000 |
Roy Zang | 86221f0 | 2011-04-13 00:08:51 -0500 | [diff] [blame] | 437 | #define CONFIG_SYS_FSL_USB1_PHY_ENABLE |
| 438 | #define CONFIG_SYS_FSL_USB2_PHY_ENABLE |
Kumar Gala | b6c3722 | 2011-04-13 00:19:10 -0500 | [diff] [blame] | 439 | #define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY |
ramneek mehresh | f1810d8 | 2013-10-18 17:40:17 +0530 | [diff] [blame] | 440 | #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 |
Lei Xu | 3000976 | 2011-04-19 15:28:41 +0800 | [diff] [blame] | 441 | #define CONFIG_SYS_FSL_ERRATUM_ESDHC111 |
York Sun | 57125f2 | 2012-08-08 18:04:53 +0000 | [diff] [blame] | 442 | #define CONFIG_SYS_FSL_ERRATUM_NMG_CPU_A011 |
Xulei | 99d7b0a | 2013-03-11 17:56:34 +0000 | [diff] [blame] | 443 | #define CONFIG_SYS_FSL_ERRATUM_USB14 |
Kumar Gala | 43f082b | 2011-11-22 06:51:15 -0600 | [diff] [blame] | 444 | #define CONFIG_SYS_FSL_ERRATUM_CPU_A003999 |
York Sun | e22be77 | 2013-03-25 07:30:11 +0000 | [diff] [blame] | 445 | #define CONFIG_SYS_FSL_ERRATUM_DDR_A003 |
York Sun | 4108508 | 2011-11-20 10:01:35 -0800 | [diff] [blame] | 446 | #define CONFIG_SYS_FSL_ERRATUM_DDR_A003474 |
Liu Gang | 7d67ed5 | 2012-03-08 00:33:14 +0000 | [diff] [blame] | 447 | #define CONFIG_SYS_FSL_SRIO_MAX_PORTS 2 |
| 448 | #define CONFIG_SYS_FSL_SRIO_OB_WIN_NUM 9 |
| 449 | #define CONFIG_SYS_FSL_SRIO_IB_WIN_NUM 5 |
Scott Wood | 33eee33 | 2012-08-14 10:14:53 +0000 | [diff] [blame] | 450 | #define CONFIG_SYS_FSL_ERRATUM_A004510 |
| 451 | #define CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV 0x10 |
| 452 | #define CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV2 0x11 |
| 453 | #define CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY 0xf0000000 |
Liu Gang | d59c557 | 2012-09-28 21:26:19 +0000 | [diff] [blame] | 454 | #define CONFIG_SYS_FSL_ERRATUM_SRIO_A004034 |
Timur Tabi | 0118033 | 2012-10-25 12:40:00 +0000 | [diff] [blame] | 455 | #define CONFIG_SYS_FSL_ERRATUM_A004849 |
York Sun | d217a9a | 2013-06-25 11:37:49 -0700 | [diff] [blame] | 456 | #define CONFIG_SYS_FSL_ERRATUM_A005812 |
Chunhe Lan | 9c3f77e | 2013-08-16 15:10:37 +0800 | [diff] [blame] | 457 | #define CONFIG_SYS_FSL_ERRATUM_I2C_A004447 |
Suresh Gupta | 9c641a8 | 2014-02-26 14:29:12 +0530 | [diff] [blame] | 458 | #define CONFIG_SYS_FSL_ERRATUM_A006261 |
Chunhe Lan | 9c3f77e | 2013-08-16 15:10:37 +0800 | [diff] [blame] | 459 | #define CONFIG_SYS_FSL_A004447_SVR_REV 0x20 |
Kumar Gala | 243be8e | 2011-01-19 03:05:26 -0600 | [diff] [blame] | 460 | |
Scott Wood | 3e978f5 | 2012-08-14 10:14:51 +0000 | [diff] [blame] | 461 | #elif defined(CONFIG_PPC_P4080) /* also supports P4040 */ |
York Sun | d1001e3 | 2012-10-08 07:44:15 +0000 | [diff] [blame] | 462 | #define CONFIG_SYS_FSL_QORIQ_CHASSIS1 |
York Sun | d2ab4bb | 2013-06-25 11:37:39 -0700 | [diff] [blame] | 463 | #define CONFIG_FSL_CORENET /* Freescale CoreNet platform */ |
Kumar Gala | 243be8e | 2011-01-19 03:05:26 -0600 | [diff] [blame] | 464 | #define CONFIG_MAX_CPUS 8 |
Kumar Gala | b5c8753 | 2011-02-16 02:03:29 -0600 | [diff] [blame] | 465 | #define CONFIG_SYS_FSL_NUM_CC_PLLS 4 |
Kumar Gala | 243be8e | 2011-01-19 03:05:26 -0600 | [diff] [blame] | 466 | #define CONFIG_SYS_FSL_NUM_LAWS 32 |
| 467 | #define CONFIG_SYS_FSL_SEC_COMPAT 4 |
| 468 | #define CONFIG_SYS_NUM_FMAN 2 |
| 469 | #define CONFIG_SYS_NUM_FM1_DTSEC 4 |
| 470 | #define CONFIG_SYS_NUM_FM2_DTSEC 4 |
| 471 | #define CONFIG_SYS_NUM_FM1_10GEC 1 |
| 472 | #define CONFIG_SYS_NUM_FM2_10GEC 1 |
| 473 | #define CONFIG_NUM_DDR_CONTROLLERS 2 |
York Sun | 34e026f | 2014-03-27 17:54:47 -0700 | [diff] [blame] | 474 | #define CONFIG_SYS_FSL_DDR_VER FSL_DDR_VER_4_4 |
ramneek mehresh | f1810d8 | 2013-10-18 17:40:17 +0530 | [diff] [blame] | 475 | #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 |
Kumar Gala | c657d89 | 2011-02-04 00:43:34 -0600 | [diff] [blame] | 476 | #define CONFIG_SYS_FM_MURAM_SIZE 0x28000 |
Kumar Gala | 66412c6 | 2011-02-18 05:40:54 -0600 | [diff] [blame] | 477 | #define CONFIG_SYS_FSL_TBCLK_DIV 16 |
Kumar Gala | 8f29084 | 2011-05-20 00:39:21 -0500 | [diff] [blame] | 478 | #define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,p4080-pcie" |
Timur Tabi | e46fedf | 2011-08-04 18:03:41 -0500 | [diff] [blame] | 479 | #define CONFIG_SYS_CCSRBAR_DEFAULT 0xfe000000 |
Kumar Gala | 243be8e | 2011-01-19 03:05:26 -0600 | [diff] [blame] | 480 | #define CONFIG_SYS_FSL_ERRATUM_CPC_A002 |
| 481 | #define CONFIG_SYS_FSL_ERRATUM_CPC_A003 |
York Sun | fa8d23c | 2011-01-10 12:03:01 +0000 | [diff] [blame] | 482 | #define CONFIG_SYS_FSL_ERRATUM_DDR_A003 |
Kumar Gala | 243be8e | 2011-01-19 03:05:26 -0600 | [diff] [blame] | 483 | #define CONFIG_SYS_FSL_ERRATUM_ELBC_A001 |
| 484 | #define CONFIG_SYS_FSL_ERRATUM_ESDHC111 |
| 485 | #define CONFIG_SYS_FSL_ERRATUM_ESDHC135 |
Zang Roy-R61911 | 4e0be34 | 2012-09-18 09:50:08 +0000 | [diff] [blame] | 486 | #define CONFIG_SYS_FSL_ERRATUM_ESDHC13 |
Kumar Gala | 243be8e | 2011-01-19 03:05:26 -0600 | [diff] [blame] | 487 | #define CONFIG_SYS_P4080_ERRATUM_CPU22 |
York Sun | 5e23ab0 | 2012-05-07 07:26:47 +0000 | [diff] [blame] | 488 | #define CONFIG_SYS_FSL_ERRATUM_NMG_CPU_A011 |
Kumar Gala | 243be8e | 2011-01-19 03:05:26 -0600 | [diff] [blame] | 489 | #define CONFIG_SYS_P4080_ERRATUM_SERDES8 |
Emil Medve | df8af0b | 2010-08-31 22:57:38 -0500 | [diff] [blame] | 490 | #define CONFIG_SYS_P4080_ERRATUM_SERDES9 |
Timur Tabi | d90fdba | 2011-04-18 17:16:00 -0500 | [diff] [blame] | 491 | #define CONFIG_SYS_P4080_ERRATUM_SERDES_A001 |
Timur Tabi | da30b9f | 2011-04-01 13:19:36 -0500 | [diff] [blame] | 492 | #define CONFIG_SYS_P4080_ERRATUM_SERDES_A005 |
Kumar Gala | 43f082b | 2011-11-22 06:51:15 -0600 | [diff] [blame] | 493 | #define CONFIG_SYS_FSL_ERRATUM_CPU_A003999 |
York Sun | 4108508 | 2011-11-20 10:01:35 -0800 | [diff] [blame] | 494 | #define CONFIG_SYS_FSL_ERRATUM_DDR_A003474 |
Liu Gang | 7d67ed5 | 2012-03-08 00:33:14 +0000 | [diff] [blame] | 495 | #define CONFIG_SYS_FSL_SRIO_MAX_PORTS 2 |
| 496 | #define CONFIG_SYS_FSL_SRIO_OB_WIN_NUM 9 |
| 497 | #define CONFIG_SYS_FSL_SRIO_IB_WIN_NUM 5 |
| 498 | #define CONFIG_SYS_FSL_RMU |
| 499 | #define CONFIG_SYS_FSL_SRIO_MSG_UNIT_NUM 2 |
Scott Wood | 33eee33 | 2012-08-14 10:14:53 +0000 | [diff] [blame] | 500 | #define CONFIG_SYS_FSL_ERRATUM_A004510 |
| 501 | #define CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV 0x20 |
| 502 | #define CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY 0xff000000 |
Liu Gang | d59c557 | 2012-09-28 21:26:19 +0000 | [diff] [blame] | 503 | #define CONFIG_SYS_FSL_ERRATUM_SRIO_A004034 |
Timur Tabi | 0118033 | 2012-10-25 12:40:00 +0000 | [diff] [blame] | 504 | #define CONFIG_SYS_FSL_ERRATUM_A004849 |
Timur Tabi | d607b96 | 2012-11-01 08:20:23 +0000 | [diff] [blame] | 505 | #define CONFIG_SYS_FSL_ERRATUM_A004580 |
Yuanquan Chen | c0a4e6b | 2012-11-26 23:49:45 +0000 | [diff] [blame] | 506 | #define CONFIG_SYS_P4080_ERRATUM_PCIE_A003 |
York Sun | d217a9a | 2013-06-25 11:37:49 -0700 | [diff] [blame] | 507 | #define CONFIG_SYS_FSL_ERRATUM_A005812 |
Chunhe Lan | 9c3f77e | 2013-08-16 15:10:37 +0800 | [diff] [blame] | 508 | #define CONFIG_SYS_FSL_ERRATUM_I2C_A004447 |
Nikhil Badola | 1185691 | 2014-02-26 17:43:15 +0530 | [diff] [blame] | 509 | #define CONFIG_SYS_FSL_ERRATUM_A007075 |
Chunhe Lan | 9c3f77e | 2013-08-16 15:10:37 +0800 | [diff] [blame] | 510 | #define CONFIG_SYS_FSL_A004447_SVR_REV 0x20 |
Kumar Gala | 243be8e | 2011-01-19 03:05:26 -0600 | [diff] [blame] | 511 | |
Scott Wood | 3e978f5 | 2012-08-14 10:14:51 +0000 | [diff] [blame] | 512 | #elif defined(CONFIG_PPC_P5020) /* also supports P5010 */ |
York Sun | ffd06e0 | 2012-10-08 07:44:30 +0000 | [diff] [blame] | 513 | #define CONFIG_SYS_PPC64 /* 64-bit core */ |
York Sun | d1001e3 | 2012-10-08 07:44:15 +0000 | [diff] [blame] | 514 | #define CONFIG_SYS_FSL_QORIQ_CHASSIS1 |
York Sun | d2ab4bb | 2013-06-25 11:37:39 -0700 | [diff] [blame] | 515 | #define CONFIG_FSL_CORENET /* Freescale CoreNet platform */ |
Kumar Gala | 243be8e | 2011-01-19 03:05:26 -0600 | [diff] [blame] | 516 | #define CONFIG_MAX_CPUS 2 |
Kumar Gala | b5c8753 | 2011-02-16 02:03:29 -0600 | [diff] [blame] | 517 | #define CONFIG_SYS_FSL_NUM_CC_PLLS 2 |
Kumar Gala | 243be8e | 2011-01-19 03:05:26 -0600 | [diff] [blame] | 518 | #define CONFIG_SYS_FSL_NUM_LAWS 32 |
| 519 | #define CONFIG_SYS_FSL_SEC_COMPAT 4 |
Kumar Gala | fbee0f7 | 2011-01-25 12:42:32 -0600 | [diff] [blame] | 520 | #define CONFIG_SYS_NUM_FMAN 1 |
| 521 | #define CONFIG_SYS_NUM_FM1_DTSEC 5 |
| 522 | #define CONFIG_SYS_NUM_FM1_10GEC 1 |
| 523 | #define CONFIG_NUM_DDR_CONTROLLERS 2 |
York Sun | 34e026f | 2014-03-27 17:54:47 -0700 | [diff] [blame] | 524 | #define CONFIG_SYS_FSL_DDR_VER FSL_DDR_VER_4_4 |
ramneek mehresh | f1810d8 | 2013-10-18 17:40:17 +0530 | [diff] [blame] | 525 | #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 |
Kumar Gala | c657d89 | 2011-02-04 00:43:34 -0600 | [diff] [blame] | 526 | #define CONFIG_SYS_FM_MURAM_SIZE 0x28000 |
Kumar Gala | 66412c6 | 2011-02-18 05:40:54 -0600 | [diff] [blame] | 527 | #define CONFIG_SYS_FSL_TBCLK_DIV 32 |
Kumar Gala | 8f29084 | 2011-05-20 00:39:21 -0500 | [diff] [blame] | 528 | #define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v2.2" |
Timur Tabi | e46fedf | 2011-08-04 18:03:41 -0500 | [diff] [blame] | 529 | #define CONFIG_SYS_CCSRBAR_DEFAULT 0xfe000000 |
Roy Zang | 86221f0 | 2011-04-13 00:08:51 -0500 | [diff] [blame] | 530 | #define CONFIG_SYS_FSL_USB1_PHY_ENABLE |
| 531 | #define CONFIG_SYS_FSL_USB2_PHY_ENABLE |
Kumar Gala | b6c3722 | 2011-04-13 00:19:10 -0500 | [diff] [blame] | 532 | #define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY |
Lei Xu | 3000976 | 2011-04-19 15:28:41 +0800 | [diff] [blame] | 533 | #define CONFIG_SYS_FSL_ERRATUM_ESDHC111 |
Xulei | 99d7b0a | 2013-03-11 17:56:34 +0000 | [diff] [blame] | 534 | #define CONFIG_SYS_FSL_ERRATUM_USB14 |
York Sun | e22be77 | 2013-03-25 07:30:11 +0000 | [diff] [blame] | 535 | #define CONFIG_SYS_FSL_ERRATUM_DDR_A003 |
York Sun | 4108508 | 2011-11-20 10:01:35 -0800 | [diff] [blame] | 536 | #define CONFIG_SYS_FSL_ERRATUM_DDR_A003474 |
Liu Gang | 7d67ed5 | 2012-03-08 00:33:14 +0000 | [diff] [blame] | 537 | #define CONFIG_SYS_FSL_SRIO_MAX_PORTS 2 |
| 538 | #define CONFIG_SYS_FSL_SRIO_OB_WIN_NUM 9 |
| 539 | #define CONFIG_SYS_FSL_SRIO_IB_WIN_NUM 5 |
Scott Wood | 33eee33 | 2012-08-14 10:14:53 +0000 | [diff] [blame] | 540 | #define CONFIG_SYS_FSL_ERRATUM_A004510 |
| 541 | #define CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV 0x10 |
| 542 | #define CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY 0xc0000000 |
Liu Gang | d59c557 | 2012-09-28 21:26:19 +0000 | [diff] [blame] | 543 | #define CONFIG_SYS_FSL_ERRATUM_SRIO_A004034 |
Chunhe Lan | 9c3f77e | 2013-08-16 15:10:37 +0800 | [diff] [blame] | 544 | #define CONFIG_SYS_FSL_ERRATUM_I2C_A004447 |
Suresh Gupta | 9c641a8 | 2014-02-26 14:29:12 +0530 | [diff] [blame] | 545 | #define CONFIG_SYS_FSL_ERRATUM_A006261 |
Chunhe Lan | 9c3f77e | 2013-08-16 15:10:37 +0800 | [diff] [blame] | 546 | #define CONFIG_SYS_FSL_A004447_SVR_REV 0x20 |
Kumar Gala | 243be8e | 2011-01-19 03:05:26 -0600 | [diff] [blame] | 547 | |
Timur Tabi | 4905443 | 2012-10-05 11:09:19 +0000 | [diff] [blame] | 548 | #elif defined(CONFIG_PPC_P5040) |
Timur Tabi | 1956e43 | 2012-10-23 10:48:09 +0000 | [diff] [blame] | 549 | #define CONFIG_SYS_PPC64 |
Timur Tabi | 4905443 | 2012-10-05 11:09:19 +0000 | [diff] [blame] | 550 | #define CONFIG_SYS_FSL_QORIQ_CHASSIS1 |
York Sun | d2ab4bb | 2013-06-25 11:37:39 -0700 | [diff] [blame] | 551 | #define CONFIG_FSL_CORENET /* Freescale CoreNet platform */ |
Timur Tabi | 4905443 | 2012-10-05 11:09:19 +0000 | [diff] [blame] | 552 | #define CONFIG_MAX_CPUS 4 |
| 553 | #define CONFIG_SYS_FSL_NUM_CC_PLLS 3 |
| 554 | #define CONFIG_SYS_FSL_NUM_LAWS 32 |
| 555 | #define CONFIG_SYS_FSL_SEC_COMPAT 4 |
| 556 | #define CONFIG_SYS_NUM_FMAN 2 |
| 557 | #define CONFIG_SYS_NUM_FM1_DTSEC 5 |
| 558 | #define CONFIG_SYS_NUM_FM1_10GEC 1 |
| 559 | #define CONFIG_SYS_NUM_FM2_DTSEC 5 |
| 560 | #define CONFIG_SYS_NUM_FM2_10GEC 1 |
| 561 | #define CONFIG_NUM_DDR_CONTROLLERS 2 |
York Sun | 34e026f | 2014-03-27 17:54:47 -0700 | [diff] [blame] | 562 | #define CONFIG_SYS_FSL_DDR_VER FSL_DDR_VER_4_4 |
ramneek mehresh | f1810d8 | 2013-10-18 17:40:17 +0530 | [diff] [blame] | 563 | #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 |
Timur Tabi | 4905443 | 2012-10-05 11:09:19 +0000 | [diff] [blame] | 564 | #define CONFIG_SYS_FM_MURAM_SIZE 0x28000 |
| 565 | #define CONFIG_SYS_FSL_TBCLK_DIV 16 |
| 566 | #define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v2.4" |
| 567 | #define CONFIG_SYS_CCSRBAR_DEFAULT 0xfe000000 |
| 568 | #define CONFIG_SYS_FSL_USB1_PHY_ENABLE |
| 569 | #define CONFIG_SYS_FSL_USB2_PHY_ENABLE |
| 570 | #define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY |
| 571 | #define CONFIG_SYS_FSL_ERRATUM_ESDHC111 |
Xulei | 99d7b0a | 2013-03-11 17:56:34 +0000 | [diff] [blame] | 572 | #define CONFIG_SYS_FSL_ERRATUM_USB14 |
Timur Tabi | 4905443 | 2012-10-05 11:09:19 +0000 | [diff] [blame] | 573 | #define CONFIG_SYS_FSL_ERRATUM_DDR_A003 |
| 574 | #define CONFIG_SYS_FSL_ERRATUM_DDR_A003474 |
| 575 | #define CONFIG_SYS_FSL_ERRATUM_A004699 |
Timur Tabi | 4905443 | 2012-10-05 11:09:19 +0000 | [diff] [blame] | 576 | #define CONFIG_SYS_FSL_ERRATUM_A004510 |
| 577 | #define CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV 0x10 |
Suresh Gupta | 9c641a8 | 2014-02-26 14:29:12 +0530 | [diff] [blame] | 578 | #define CONFIG_SYS_FSL_ERRATUM_A006261 |
Timur Tabi | 4905443 | 2012-10-05 11:09:19 +0000 | [diff] [blame] | 579 | #define CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY 0xf0000000 |
York Sun | d217a9a | 2013-06-25 11:37:49 -0700 | [diff] [blame] | 580 | #define CONFIG_SYS_FSL_ERRATUM_A005812 |
Timur Tabi | 4905443 | 2012-10-05 11:09:19 +0000 | [diff] [blame] | 581 | |
Prabhakar Kushwaha | 19a8dbd | 2012-04-24 20:16:49 +0000 | [diff] [blame] | 582 | #elif defined(CONFIG_BSC9131) |
| 583 | #define CONFIG_MAX_CPUS 1 |
| 584 | #define CONFIG_FSL_SDHC_V2_3 |
| 585 | #define CONFIG_SYS_FSL_NUM_LAWS 12 |
| 586 | #define CONFIG_TSECV2 |
| 587 | #define CONFIG_SYS_FSL_SEC_COMPAT 4 |
| 588 | #define CONFIG_NUM_DDR_CONTROLLERS 1 |
York Sun | 34e026f | 2014-03-27 17:54:47 -0700 | [diff] [blame] | 589 | #define CONFIG_SYS_FSL_DDR_VER FSL_DDR_VER_4_4 |
ramneek mehresh | f1810d8 | 2013-10-18 17:40:17 +0530 | [diff] [blame] | 590 | #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 |
Priyanka Jain | 765b0bd | 2013-04-04 09:31:54 +0530 | [diff] [blame] | 591 | #define CONFIG_SYS_FSL_DSP_M2_RAM_ADDR 0xb0000000 |
| 592 | #define CONFIG_SYS_FSL_DSP_CCSRBAR_DEFAULT 0xff600000 |
Mingkai Hu | 362ee04 | 2013-05-16 10:18:13 +0800 | [diff] [blame] | 593 | #define CONFIG_SYS_FSL_IFC_BANK_COUNT 3 |
Prabhakar Kushwaha | 19a8dbd | 2012-04-24 20:16:49 +0000 | [diff] [blame] | 594 | #define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000 |
| 595 | #define CONFIG_NAND_FSL_IFC |
Prabhakar Kushwaha | 19a8dbd | 2012-04-24 20:16:49 +0000 | [diff] [blame] | 596 | #define CONFIG_SYS_FSL_ERRATUM_ESDHC111 |
York Sun | 954a1a4 | 2013-08-20 15:09:43 -0700 | [diff] [blame] | 597 | #define CONFIG_SYS_FSL_ERRATUM_A005125 |
Nikhil Badola | 0dc78ff | 2014-11-21 17:25:21 +0530 | [diff] [blame] | 598 | #define CONFIG_SYS_FSL_ERRATUM_A004477 |
Haijun.Zhang | f28bea0 | 2014-01-10 13:52:19 +0800 | [diff] [blame] | 599 | #define CONFIG_ESDHC_HC_BLK_ADDR |
Prabhakar Kushwaha | 19a8dbd | 2012-04-24 20:16:49 +0000 | [diff] [blame] | 600 | |
Prabhakar Kushwaha | 35fe948 | 2013-01-23 17:59:57 +0000 | [diff] [blame] | 601 | #elif defined(CONFIG_BSC9132) |
| 602 | #define CONFIG_MAX_CPUS 2 |
| 603 | #define CONFIG_SYS_PPC_E500_DEBUG_TLB 3 |
| 604 | #define CONFIG_FSL_SDHC_V2_3 |
| 605 | #define CONFIG_SYS_FSL_NUM_LAWS 12 |
| 606 | #define CONFIG_TSECV2 |
| 607 | #define CONFIG_SYS_FSL_SEC_COMPAT 4 |
| 608 | #define CONFIG_NUM_DDR_CONTROLLERS 2 |
York Sun | 34e026f | 2014-03-27 17:54:47 -0700 | [diff] [blame] | 609 | #define CONFIG_SYS_FSL_DDR_VER FSL_DDR_VER_4_6 |
ramneek mehresh | f1810d8 | 2013-10-18 17:40:17 +0530 | [diff] [blame] | 610 | #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 |
Priyanka Jain | 64501c6 | 2013-07-02 09:21:04 +0530 | [diff] [blame] | 611 | #define CONFIG_SYS_FSL_DSP_DDR_ADDR 0x40000000 |
| 612 | #define CONFIG_SYS_FSL_DSP_M2_RAM_ADDR 0xb0000000 |
| 613 | #define CONFIG_SYS_FSL_DSP_M3_RAM_ADDR 0xc0000000 |
| 614 | #define CONFIG_SYS_FSL_DSP_CCSRBAR_DEFAULT 0xff600000 |
York Sun | 061ffed | 2013-04-18 19:31:01 -0700 | [diff] [blame] | 615 | #define CONFIG_SYS_FSL_IFC_BANK_COUNT 3 |
Prabhakar Kushwaha | 35fe948 | 2013-01-23 17:59:57 +0000 | [diff] [blame] | 616 | #define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000 |
| 617 | #define CONFIG_NAND_FSL_IFC |
Prabhakar Kushwaha | 35fe948 | 2013-01-23 17:59:57 +0000 | [diff] [blame] | 618 | #define CONFIG_SYS_FSL_ERRATUM_ESDHC111 |
| 619 | #define CONFIG_SYS_FSL_ESDHC_P1010_BROKEN_SDCLK |
| 620 | #define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v2.2" |
York Sun | 954a1a4 | 2013-08-20 15:09:43 -0700 | [diff] [blame] | 621 | #define CONFIG_SYS_FSL_ERRATUM_A005125 |
Chunhe Lan | f1a96ec | 2014-05-07 10:50:20 +0800 | [diff] [blame] | 622 | #define CONFIG_SYS_FSL_ERRATUM_A005434 |
Nikhil Badola | 0dc78ff | 2014-11-21 17:25:21 +0530 | [diff] [blame] | 623 | #define CONFIG_SYS_FSL_ERRATUM_A004477 |
Chunhe Lan | 9c3f77e | 2013-08-16 15:10:37 +0800 | [diff] [blame] | 624 | #define CONFIG_SYS_FSL_ERRATUM_I2C_A004447 |
| 625 | #define CONFIG_SYS_FSL_A004447_SVR_REV 0x11 |
Haijun.Zhang | f28bea0 | 2014-01-10 13:52:19 +0800 | [diff] [blame] | 626 | #define CONFIG_ESDHC_HC_BLK_ADDR |
Prabhakar Kushwaha | 35fe948 | 2013-01-23 17:59:57 +0000 | [diff] [blame] | 627 | |
Shengzhou Liu | 5122dfa | 2014-04-25 16:31:22 +0800 | [diff] [blame] | 628 | #elif defined(CONFIG_PPC_T4240) || defined(CONFIG_PPC_T4160) || \ |
| 629 | defined(CONFIG_PPC_T4080) |
York Sun | 3d2972f | 2013-03-25 07:40:05 +0000 | [diff] [blame] | 630 | #define CONFIG_E6500 |
York Sun | ffd06e0 | 2012-10-08 07:44:30 +0000 | [diff] [blame] | 631 | #define CONFIG_SYS_PPC64 /* 64-bit core */ |
York Sun | 9e75875 | 2012-10-08 07:44:19 +0000 | [diff] [blame] | 632 | #define CONFIG_FSL_CORENET /* Freescale CoreNet platform */ |
| 633 | #define CONFIG_SYS_FSL_QORIQ_CHASSIS2 /* Freescale Chassis generation 2 */ |
York Sun | f698143 | 2013-03-25 07:40:07 +0000 | [diff] [blame] | 634 | #define CONFIG_SYS_FSL_CORES_PER_CLUSTER 4 |
York Sun | 9e75875 | 2012-10-08 07:44:19 +0000 | [diff] [blame] | 635 | #define CONFIG_SYS_FSL_QMAN_V3 /* QMAN version 3 */ |
York Sun | 3d2972f | 2013-03-25 07:40:05 +0000 | [diff] [blame] | 636 | #ifdef CONFIG_PPC_T4240 |
York Sun | 9e75875 | 2012-10-08 07:44:19 +0000 | [diff] [blame] | 637 | #define CONFIG_MAX_CPUS 12 |
Prabhakar Kushwaha | ce746fe | 2013-09-03 11:20:15 +0530 | [diff] [blame] | 638 | #define CONFIG_SYS_FSL_CLUSTER_CLOCKS { 1, 1, 4 } |
York Sun | 9e75875 | 2012-10-08 07:44:19 +0000 | [diff] [blame] | 639 | #define CONFIG_SYS_NUM_FM1_DTSEC 8 |
| 640 | #define CONFIG_SYS_NUM_FM1_10GEC 2 |
| 641 | #define CONFIG_SYS_NUM_FM2_DTSEC 8 |
| 642 | #define CONFIG_SYS_NUM_FM2_10GEC 2 |
| 643 | #define CONFIG_NUM_DDR_CONTROLLERS 3 |
York Sun | 3d2972f | 2013-03-25 07:40:05 +0000 | [diff] [blame] | 644 | #else |
Shengzhou Liu | 5122dfa | 2014-04-25 16:31:22 +0800 | [diff] [blame] | 645 | #define CONFIG_SYS_NUM_FM1_DTSEC 6 |
York Sun | 3d2972f | 2013-03-25 07:40:05 +0000 | [diff] [blame] | 646 | #define CONFIG_SYS_NUM_FM1_10GEC 1 |
Shengzhou Liu | 5122dfa | 2014-04-25 16:31:22 +0800 | [diff] [blame] | 647 | #define CONFIG_SYS_NUM_FM2_DTSEC 8 |
York Sun | 3d2972f | 2013-03-25 07:40:05 +0000 | [diff] [blame] | 648 | #define CONFIG_SYS_NUM_FM2_10GEC 1 |
| 649 | #define CONFIG_NUM_DDR_CONTROLLERS 2 |
Shengzhou Liu | 5122dfa | 2014-04-25 16:31:22 +0800 | [diff] [blame] | 650 | #if defined(CONFIG_PPC_T4160) |
| 651 | #define CONFIG_MAX_CPUS 8 |
| 652 | #define CONFIG_SYS_FSL_CLUSTER_CLOCKS { 1, 1 } |
| 653 | #elif defined(CONFIG_PPC_T4080) |
| 654 | #define CONFIG_MAX_CPUS 4 |
| 655 | #define CONFIG_SYS_FSL_CLUSTER_CLOCKS { 1 } |
| 656 | #endif |
York Sun | 3d2972f | 2013-03-25 07:40:05 +0000 | [diff] [blame] | 657 | #endif |
York Sun | b624084 | 2013-03-25 07:33:29 +0000 | [diff] [blame] | 658 | #define CONFIG_SYS_FSL_NUM_CC_PLLS 5 |
| 659 | #define CONFIG_SYS_FSL_NUM_LAWS 32 |
Prabhakar Kushwaha | a4c955b | 2013-07-31 16:56:41 +0530 | [diff] [blame] | 660 | #define CONFIG_SYS_FSL_SRDS_1 |
| 661 | #define CONFIG_SYS_FSL_SRDS_2 |
York Sun | b624084 | 2013-03-25 07:33:29 +0000 | [diff] [blame] | 662 | #define CONFIG_SYS_FSL_SRDS_3 |
| 663 | #define CONFIG_SYS_FSL_SRDS_4 |
| 664 | #define CONFIG_SYS_FSL_SEC_COMPAT 4 |
| 665 | #define CONFIG_SYS_NUM_FMAN 2 |
ramneek mehresh | f1810d8 | 2013-10-18 17:40:17 +0530 | [diff] [blame] | 666 | #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 |
Prabhakar Kushwaha | ce746fe | 2013-09-03 11:20:15 +0530 | [diff] [blame] | 667 | #define CONFIG_SYS_PME_CLK 0 |
York Sun | b624084 | 2013-03-25 07:33:29 +0000 | [diff] [blame] | 668 | #define CONFIG_SYS_FSL_DDR_VER FSL_DDR_VER_4_7 |
Mingkai Hu | 362ee04 | 2013-05-16 10:18:13 +0800 | [diff] [blame] | 669 | #define CONFIG_SYS_FSL_IFC_BANK_COUNT 8 |
York Sun | b624084 | 2013-03-25 07:33:29 +0000 | [diff] [blame] | 670 | #define CONFIG_SYS_FMAN_V3 |
Prabhakar Kushwaha | ce746fe | 2013-09-03 11:20:15 +0530 | [diff] [blame] | 671 | #define CONFIG_SYS_FM1_CLK 3 |
| 672 | #define CONFIG_SYS_FM2_CLK 3 |
York Sun | b624084 | 2013-03-25 07:33:29 +0000 | [diff] [blame] | 673 | #define CONFIG_SYS_FM_MURAM_SIZE 0x60000 |
| 674 | #define CONFIG_SYS_FSL_TBCLK_DIV 16 |
| 675 | #define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v3.0" |
| 676 | #define CONFIG_SYS_FSL_SRIO_MAX_PORTS 2 |
| 677 | #define CONFIG_SYS_FSL_SRIO_OB_WIN_NUM 9 |
| 678 | #define CONFIG_SYS_FSL_SRIO_IB_WIN_NUM 5 |
Liu Gang | 0804793 | 2013-06-25 18:12:14 +0800 | [diff] [blame] | 679 | #define CONFIG_SYS_FSL_SRIO_LIODN |
York Sun | b624084 | 2013-03-25 07:33:29 +0000 | [diff] [blame] | 680 | #define CONFIG_SYS_FSL_USB_DUAL_PHY_ENABLE |
| 681 | #define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY |
| 682 | #define CONFIG_SYS_FSL_ERRATUM_A004468 |
| 683 | #define CONFIG_SYS_FSL_ERRATUM_A_004934 |
| 684 | #define CONFIG_SYS_FSL_ERRATUM_A005871 |
Suresh Gupta | 9c641a8 | 2014-02-26 14:29:12 +0530 | [diff] [blame] | 685 | #define CONFIG_SYS_FSL_ERRATUM_A006261 |
York Sun | 133fbfa | 2013-09-16 12:49:31 -0700 | [diff] [blame] | 686 | #define CONFIG_SYS_FSL_ERRATUM_A006379 |
Shaveta Leekha | b6808cd | 2014-05-28 14:18:55 +0530 | [diff] [blame] | 687 | #define CONFIG_SYS_FSL_ERRATUM_A007186 |
Scott Wood | 8212519 | 2013-05-15 17:50:13 -0500 | [diff] [blame] | 688 | #define CONFIG_SYS_FSL_ERRATUM_A006593 |
Nikhil Badola | f3dff69 | 2014-10-17 09:12:07 +0530 | [diff] [blame] | 689 | #define CONFIG_SYS_FSL_ERRATUM_A007798 |
York Sun | b624084 | 2013-03-25 07:33:29 +0000 | [diff] [blame] | 690 | #define CONFIG_SYS_CCSRBAR_DEFAULT 0xfe000000 |
Shaveta Leekha | b6808cd | 2014-05-28 14:18:55 +0530 | [diff] [blame] | 691 | #define CONFIG_SYS_FSL_SFP_VER_3_0 |
York Sun | b624084 | 2013-03-25 07:33:29 +0000 | [diff] [blame] | 692 | #define CONFIG_SYS_FSL_PCI_VER_3_X |
| 693 | |
Poonam Aggrwal | 8fa0102 | 2013-03-25 07:40:20 +0000 | [diff] [blame] | 694 | #elif defined(CONFIG_PPC_B4860) || defined(CONFIG_PPC_B4420) |
| 695 | #define CONFIG_E6500 |
Poonam Aggrwal | e1dbdd8 | 2012-12-23 19:24:16 +0000 | [diff] [blame] | 696 | #define CONFIG_SYS_PPC64 /* 64-bit core */ |
| 697 | #define CONFIG_FSL_CORENET /* Freescale CoreNet platform */ |
| 698 | #define CONFIG_SYS_FSL_QORIQ_CHASSIS2 /* Freescale Chassis generation 2 */ |
| 699 | #define CONFIG_SYS_FSL_QMAN_V3 /* QMAN version 3 */ |
Shaveta Leekha | b8bf0ad | 2015-01-19 12:46:54 +0530 | [diff] [blame] | 700 | #define CONFIG_HETROGENOUS_CLUSTERS /* DSP/SC3900 core clusters */ |
| 701 | #define CONFIG_PPC_CLUSTER_START 0 /*Start index of ppc clusters*/ |
| 702 | #define CONFIG_DSP_CLUSTER_START 1 /*Start index of dsp clusters*/ |
Poonam Aggrwal | e1dbdd8 | 2012-12-23 19:24:16 +0000 | [diff] [blame] | 703 | #define CONFIG_SYS_FSL_NUM_LAWS 32 |
Prabhakar Kushwaha | a4c955b | 2013-07-31 16:56:41 +0530 | [diff] [blame] | 704 | #define CONFIG_SYS_FSL_SRDS_1 |
| 705 | #define CONFIG_SYS_FSL_SRDS_2 |
Shaveta Leekha | b8bf0ad | 2015-01-19 12:46:54 +0530 | [diff] [blame] | 706 | #define CONFIG_SYS_MAPLE |
| 707 | #define CONFIG_SYS_CPRI |
| 708 | #define CONFIG_SYS_FSL_NUM_CC_PLLS 5 |
Poonam Aggrwal | e1dbdd8 | 2012-12-23 19:24:16 +0000 | [diff] [blame] | 709 | #define CONFIG_SYS_FSL_SEC_COMPAT 4 |
| 710 | #define CONFIG_SYS_NUM_FMAN 1 |
ramneek mehresh | f1810d8 | 2013-10-18 17:40:17 +0530 | [diff] [blame] | 711 | #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 |
Prabhakar Kushwaha | ce746fe | 2013-09-03 11:20:15 +0530 | [diff] [blame] | 712 | #define CONFIG_SYS_FM1_CLK 0 |
Shaveta Leekha | b8bf0ad | 2015-01-19 12:46:54 +0530 | [diff] [blame] | 713 | #define CONFIG_SYS_CPRI_CLK 3 |
| 714 | #define CONFIG_SYS_ULB_CLK 4 |
| 715 | #define CONFIG_SYS_ETVPE_CLK 1 |
Poonam Aggrwal | e1dbdd8 | 2012-12-23 19:24:16 +0000 | [diff] [blame] | 716 | #define CONFIG_SYS_FSL_DDR_VER FSL_DDR_VER_4_7 |
Mingkai Hu | 362ee04 | 2013-05-16 10:18:13 +0800 | [diff] [blame] | 717 | #define CONFIG_SYS_FSL_IFC_BANK_COUNT 4 |
Poonam Aggrwal | e1dbdd8 | 2012-12-23 19:24:16 +0000 | [diff] [blame] | 718 | #define CONFIG_SYS_FMAN_V3 |
| 719 | #define CONFIG_SYS_FM_MURAM_SIZE 0x60000 |
| 720 | #define CONFIG_SYS_FSL_TBCLK_DIV 16 |
| 721 | #define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v2.4" |
| 722 | #define CONFIG_SYS_FSL_USB1_PHY_ENABLE |
| 723 | #define CONFIG_SYS_FSL_ERRATUM_A_004934 |
Shengzhou Liu | 04feb57 | 2013-02-27 21:56:54 +0000 | [diff] [blame] | 724 | #define CONFIG_SYS_FSL_ERRATUM_A005871 |
York Sun | 133fbfa | 2013-09-16 12:49:31 -0700 | [diff] [blame] | 725 | #define CONFIG_SYS_FSL_ERRATUM_A006379 |
Shaveta Leekha | b6808cd | 2014-05-28 14:18:55 +0530 | [diff] [blame] | 726 | #define CONFIG_SYS_FSL_ERRATUM_A007186 |
Scott Wood | 8212519 | 2013-05-15 17:50:13 -0500 | [diff] [blame] | 727 | #define CONFIG_SYS_FSL_ERRATUM_A006593 |
Nikhil Badola | 1185691 | 2014-02-26 17:43:15 +0530 | [diff] [blame] | 728 | #define CONFIG_SYS_FSL_ERRATUM_A007075 |
Shaveta Leekha | 7af9a07 | 2014-02-26 16:08:22 +0530 | [diff] [blame] | 729 | #define CONFIG_SYS_FSL_ERRATUM_A006475 |
| 730 | #define CONFIG_SYS_FSL_ERRATUM_A006384 |
York Sun | c3678b0 | 2014-03-28 15:07:27 -0700 | [diff] [blame] | 731 | #define CONFIG_SYS_FSL_ERRATUM_A007212 |
Nikhil Badola | 0dc78ff | 2014-11-21 17:25:21 +0530 | [diff] [blame] | 732 | #define CONFIG_SYS_FSL_ERRATUM_A004477 |
Poonam Aggrwal | e1dbdd8 | 2012-12-23 19:24:16 +0000 | [diff] [blame] | 733 | #define CONFIG_SYS_CCSRBAR_DEFAULT 0xfe000000 |
Shaveta Leekha | b6808cd | 2014-05-28 14:18:55 +0530 | [diff] [blame] | 734 | #define CONFIG_SYS_FSL_SFP_VER_3_0 |
Poonam Aggrwal | e1dbdd8 | 2012-12-23 19:24:16 +0000 | [diff] [blame] | 735 | |
Poonam Aggrwal | 8fa0102 | 2013-03-25 07:40:20 +0000 | [diff] [blame] | 736 | #ifdef CONFIG_PPC_B4860 |
York Sun | f698143 | 2013-03-25 07:40:07 +0000 | [diff] [blame] | 737 | #define CONFIG_SYS_FSL_CORES_PER_CLUSTER 4 |
York Sun | d240414 | 2012-10-08 07:44:20 +0000 | [diff] [blame] | 738 | #define CONFIG_MAX_CPUS 4 |
Shaveta Leekha | b8bf0ad | 2015-01-19 12:46:54 +0530 | [diff] [blame] | 739 | #define CONFIG_MAX_DSP_CPUS 12 |
| 740 | #define CONFIG_NUM_DSP_CPUS 6 |
Shaveta Leekha | 6df82e3 | 2014-02-26 16:07:37 +0530 | [diff] [blame] | 741 | #define CONFIG_SYS_FSL_SRDS_NUM_PLLS 2 |
Prabhakar Kushwaha | ce746fe | 2013-09-03 11:20:15 +0530 | [diff] [blame] | 742 | #define CONFIG_SYS_FSL_CLUSTER_CLOCKS { 1, 4, 4, 4 } |
York Sun | d240414 | 2012-10-08 07:44:20 +0000 | [diff] [blame] | 743 | #define CONFIG_SYS_NUM_FM1_DTSEC 6 |
| 744 | #define CONFIG_SYS_NUM_FM1_10GEC 2 |
Poonam Aggrwal | e394ceb | 2012-12-23 19:22:33 +0000 | [diff] [blame] | 745 | #define CONFIG_NUM_DDR_CONTROLLERS 2 |
ramneek mehresh | f1810d8 | 2013-10-18 17:40:17 +0530 | [diff] [blame] | 746 | #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 |
York Sun | d240414 | 2012-10-08 07:44:20 +0000 | [diff] [blame] | 747 | #define CONFIG_SYS_FSL_SRIO_MAX_PORTS 2 |
| 748 | #define CONFIG_SYS_FSL_SRIO_OB_WIN_NUM 9 |
| 749 | #define CONFIG_SYS_FSL_SRIO_IB_WIN_NUM 5 |
Liu Gang | 32f38ee | 2013-06-25 18:12:13 +0800 | [diff] [blame] | 750 | #define CONFIG_SYS_FSL_SRIO_LIODN |
Poonam Aggrwal | 8fa0102 | 2013-03-25 07:40:20 +0000 | [diff] [blame] | 751 | #else |
| 752 | #define CONFIG_MAX_CPUS 2 |
Shaveta Leekha | b8bf0ad | 2015-01-19 12:46:54 +0530 | [diff] [blame] | 753 | #define CONFIG_MAX_DSP_CPUS 2 |
Shaveta Leekha | 6df82e3 | 2014-02-26 16:07:37 +0530 | [diff] [blame] | 754 | #define CONFIG_SYS_FSL_SRDS_NUM_PLLS 1 |
Poonam Aggrwal | 8fa0102 | 2013-03-25 07:40:20 +0000 | [diff] [blame] | 755 | #define CONFIG_SYS_FSL_CORES_PER_CLUSTER 2 |
Prabhakar Kushwaha | ce746fe | 2013-09-03 11:20:15 +0530 | [diff] [blame] | 756 | #define CONFIG_SYS_FSL_CLUSTER_CLOCKS { 1, 4 } |
Poonam Aggrwal | 8fa0102 | 2013-03-25 07:40:20 +0000 | [diff] [blame] | 757 | #define CONFIG_SYS_NUM_FM1_DTSEC 4 |
| 758 | #define CONFIG_SYS_NUM_FM1_10GEC 0 |
| 759 | #define CONFIG_NUM_DDR_CONTROLLERS 1 |
| 760 | #endif |
York Sun | d240414 | 2012-10-08 07:44:20 +0000 | [diff] [blame] | 761 | |
Priyanka Jain | 2967af6 | 2013-10-18 12:30:21 +0530 | [diff] [blame] | 762 | #elif defined(CONFIG_PPC_T1040) || defined(CONFIG_PPC_T1042) ||\ |
| 763 | defined(CONFIG_PPC_T1020) || defined(CONFIG_PPC_T1022) |
York Sun | 5f208d1 | 2013-03-25 07:40:06 +0000 | [diff] [blame] | 764 | #define CONFIG_E5500 |
| 765 | #define CONFIG_FSL_CORENET /* Freescale CoreNet platform */ |
| 766 | #define CONFIG_SYS_FSL_QORIQ_CHASSIS2 /* Freescale Chassis generation 2 */ |
York Sun | f698143 | 2013-03-25 07:40:07 +0000 | [diff] [blame] | 767 | #define CONFIG_SYS_FSL_CORES_PER_CLUSTER 1 |
York Sun | 5f208d1 | 2013-03-25 07:40:06 +0000 | [diff] [blame] | 768 | #define CONFIG_SYS_FSL_QMAN_V3 /* QMAN version 3 */ |
York Sun | 34e026f | 2014-03-27 17:54:47 -0700 | [diff] [blame] | 769 | #ifdef CONFIG_SYS_FSL_DDR4 |
| 770 | #define CONFIG_SYS_FSL_DDRC_GEN4 |
| 771 | #endif |
Prabhakar Kushwaha | 1d384ec | 2013-09-03 11:19:54 +0530 | [diff] [blame] | 772 | #if defined(CONFIG_PPC_T1040) || defined(CONFIG_PPC_T1042) |
York Sun | 5f208d1 | 2013-03-25 07:40:06 +0000 | [diff] [blame] | 773 | #define CONFIG_MAX_CPUS 4 |
Prabhakar Kushwaha | 1d384ec | 2013-09-03 11:19:54 +0530 | [diff] [blame] | 774 | #elif defined(CONFIG_PPC_T1020) || defined(CONFIG_PPC_T1022) |
| 775 | #define CONFIG_MAX_CPUS 2 |
| 776 | #endif |
| 777 | #define CONFIG_SYS_FSL_NUM_CC_PLLS 2 |
Prabhakar Kushwaha | ce746fe | 2013-09-03 11:20:15 +0530 | [diff] [blame] | 778 | #define CONFIG_SYS_FSL_CLUSTER_CLOCKS { 1, 1, 1, 1 } |
York Sun | 5f208d1 | 2013-03-25 07:40:06 +0000 | [diff] [blame] | 779 | #define CONFIG_SYS_FSL_NUM_LAWS 16 |
Prabhakar Kushwaha | 1d384ec | 2013-09-03 11:19:54 +0530 | [diff] [blame] | 780 | #define CONFIG_SYS_FSL_SRDS_1 |
| 781 | #define CONFIG_SYS_FSL_SEC_COMPAT 5 |
York Sun | 5f208d1 | 2013-03-25 07:40:06 +0000 | [diff] [blame] | 782 | #define CONFIG_SYS_NUM_FMAN 1 |
| 783 | #define CONFIG_SYS_NUM_FM1_DTSEC 5 |
| 784 | #define CONFIG_NUM_DDR_CONTROLLERS 1 |
ramneek mehresh | f1810d8 | 2013-10-18 17:40:17 +0530 | [diff] [blame] | 785 | #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 |
Prabhakar Kushwaha | ce746fe | 2013-09-03 11:20:15 +0530 | [diff] [blame] | 786 | #define CONFIG_PME_PLAT_CLK_DIV 2 |
| 787 | #define CONFIG_SYS_PME_CLK CONFIG_PME_PLAT_CLK_DIV |
Prabhakar Kushwaha | 1d384ec | 2013-09-03 11:19:54 +0530 | [diff] [blame] | 788 | #define CONFIG_SYS_FSL_DDR_VER FSL_DDR_VER_5_0 |
| 789 | #define CONFIG_SYS_FSL_IFC_BANK_COUNT 8 |
Prabhakar Kushwaha | 9f074e6 | 2014-10-29 22:33:09 +0530 | [diff] [blame] | 790 | #define CONFIG_SYS_FSL_ERRATUM_A008044 |
York Sun | 5f208d1 | 2013-03-25 07:40:06 +0000 | [diff] [blame] | 791 | #define CONFIG_SYS_FMAN_V3 |
Prabhakar Kushwaha | ce746fe | 2013-09-03 11:20:15 +0530 | [diff] [blame] | 792 | #define CONFIG_FM_PLAT_CLK_DIV 1 |
| 793 | #define CONFIG_SYS_FM1_CLK CONFIG_FM_PLAT_CLK_DIV |
Yangbo Lu | 2d9ca2c | 2015-04-22 13:57:40 +0800 | [diff] [blame] | 794 | #define CONFIG_SYS_SDHC_CLK 0/* Select SDHC CLK begining from PLL1 |
| 795 | per rcw field value */ |
| 796 | #define CONFIG_SYS_SDHC_CLK_2_PLL /* Select SDHC CLK from 2 PLLs */ |
Prabhakar Kushwaha | 1d384ec | 2013-09-03 11:19:54 +0530 | [diff] [blame] | 797 | #define CONFIG_SYS_FM_MURAM_SIZE 0x30000 |
Priyanka Jain | b135991 | 2013-12-17 14:25:52 +0530 | [diff] [blame] | 798 | #define CONFIG_SYS_FSL_SINGLE_SOURCE_CLK |
Prabhakar Kushwaha | e03c76c | 2013-12-11 12:49:13 +0530 | [diff] [blame] | 799 | #define CONFIG_SYS_FSL_TBCLK_DIV 16 |
York Sun | 5f208d1 | 2013-03-25 07:40:06 +0000 | [diff] [blame] | 800 | #define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v2.4" |
Nikhil Badola | a4f7cba | 2014-01-27 15:21:58 +0530 | [diff] [blame] | 801 | #define CONFIG_SYS_FSL_USB_DUAL_PHY_ENABLE |
York Sun | 5f208d1 | 2013-03-25 07:40:06 +0000 | [diff] [blame] | 802 | #define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY |
Suresh Gupta | 9c641a8 | 2014-02-26 14:29:12 +0530 | [diff] [blame] | 803 | #define CONFIG_SYS_FSL_ERRATUM_A006261 |
York Sun | 5f208d1 | 2013-03-25 07:40:06 +0000 | [diff] [blame] | 804 | #define CONFIG_SYS_CCSRBAR_DEFAULT 0xfe000000 |
Haijun.Zhang | 1336e2d | 2014-03-18 17:04:23 +0800 | [diff] [blame] | 805 | #define CONFIG_SYS_FSL_ERRATUM_ESDHC111 |
| 806 | #define ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE |
Zhao Qiang | 2a44efe | 2014-03-21 16:21:45 +0800 | [diff] [blame] | 807 | #define QE_MURAM_SIZE 0x6000UL |
| 808 | #define MAX_QE_RISC 1 |
| 809 | #define QE_NUM_OF_SNUM 28 |
gaurav rana | e622d9e | 2015-03-26 15:52:47 +0530 | [diff] [blame] | 810 | #define CONFIG_SYS_FSL_SFP_VER_3_0 |
Shengzhou Liu | a46b185 | 2015-11-20 15:52:04 +0800 | [diff] [blame] | 811 | #define CONFIG_SYS_FSL_ERRATUM_A008378 |
Shengzhou Liu | a994b3d | 2015-12-16 16:45:41 +0800 | [diff] [blame] | 812 | #define CONFIG_SYS_FSL_ERRATUM_A009663 |
York Sun | 5f208d1 | 2013-03-25 07:40:06 +0000 | [diff] [blame] | 813 | |
Shengzhou Liu | f605079 | 2014-11-24 17:11:54 +0800 | [diff] [blame] | 814 | #elif defined(CONFIG_PPC_T1024) || defined(CONFIG_PPC_T1023) ||\ |
| 815 | defined(CONFIG_PPC_T1014) || defined(CONFIG_PPC_T1013) |
| 816 | #define CONFIG_E5500 |
| 817 | #define CONFIG_FSL_CORENET /* Freescale CoreNet platform */ |
| 818 | #define CONFIG_SYS_FSL_QORIQ_CHASSIS2 /* Freescale Chassis generation 2 */ |
| 819 | #define CONFIG_SYS_FSL_CORES_PER_CLUSTER 1 |
| 820 | #define CONFIG_SYS_FSL_QMAN_V3 /* QMAN version 3 */ |
| 821 | #define CONFIG_SYS_FMAN_V3 |
| 822 | #ifdef CONFIG_SYS_FSL_DDR4 |
| 823 | #define CONFIG_SYS_FSL_DDRC_GEN4 |
| 824 | #endif |
| 825 | #if defined(CONFIG_PPC_T1024) || defined(CONFIG_PPC_T1023) |
| 826 | #define CONFIG_MAX_CPUS 2 |
| 827 | #elif defined(CONFIG_PPC_T1014) || defined(CONFIG_PPC_T1013) |
| 828 | #define CONFIG_MAX_CPUS 1 |
| 829 | #endif |
| 830 | #define CONFIG_SYS_FSL_NUM_CC_PLL 2 |
| 831 | #define CONFIG_SYS_FSL_CLUSTER_CLOCKS { 1, 1, 1, 1 } |
Shengzhou Liu | f605079 | 2014-11-24 17:11:54 +0800 | [diff] [blame] | 832 | #define CONFIG_SYS_FSL_NUM_LAWS 16 |
| 833 | #define CONFIG_SYS_FSL_SRDS_1 |
| 834 | #define CONFIG_SYS_FSL_SEC_COMPAT 5 |
| 835 | #define CONFIG_SYS_NUM_FMAN 1 |
| 836 | #define CONFIG_SYS_NUM_FM1_DTSEC 4 |
| 837 | #define CONFIG_SYS_NUM_FM1_10GEC 1 |
Shengzhou Liu | cc19c25 | 2014-11-24 17:11:57 +0800 | [diff] [blame] | 838 | #define CONFIG_FSL_FM_10GEC_REGULAR_NOTATION |
Shengzhou Liu | f605079 | 2014-11-24 17:11:54 +0800 | [diff] [blame] | 839 | #define CONFIG_NUM_DDR_CONTROLLERS 1 |
| 840 | #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 |
| 841 | #define CONFIG_SYS_FSL_DDR_VER FSL_DDR_VER_5_0 |
| 842 | #define CONFIG_SYS_FSL_IFC_BANK_COUNT 8 |
| 843 | #define CONFIG_SYS_FM1_CLK 0 |
Yangbo Lu | 2d9ca2c | 2015-04-22 13:57:40 +0800 | [diff] [blame] | 844 | #define CONFIG_SYS_SDHC_CLK 0/* Select SDHC CLK begining from PLL1 |
| 845 | per rcw field value */ |
Shengzhou Liu | f605079 | 2014-11-24 17:11:54 +0800 | [diff] [blame] | 846 | #define CONFIG_QBMAN_CLK_DIV 1 |
| 847 | #define CONFIG_SYS_FM_MURAM_SIZE 0x30000 |
| 848 | #define CONFIG_SYS_FSL_SINGLE_SOURCE_CLK |
| 849 | #define CONFIG_SYS_FSL_TBCLK_DIV 16 |
| 850 | #define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v2.4" |
| 851 | #define CONFIG_SYS_FSL_USB_DUAL_PHY_ENABLE |
| 852 | #define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY |
| 853 | #define CONFIG_SYS_CCSRBAR_DEFAULT 0xfe000000 |
| 854 | #define CONFIG_SYS_FSL_ERRATUM_ESDHC111 |
| 855 | #define ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE |
| 856 | #define QE_MURAM_SIZE 0x6000UL |
| 857 | #define MAX_QE_RISC 1 |
| 858 | #define QE_NUM_OF_SNUM 28 |
| 859 | #define CONFIG_SYS_FSL_SFP_VER_3_0 |
Shengzhou Liu | a46b185 | 2015-11-20 15:52:04 +0800 | [diff] [blame] | 860 | #define CONFIG_SYS_FSL_ERRATUM_A008378 |
Shengzhou Liu | a994b3d | 2015-12-16 16:45:41 +0800 | [diff] [blame] | 861 | #define CONFIG_SYS_FSL_ERRATUM_A009663 |
Shengzhou Liu | f605079 | 2014-11-24 17:11:54 +0800 | [diff] [blame] | 862 | |
Shengzhou Liu | 629d6b3 | 2013-11-22 17:39:10 +0800 | [diff] [blame] | 863 | #elif defined(CONFIG_PPC_T2080) || defined(CONFIG_PPC_T2081) |
| 864 | #define CONFIG_E6500 |
| 865 | #define CONFIG_SYS_PPC64 /* 64-bit core */ |
| 866 | #define CONFIG_FSL_CORENET /* Freescale CoreNet platform */ |
| 867 | #define CONFIG_SYS_FSL_QORIQ_CHASSIS2 /* Freescale Chassis generation 2 */ |
| 868 | #define CONFIG_SYS_FSL_CORES_PER_CLUSTER 4 |
| 869 | #define CONFIG_SYS_FSL_NUM_CC_PLLS 2 |
| 870 | #define CONFIG_SYS_FSL_QMAN_V3 |
| 871 | #define CONFIG_MAX_CPUS 4 |
| 872 | #define CONFIG_SYS_FSL_NUM_LAWS 32 |
| 873 | #define CONFIG_SYS_FSL_SEC_COMPAT 4 |
| 874 | #define CONFIG_SYS_NUM_FMAN 1 |
| 875 | #define CONFIG_SYS_FSL_CLUSTER_CLOCKS { 1, 4, 4, 4 } |
| 876 | #define CONFIG_SYS_FSL_SRDS_1 |
| 877 | #define CONFIG_SYS_FSL_PCI_VER_3_X |
| 878 | #if defined(CONFIG_PPC_T2080) |
| 879 | #define CONFIG_SYS_NUM_FM1_DTSEC 8 |
| 880 | #define CONFIG_SYS_NUM_FM1_10GEC 4 |
| 881 | #define CONFIG_SYS_FSL_SRDS_2 |
| 882 | #define CONFIG_SYS_FSL_SRIO_LIODN |
| 883 | #define CONFIG_SYS_FSL_SRIO_MAX_PORTS 2 |
| 884 | #define CONFIG_SYS_FSL_SRIO_OB_WIN_NUM 9 |
| 885 | #define CONFIG_SYS_FSL_SRIO_IB_WIN_NUM 5 |
| 886 | #elif defined(CONFIG_PPC_T2081) |
| 887 | #define CONFIG_SYS_NUM_FM1_DTSEC 6 |
| 888 | #define CONFIG_SYS_NUM_FM1_10GEC 2 |
| 889 | #endif |
Shengzhou Liu | 2ffa96d | 2013-12-18 10:27:55 +0800 | [diff] [blame] | 890 | #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 |
Shengzhou Liu | 629d6b3 | 2013-11-22 17:39:10 +0800 | [diff] [blame] | 891 | #define CONFIG_NUM_DDR_CONTROLLERS 1 |
| 892 | #define CONFIG_PME_PLAT_CLK_DIV 1 |
| 893 | #define CONFIG_SYS_PME_CLK CONFIG_PME_PLAT_CLK_DIV |
| 894 | #define CONFIG_SYS_FM1_CLK 0 |
Yangbo Lu | 2d9ca2c | 2015-04-22 13:57:40 +0800 | [diff] [blame] | 895 | #define CONFIG_SYS_SDHC_CLK 1/* Select SDHC CLK begining from PLL2 |
| 896 | per rcw field value */ |
| 897 | #define CONFIG_SYS_SDHC_CLK_2_PLL /* Select SDHC CLK from 2 PLLs */ |
Shengzhou Liu | 629d6b3 | 2013-11-22 17:39:10 +0800 | [diff] [blame] | 898 | #define CONFIG_SYS_FSL_DDR_VER FSL_DDR_VER_4_7 |
| 899 | #define CONFIG_SYS_FSL_IFC_BANK_COUNT 8 |
| 900 | #define CONFIG_SYS_FMAN_V3 |
| 901 | #define CONFIG_SYS_FM_MURAM_SIZE 0x28000 |
| 902 | #define CONFIG_SYS_FSL_TBCLK_DIV 16 |
| 903 | #define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v3.0" |
| 904 | #define CONFIG_SYS_FSL_USB_DUAL_PHY_ENABLE |
| 905 | #define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY |
York Sun | c3678b0 | 2014-03-28 15:07:27 -0700 | [diff] [blame] | 906 | #define CONFIG_SYS_FSL_ERRATUM_A007212 |
Shengzhou Liu | 629d6b3 | 2013-11-22 17:39:10 +0800 | [diff] [blame] | 907 | #define CONFIG_SYS_CCSRBAR_DEFAULT 0xfe000000 |
| 908 | #define CONFIG_SYS_FSL_SFP_VER_3_0 |
| 909 | #define CONFIG_SYS_FSL_ISBC_VER 2 |
Haijun.Zhang | 1336e2d | 2014-03-18 17:04:23 +0800 | [diff] [blame] | 910 | #define CONFIG_SYS_FSL_ERRATUM_ESDHC111 |
Shengzhou Liu | c665c47 | 2014-04-24 11:10:09 +0800 | [diff] [blame] | 911 | #define CONFIG_SYS_FSL_ERRATUM_A006261 |
| 912 | #define CONFIG_SYS_FSL_ERRATUM_A006593 |
Shaveta Leekha | b6808cd | 2014-05-28 14:18:55 +0530 | [diff] [blame] | 913 | #define CONFIG_SYS_FSL_ERRATUM_A007186 |
Shengzhou Liu | c665c47 | 2014-04-24 11:10:09 +0800 | [diff] [blame] | 914 | #define CONFIG_SYS_FSL_ERRATUM_A006379 |
Haijun.Zhang | 1336e2d | 2014-03-18 17:04:23 +0800 | [diff] [blame] | 915 | #define ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE |
Shaveta Leekha | b6808cd | 2014-05-28 14:18:55 +0530 | [diff] [blame] | 916 | #define CONFIG_SYS_FSL_SFP_VER_3_0 |
Haijun.Zhang | 1336e2d | 2014-03-18 17:04:23 +0800 | [diff] [blame] | 917 | |
Shengzhou Liu | 629d6b3 | 2013-11-22 17:39:10 +0800 | [diff] [blame] | 918 | |
Mingkai Hu | 3b75e98 | 2013-07-04 17:30:36 +0800 | [diff] [blame] | 919 | #elif defined(CONFIG_PPC_C29X) |
| 920 | #define CONFIG_MAX_CPUS 1 |
| 921 | #define CONFIG_FSL_SDHC_V2_3 |
| 922 | #define CONFIG_SYS_FSL_NUM_LAWS 12 |
| 923 | #define CONFIG_SYS_PPC_E500_DEBUG_TLB 3 |
| 924 | #define CONFIG_TSECV2_1 |
| 925 | #define CONFIG_SYS_FSL_SEC_COMPAT 6 |
| 926 | #define CONFIG_SYS_FSL_ERRATUM_ESDHC111 |
| 927 | #define CONFIG_NUM_DDR_CONTROLLERS 1 |
York Sun | 34e026f | 2014-03-27 17:54:47 -0700 | [diff] [blame] | 928 | #define CONFIG_SYS_FSL_DDR_VER FSL_DDR_VER_4_6 |
Mingkai Hu | 3b75e98 | 2013-07-04 17:30:36 +0800 | [diff] [blame] | 929 | #define CONFIG_SYS_FSL_IFC_BANK_COUNT 8 |
| 930 | #define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000 |
York Sun | 954a1a4 | 2013-08-20 15:09:43 -0700 | [diff] [blame] | 931 | #define CONFIG_SYS_FSL_ERRATUM_A005125 |
Alex Porosanu | 404bf45 | 2016-04-29 15:17:59 +0300 | [diff] [blame] | 932 | #define CONFIG_SYS_FSL_MAX_NUM_OF_SEC 3 |
| 933 | #define CONFIG_SYS_FSL_SEC_IDX_OFFSET 0x20000 |
Mingkai Hu | 3b75e98 | 2013-07-04 17:30:36 +0800 | [diff] [blame] | 934 | |
Alexander Graf | fa08d39 | 2014-04-11 17:09:45 +0200 | [diff] [blame] | 935 | #elif defined(CONFIG_QEMU_E500) |
| 936 | #define CONFIG_MAX_CPUS 1 |
| 937 | #define CONFIG_SYS_CCSRBAR_DEFAULT 0xe0000000 |
| 938 | |
Kumar Gala | 243be8e | 2011-01-19 03:05:26 -0600 | [diff] [blame] | 939 | #else |
| 940 | #error Processor type not defined for this platform |
| 941 | #endif |
| 942 | |
Timur Tabi | e46fedf | 2011-08-04 18:03:41 -0500 | [diff] [blame] | 943 | #ifndef CONFIG_SYS_CCSRBAR_DEFAULT |
| 944 | #error "CONFIG_SYS_CCSRBAR_DEFAULT is not defined for this platform." |
| 945 | #endif |
| 946 | |
York Sun | f698143 | 2013-03-25 07:40:07 +0000 | [diff] [blame] | 947 | #ifdef CONFIG_E6500 |
| 948 | #define CONFIG_SYS_FSL_THREADS_PER_CORE 2 |
| 949 | #else |
| 950 | #define CONFIG_SYS_FSL_THREADS_PER_CORE 1 |
| 951 | #endif |
| 952 | |
York Sun | 5614e71 | 2013-09-30 09:22:09 -0700 | [diff] [blame] | 953 | #if !defined(CONFIG_SYS_FSL_DDRC_GEN1) && \ |
| 954 | !defined(CONFIG_SYS_FSL_DDRC_GEN2) && \ |
York Sun | 34e026f | 2014-03-27 17:54:47 -0700 | [diff] [blame] | 955 | !defined(CONFIG_SYS_FSL_DDRC_GEN3) && \ |
| 956 | !defined(CONFIG_SYS_FSL_DDRC_GEN4) |
York Sun | 5614e71 | 2013-09-30 09:22:09 -0700 | [diff] [blame] | 957 | #define CONFIG_SYS_FSL_DDRC_GEN3 |
| 958 | #endif |
| 959 | |
Alex Porosanu | 404bf45 | 2016-04-29 15:17:59 +0300 | [diff] [blame] | 960 | #if !defined(CONFIG_PPC_C29X) |
| 961 | #define CONFIG_SYS_FSL_MAX_NUM_OF_SEC 1 |
| 962 | #endif |
| 963 | |
Kumar Gala | 243be8e | 2011-01-19 03:05:26 -0600 | [diff] [blame] | 964 | #endif /* _ASM_MPC85xx_CONFIG_H_ */ |