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Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
wdenkc6097192002-11-03 00:24:07 +00002/*
Heiko Schocherea818db2013-01-29 08:53:15 +01003 * (C) Copyright 2009
4 * Heiko Schocher, DENX Software Engineering, hs@denx.de.
5 * Changes for multibus/multiadapter I2C support.
6 *
wdenkc6097192002-11-03 00:24:07 +00007 * (C) Copyright 2001, 2002
8 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
9 *
wdenkc6097192002-11-03 00:24:07 +000010 * This has been changed substantially by Gerald Van Baren, Custom IDEAS,
11 * vanbaren@cideas.com. It was heavily influenced by LiMon, written by
12 * Neil Russell.
Simon Glass28527092016-11-23 06:34:44 -070013 *
14 * NOTE: This driver should be converted to driver model before June 2017.
Heinrich Schuchardt2799a692020-02-25 21:35:39 +010015 * Please see doc/driver-model/i2c-howto.rst for instructions.
wdenkc6097192002-11-03 00:24:07 +000016 */
17
18#include <common.h>
Ryan Mallonf3100ff2011-01-27 08:54:15 +130019#if defined(CONFIG_AT91FAMILY)
wdenk9d5028c2004-11-21 00:06:33 +000020#include <asm/io.h>
21#include <asm/arch/hardware.h>
Jens Scharsig0cf0b932010-02-03 22:46:58 +010022#include <asm/arch/at91_pio.h>
Andreas Bießmanncb96a0a2013-10-30 15:18:18 +010023#ifdef CONFIG_ATMEL_LEGACY
Daniel Gorsulowski4e574c42009-05-18 13:20:54 +020024#include <asm/arch/gpio.h>
Jens Scharsig0cf0b932010-02-03 22:46:58 +010025#endif
Daniel Gorsulowski4e574c42009-05-18 13:20:54 +020026#endif
wdenkc6097192002-11-03 00:24:07 +000027#include <i2c.h>
Simon Glass401d1c42020-10-30 21:38:53 -060028#include <asm/global_data.h>
Simon Glassc05ed002020-05-10 11:40:11 -060029#include <linux/delay.h>
wdenkc6097192002-11-03 00:24:07 +000030
Mike Frysinger793b5722010-07-21 13:38:02 -040031#if defined(CONFIG_SOFT_I2C_GPIO_SCL)
32# include <asm/gpio.h>
33
34# ifndef I2C_GPIO_SYNC
35# define I2C_GPIO_SYNC
36# endif
37
38# ifndef I2C_INIT
39# define I2C_INIT \
40 do { \
41 gpio_request(CONFIG_SOFT_I2C_GPIO_SCL, "soft_i2c"); \
42 gpio_request(CONFIG_SOFT_I2C_GPIO_SDA, "soft_i2c"); \
43 } while (0)
44# endif
45
46# ifndef I2C_ACTIVE
47# define I2C_ACTIVE do { } while (0)
48# endif
49
50# ifndef I2C_TRISTATE
51# define I2C_TRISTATE do { } while (0)
52# endif
53
54# ifndef I2C_READ
55# define I2C_READ gpio_get_value(CONFIG_SOFT_I2C_GPIO_SDA)
56# endif
57
58# ifndef I2C_SDA
59# define I2C_SDA(bit) \
60 do { \
61 if (bit) \
62 gpio_direction_input(CONFIG_SOFT_I2C_GPIO_SDA); \
63 else \
64 gpio_direction_output(CONFIG_SOFT_I2C_GPIO_SDA, 0); \
65 I2C_GPIO_SYNC; \
66 } while (0)
67# endif
68
69# ifndef I2C_SCL
70# define I2C_SCL(bit) \
71 do { \
72 gpio_direction_output(CONFIG_SOFT_I2C_GPIO_SCL, bit); \
73 I2C_GPIO_SYNC; \
74 } while (0)
75# endif
76
77# ifndef I2C_DELAY
78# define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */
79# endif
80
81#endif
82
wdenkc6097192002-11-03 00:24:07 +000083/* #define DEBUG_I2C */
84
Wolfgang Denkd87080b2006-03-31 18:32:53 +020085DECLARE_GLOBAL_DATA_PTR;
Heiko Schocherea818db2013-01-29 08:53:15 +010086
87#ifndef I2C_SOFT_DECLARATIONS
Heiko Schocherea818db2013-01-29 08:53:15 +010088# define I2C_SOFT_DECLARATIONS
Heiko Schocherea818db2013-01-29 08:53:15 +010089#endif
90
Marek Vasut90f002a2013-08-01 12:32:20 +020091#if !defined(CONFIG_SYS_I2C_SOFT_SPEED)
92#define CONFIG_SYS_I2C_SOFT_SPEED CONFIG_SYS_I2C_SPEED
Heiko Schocherea818db2013-01-29 08:53:15 +010093#endif
Marek Vasut90f002a2013-08-01 12:32:20 +020094#if !defined(CONFIG_SYS_I2C_SOFT_SLAVE)
95#define CONFIG_SYS_I2C_SOFT_SLAVE CONFIG_SYS_I2C_SLAVE
Wolfgang Denkd87080b2006-03-31 18:32:53 +020096#endif
97
wdenkc6097192002-11-03 00:24:07 +000098/*-----------------------------------------------------------------------
99 * Definitions
100 */
wdenkc6097192002-11-03 00:24:07 +0000101#define RETRIES 0
102
wdenkc6097192002-11-03 00:24:07 +0000103#define I2C_ACK 0 /* PD_SDA level to ack a byte */
104#define I2C_NOACK 1 /* PD_SDA level to noack a byte */
105
106
107#ifdef DEBUG_I2C
108#define PRINTD(fmt,args...) do { \
wdenkc6097192002-11-03 00:24:07 +0000109 printf (fmt ,##args); \
110 } while (0)
111#else
112#define PRINTD(fmt,args...)
113#endif
114
115/*-----------------------------------------------------------------------
116 * Local functions
117 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200118#if !defined(CONFIG_SYS_I2C_INIT_BOARD)
wdenkc6097192002-11-03 00:24:07 +0000119static void send_reset (void);
Heiko Schocher4ca107e2008-10-15 09:38:38 +0200120#endif
wdenkc6097192002-11-03 00:24:07 +0000121static void send_start (void);
122static void send_stop (void);
123static void send_ack (int);
124static int write_byte (uchar byte);
125static uchar read_byte (int);
126
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200127#if !defined(CONFIG_SYS_I2C_INIT_BOARD)
wdenkc6097192002-11-03 00:24:07 +0000128/*-----------------------------------------------------------------------
129 * Send a reset sequence consisting of 9 clocks with the data signal high
130 * to clock any confused device back into an idle state. Also send a
131 * <stop> at the end of the sequence for belts & suspenders.
132 */
133static void send_reset(void)
134{
Heiko Schocher98aed372008-10-15 09:35:26 +0200135 I2C_SOFT_DECLARATIONS /* intentional without ';' */
wdenkc6097192002-11-03 00:24:07 +0000136 int j;
137
wdenk60fbe252003-04-08 23:25:21 +0000138 I2C_SCL(1);
wdenkc6097192002-11-03 00:24:07 +0000139 I2C_SDA(1);
wdenk60fbe252003-04-08 23:25:21 +0000140#ifdef I2C_INIT
141 I2C_INIT;
142#endif
143 I2C_TRISTATE;
wdenkc6097192002-11-03 00:24:07 +0000144 for(j = 0; j < 9; j++) {
145 I2C_SCL(0);
146 I2C_DELAY;
147 I2C_DELAY;
148 I2C_SCL(1);
149 I2C_DELAY;
150 I2C_DELAY;
151 }
152 send_stop();
153 I2C_TRISTATE;
154}
Heiko Schocher4ca107e2008-10-15 09:38:38 +0200155#endif
wdenkc6097192002-11-03 00:24:07 +0000156
157/*-----------------------------------------------------------------------
158 * START: High -> Low on SDA while SCL is High
159 */
160static void send_start(void)
161{
Heiko Schocher98aed372008-10-15 09:35:26 +0200162 I2C_SOFT_DECLARATIONS /* intentional without ';' */
wdenkc6097192002-11-03 00:24:07 +0000163
164 I2C_DELAY;
165 I2C_SDA(1);
166 I2C_ACTIVE;
167 I2C_DELAY;
168 I2C_SCL(1);
169 I2C_DELAY;
170 I2C_SDA(0);
171 I2C_DELAY;
172}
173
174/*-----------------------------------------------------------------------
175 * STOP: Low -> High on SDA while SCL is High
176 */
177static void send_stop(void)
178{
Heiko Schocher98aed372008-10-15 09:35:26 +0200179 I2C_SOFT_DECLARATIONS /* intentional without ';' */
wdenkc6097192002-11-03 00:24:07 +0000180
181 I2C_SCL(0);
182 I2C_DELAY;
183 I2C_SDA(0);
184 I2C_ACTIVE;
185 I2C_DELAY;
186 I2C_SCL(1);
187 I2C_DELAY;
188 I2C_SDA(1);
189 I2C_DELAY;
190 I2C_TRISTATE;
191}
192
wdenkc6097192002-11-03 00:24:07 +0000193/*-----------------------------------------------------------------------
194 * ack should be I2C_ACK or I2C_NOACK
195 */
196static void send_ack(int ack)
197{
Heiko Schocher98aed372008-10-15 09:35:26 +0200198 I2C_SOFT_DECLARATIONS /* intentional without ';' */
wdenkc6097192002-11-03 00:24:07 +0000199
wdenkc6097192002-11-03 00:24:07 +0000200 I2C_SCL(0);
201 I2C_DELAY;
wdenkc6097192002-11-03 00:24:07 +0000202 I2C_ACTIVE;
Wolfgang Denkc15f80e2006-03-13 00:50:48 +0100203 I2C_SDA(ack);
wdenkc6097192002-11-03 00:24:07 +0000204 I2C_DELAY;
205 I2C_SCL(1);
206 I2C_DELAY;
207 I2C_DELAY;
208 I2C_SCL(0);
209 I2C_DELAY;
210}
211
wdenkc6097192002-11-03 00:24:07 +0000212/*-----------------------------------------------------------------------
213 * Send 8 bits and look for an acknowledgement.
214 */
215static int write_byte(uchar data)
216{
Heiko Schocher98aed372008-10-15 09:35:26 +0200217 I2C_SOFT_DECLARATIONS /* intentional without ';' */
wdenkc6097192002-11-03 00:24:07 +0000218 int j;
219 int nack;
220
221 I2C_ACTIVE;
222 for(j = 0; j < 8; j++) {
223 I2C_SCL(0);
224 I2C_DELAY;
225 I2C_SDA(data & 0x80);
226 I2C_DELAY;
227 I2C_SCL(1);
228 I2C_DELAY;
229 I2C_DELAY;
230
231 data <<= 1;
232 }
233
234 /*
235 * Look for an <ACK>(negative logic) and return it.
236 */
237 I2C_SCL(0);
238 I2C_DELAY;
239 I2C_SDA(1);
240 I2C_TRISTATE;
241 I2C_DELAY;
242 I2C_SCL(1);
243 I2C_DELAY;
244 I2C_DELAY;
245 nack = I2C_READ;
246 I2C_SCL(0);
247 I2C_DELAY;
248 I2C_ACTIVE;
249
250 return(nack); /* not a nack is an ack */
251}
252
wdenkc6097192002-11-03 00:24:07 +0000253/*-----------------------------------------------------------------------
254 * if ack == I2C_ACK, ACK the byte so can continue reading, else
255 * send I2C_NOACK to end the read.
256 */
257static uchar read_byte(int ack)
258{
Heiko Schocher98aed372008-10-15 09:35:26 +0200259 I2C_SOFT_DECLARATIONS /* intentional without ';' */
wdenkc6097192002-11-03 00:24:07 +0000260 int data;
261 int j;
262
263 /*
264 * Read 8 bits, MSB first.
265 */
266 I2C_TRISTATE;
Haavard Skinnemoen110e0062008-05-16 11:08:11 +0200267 I2C_SDA(1);
wdenkc6097192002-11-03 00:24:07 +0000268 data = 0;
269 for(j = 0; j < 8; j++) {
270 I2C_SCL(0);
271 I2C_DELAY;
272 I2C_SCL(1);
273 I2C_DELAY;
274 data <<= 1;
275 data |= I2C_READ;
276 I2C_DELAY;
277 }
278 send_ack(ack);
279
280 return(data);
281}
282
wdenkc6097192002-11-03 00:24:07 +0000283/*-----------------------------------------------------------------------
284 * Initialization
285 */
Heiko Schocherea818db2013-01-29 08:53:15 +0100286static void soft_i2c_init(struct i2c_adapter *adap, int speed, int slaveaddr)
wdenkc6097192002-11-03 00:24:07 +0000287{
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200288#if defined(CONFIG_SYS_I2C_INIT_BOARD)
Heiko Schocher4ca107e2008-10-15 09:38:38 +0200289 /* call board specific i2c bus reset routine before accessing the */
290 /* environment, which might be in a chip on that bus. For details */
291 /* about this problem see doc/I2C_Edge_Conditions. */
292 i2c_init_board();
293#else
wdenkc6097192002-11-03 00:24:07 +0000294 /*
wdenk8bde7f72003-06-27 21:31:46 +0000295 * WARNING: Do NOT save speed in a static variable: if the
296 * I2C routines are called before RAM is initialized (to read
297 * the DIMM SPD, for instance), RAM won't be usable and your
298 * system will crash.
wdenkc6097192002-11-03 00:24:07 +0000299 */
300 send_reset ();
Heiko Schocher4ca107e2008-10-15 09:38:38 +0200301#endif
wdenkc6097192002-11-03 00:24:07 +0000302}
303
304/*-----------------------------------------------------------------------
305 * Probe to see if a chip is present. Also good for checking for the
306 * completion of EEPROM writes since the chip stops responding until
307 * the write completes (typically 10mSec).
308 */
Heiko Schocherea818db2013-01-29 08:53:15 +0100309static int soft_i2c_probe(struct i2c_adapter *adap, uint8_t addr)
wdenkc6097192002-11-03 00:24:07 +0000310{
311 int rc;
312
Wolfgang Denk82d716f2006-03-12 01:30:45 +0100313 /*
Wolfgang Denk8e7b7032006-03-12 02:55:22 +0100314 * perform 1 byte write transaction with just address byte
Wolfgang Denk82d716f2006-03-12 01:30:45 +0100315 * (fake write)
316 */
wdenkc6097192002-11-03 00:24:07 +0000317 send_start();
wdenk6aff3112002-12-17 01:51:00 +0000318 rc = write_byte ((addr << 1) | 0);
wdenkc6097192002-11-03 00:24:07 +0000319 send_stop();
320
321 return (rc ? 1 : 0);
322}
323
324/*-----------------------------------------------------------------------
325 * Read bytes
326 */
Heiko Schocherea818db2013-01-29 08:53:15 +0100327static int soft_i2c_read(struct i2c_adapter *adap, uchar chip, uint addr,
328 int alen, uchar *buffer, int len)
wdenkc6097192002-11-03 00:24:07 +0000329{
330 int shift;
331 PRINTD("i2c_read: chip %02X addr %02X alen %d buffer %p len %d\n",
332 chip, addr, alen, buffer, len);
333
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200334#ifdef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
wdenkc6097192002-11-03 00:24:07 +0000335 /*
336 * EEPROM chips that implement "address overflow" are ones
337 * like Catalyst 24WC04/08/16 which has 9/10/11 bits of
338 * address and the extra bits end up in the "chip address"
339 * bit slots. This makes a 24WC08 (1Kbyte) chip look like
340 * four 256 byte chips.
341 *
342 * Note that we consider the length of the address field to
343 * still be one byte because the extra address bits are
344 * hidden in the chip address.
345 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200346 chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW);
wdenkc6097192002-11-03 00:24:07 +0000347
348 PRINTD("i2c_read: fix addr_overflow: chip %02X addr %02X\n",
349 chip, addr);
350#endif
351
352 /*
353 * Do the addressing portion of a write cycle to set the
354 * chip's address pointer. If the address length is zero,
355 * don't do the normal write cycle to set the address pointer,
356 * there is no address pointer in this chip.
357 */
358 send_start();
359 if(alen > 0) {
360 if(write_byte(chip << 1)) { /* write cycle */
361 send_stop();
362 PRINTD("i2c_read, no chip responded %02X\n", chip);
363 return(1);
364 }
365 shift = (alen-1) * 8;
366 while(alen-- > 0) {
367 if(write_byte(addr >> shift)) {
368 PRINTD("i2c_read, address not <ACK>ed\n");
369 return(1);
370 }
371 shift -= 8;
372 }
Andrew Dyer2ac69852008-12-29 17:36:01 -0600373
374 /* Some I2C chips need a stop/start sequence here,
375 * other chips don't work with a full stop and need
376 * only a start. Default behaviour is to send the
377 * stop/start sequence.
378 */
379#ifdef CONFIG_SOFT_I2C_READ_REPEATED_START
wdenkc6097192002-11-03 00:24:07 +0000380 send_start();
Andrew Dyer2ac69852008-12-29 17:36:01 -0600381#else
382 send_stop();
383 send_start();
384#endif
wdenkc6097192002-11-03 00:24:07 +0000385 }
386 /*
387 * Send the chip address again, this time for a read cycle.
388 * Then read the data. On the last byte, we do a NACK instead
389 * of an ACK(len == 0) to terminate the read.
390 */
391 write_byte((chip << 1) | 1); /* read cycle */
392 while(len-- > 0) {
393 *buffer++ = read_byte(len == 0);
394 }
395 send_stop();
396 return(0);
397}
398
399/*-----------------------------------------------------------------------
400 * Write bytes
401 */
Heiko Schocherea818db2013-01-29 08:53:15 +0100402static int soft_i2c_write(struct i2c_adapter *adap, uchar chip, uint addr,
403 int alen, uchar *buffer, int len)
wdenkc6097192002-11-03 00:24:07 +0000404{
405 int shift, failures = 0;
406
407 PRINTD("i2c_write: chip %02X addr %02X alen %d buffer %p len %d\n",
408 chip, addr, alen, buffer, len);
409
410 send_start();
411 if(write_byte(chip << 1)) { /* write cycle */
412 send_stop();
413 PRINTD("i2c_write, no chip responded %02X\n", chip);
414 return(1);
415 }
416 shift = (alen-1) * 8;
417 while(alen-- > 0) {
418 if(write_byte(addr >> shift)) {
419 PRINTD("i2c_write, address not <ACK>ed\n");
420 return(1);
421 }
422 shift -= 8;
423 }
424
425 while(len-- > 0) {
426 if(write_byte(*buffer++)) {
427 failures++;
428 }
429 }
430 send_stop();
431 return(failures);
432}
Heiko Schocherea818db2013-01-29 08:53:15 +0100433
434/*
435 * Register soft i2c adapters
436 */
Dirk Eibach37b33252015-10-28 11:46:39 +0100437U_BOOT_I2C_ADAP_COMPLETE(soft00, soft_i2c_init, soft_i2c_probe,
Heiko Schocherea818db2013-01-29 08:53:15 +0100438 soft_i2c_read, soft_i2c_write, NULL,
439 CONFIG_SYS_I2C_SOFT_SPEED, CONFIG_SYS_I2C_SOFT_SLAVE,
440 0)