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wdenkc6097192002-11-03 00:24:07 +00001/*
Heiko Schocherea818db2013-01-29 08:53:15 +01002 * (C) Copyright 2009
3 * Heiko Schocher, DENX Software Engineering, hs@denx.de.
4 * Changes for multibus/multiadapter I2C support.
5 *
wdenkc6097192002-11-03 00:24:07 +00006 * (C) Copyright 2001, 2002
7 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
8 *
9 * See file CREDITS for list of people who contributed to this
10 * project.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 * MA 02111-1307 USA
26 *
27 * This has been changed substantially by Gerald Van Baren, Custom IDEAS,
28 * vanbaren@cideas.com. It was heavily influenced by LiMon, written by
29 * Neil Russell.
30 */
31
32#include <common.h>
33#ifdef CONFIG_MPC8260 /* only valid for MPC8260 */
34#include <ioports.h>
Heiko Schochera21ca952008-10-17 13:52:51 +020035#include <asm/io.h>
wdenkc6097192002-11-03 00:24:07 +000036#endif
Andreas Bießmanneabd5d82011-02-10 00:30:04 +000037#if defined(CONFIG_AVR32)
38#include <asm/arch/portmux.h>
39#endif
Ryan Mallonf3100ff2011-01-27 08:54:15 +130040#if defined(CONFIG_AT91FAMILY)
wdenk9d5028c2004-11-21 00:06:33 +000041#include <asm/io.h>
42#include <asm/arch/hardware.h>
Jens Scharsig0cf0b932010-02-03 22:46:58 +010043#include <asm/arch/at91_pio.h>
44#ifdef CONFIG_AT91_LEGACY
Daniel Gorsulowski4e574c42009-05-18 13:20:54 +020045#include <asm/arch/gpio.h>
Jens Scharsig0cf0b932010-02-03 22:46:58 +010046#endif
Daniel Gorsulowski4e574c42009-05-18 13:20:54 +020047#endif
Wolfgang Denkba94a1b2006-05-30 15:56:48 +020048#ifdef CONFIG_IXP425 /* only valid for IXP425 */
49#include <asm/arch/ixp425.h>
50#endif
Heiko Schocher1b6275d2009-03-12 07:37:34 +010051#if defined(CONFIG_MPC852T) || defined(CONFIG_MPC866)
Heiko Schochera21ca952008-10-17 13:52:51 +020052#include <asm/io.h>
53#endif
wdenkc6097192002-11-03 00:24:07 +000054#include <i2c.h>
55
Mike Frysinger793b5722010-07-21 13:38:02 -040056#if defined(CONFIG_SOFT_I2C_GPIO_SCL)
57# include <asm/gpio.h>
58
59# ifndef I2C_GPIO_SYNC
60# define I2C_GPIO_SYNC
61# endif
62
63# ifndef I2C_INIT
64# define I2C_INIT \
65 do { \
66 gpio_request(CONFIG_SOFT_I2C_GPIO_SCL, "soft_i2c"); \
67 gpio_request(CONFIG_SOFT_I2C_GPIO_SDA, "soft_i2c"); \
68 } while (0)
69# endif
70
71# ifndef I2C_ACTIVE
72# define I2C_ACTIVE do { } while (0)
73# endif
74
75# ifndef I2C_TRISTATE
76# define I2C_TRISTATE do { } while (0)
77# endif
78
79# ifndef I2C_READ
80# define I2C_READ gpio_get_value(CONFIG_SOFT_I2C_GPIO_SDA)
81# endif
82
83# ifndef I2C_SDA
84# define I2C_SDA(bit) \
85 do { \
86 if (bit) \
87 gpio_direction_input(CONFIG_SOFT_I2C_GPIO_SDA); \
88 else \
89 gpio_direction_output(CONFIG_SOFT_I2C_GPIO_SDA, 0); \
90 I2C_GPIO_SYNC; \
91 } while (0)
92# endif
93
94# ifndef I2C_SCL
95# define I2C_SCL(bit) \
96 do { \
97 gpio_direction_output(CONFIG_SOFT_I2C_GPIO_SCL, bit); \
98 I2C_GPIO_SYNC; \
99 } while (0)
100# endif
101
102# ifndef I2C_DELAY
103# define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */
104# endif
105
106#endif
107
wdenkc6097192002-11-03 00:24:07 +0000108/* #define DEBUG_I2C */
109
Wolfgang Denkd87080b2006-03-31 18:32:53 +0200110DECLARE_GLOBAL_DATA_PTR;
Heiko Schocherea818db2013-01-29 08:53:15 +0100111
112#ifndef I2C_SOFT_DECLARATIONS
113# if defined(CONFIG_MPC8260)
114# define I2C_SOFT_DECLARATIONS volatile ioport_t *iop = \
115 ioport_addr((immap_t *)CONFIG_SYS_IMMR, I2C_PORT);
116# elif defined(CONFIG_8xx)
117# define I2C_SOFT_DECLARATIONS volatile immap_t *immr = \
118 (immap_t *)CONFIG_SYS_IMMR;
119# else
120# define I2C_SOFT_DECLARATIONS
121# endif
122#endif
123
124#if !defined(CONFIG_SYS_SOFT_I2C_SPEED)
125#define CONFIG_SYS_SOFT_I2C_SPEED CONFIG_SYS_I2C_SPEED
126#endif
127#if !defined(CONFIG_SYS_SOFT_I2C_SLAVE)
128#define CONFIG_SYS_SOFT_I2C_SLAVE CONFIG_SYS_I2C_SLAVE
Wolfgang Denkd87080b2006-03-31 18:32:53 +0200129#endif
130
wdenkc6097192002-11-03 00:24:07 +0000131/*-----------------------------------------------------------------------
132 * Definitions
133 */
wdenkc6097192002-11-03 00:24:07 +0000134#define RETRIES 0
135
wdenkc6097192002-11-03 00:24:07 +0000136#define I2C_ACK 0 /* PD_SDA level to ack a byte */
137#define I2C_NOACK 1 /* PD_SDA level to noack a byte */
138
139
140#ifdef DEBUG_I2C
141#define PRINTD(fmt,args...) do { \
wdenkc6097192002-11-03 00:24:07 +0000142 printf (fmt ,##args); \
143 } while (0)
144#else
145#define PRINTD(fmt,args...)
146#endif
147
148/*-----------------------------------------------------------------------
149 * Local functions
150 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200151#if !defined(CONFIG_SYS_I2C_INIT_BOARD)
wdenkc6097192002-11-03 00:24:07 +0000152static void send_reset (void);
Heiko Schocher4ca107e2008-10-15 09:38:38 +0200153#endif
wdenkc6097192002-11-03 00:24:07 +0000154static void send_start (void);
155static void send_stop (void);
156static void send_ack (int);
157static int write_byte (uchar byte);
158static uchar read_byte (int);
159
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200160#if !defined(CONFIG_SYS_I2C_INIT_BOARD)
wdenkc6097192002-11-03 00:24:07 +0000161/*-----------------------------------------------------------------------
162 * Send a reset sequence consisting of 9 clocks with the data signal high
163 * to clock any confused device back into an idle state. Also send a
164 * <stop> at the end of the sequence for belts & suspenders.
165 */
166static void send_reset(void)
167{
Heiko Schocher98aed372008-10-15 09:35:26 +0200168 I2C_SOFT_DECLARATIONS /* intentional without ';' */
wdenkc6097192002-11-03 00:24:07 +0000169 int j;
170
wdenk60fbe252003-04-08 23:25:21 +0000171 I2C_SCL(1);
wdenkc6097192002-11-03 00:24:07 +0000172 I2C_SDA(1);
wdenk60fbe252003-04-08 23:25:21 +0000173#ifdef I2C_INIT
174 I2C_INIT;
175#endif
176 I2C_TRISTATE;
wdenkc6097192002-11-03 00:24:07 +0000177 for(j = 0; j < 9; j++) {
178 I2C_SCL(0);
179 I2C_DELAY;
180 I2C_DELAY;
181 I2C_SCL(1);
182 I2C_DELAY;
183 I2C_DELAY;
184 }
185 send_stop();
186 I2C_TRISTATE;
187}
Heiko Schocher4ca107e2008-10-15 09:38:38 +0200188#endif
wdenkc6097192002-11-03 00:24:07 +0000189
190/*-----------------------------------------------------------------------
191 * START: High -> Low on SDA while SCL is High
192 */
193static void send_start(void)
194{
Heiko Schocher98aed372008-10-15 09:35:26 +0200195 I2C_SOFT_DECLARATIONS /* intentional without ';' */
wdenkc6097192002-11-03 00:24:07 +0000196
197 I2C_DELAY;
198 I2C_SDA(1);
199 I2C_ACTIVE;
200 I2C_DELAY;
201 I2C_SCL(1);
202 I2C_DELAY;
203 I2C_SDA(0);
204 I2C_DELAY;
205}
206
207/*-----------------------------------------------------------------------
208 * STOP: Low -> High on SDA while SCL is High
209 */
210static void send_stop(void)
211{
Heiko Schocher98aed372008-10-15 09:35:26 +0200212 I2C_SOFT_DECLARATIONS /* intentional without ';' */
wdenkc6097192002-11-03 00:24:07 +0000213
214 I2C_SCL(0);
215 I2C_DELAY;
216 I2C_SDA(0);
217 I2C_ACTIVE;
218 I2C_DELAY;
219 I2C_SCL(1);
220 I2C_DELAY;
221 I2C_SDA(1);
222 I2C_DELAY;
223 I2C_TRISTATE;
224}
225
wdenkc6097192002-11-03 00:24:07 +0000226/*-----------------------------------------------------------------------
227 * ack should be I2C_ACK or I2C_NOACK
228 */
229static void send_ack(int ack)
230{
Heiko Schocher98aed372008-10-15 09:35:26 +0200231 I2C_SOFT_DECLARATIONS /* intentional without ';' */
wdenkc6097192002-11-03 00:24:07 +0000232
wdenkc6097192002-11-03 00:24:07 +0000233 I2C_SCL(0);
234 I2C_DELAY;
wdenkc6097192002-11-03 00:24:07 +0000235 I2C_ACTIVE;
Wolfgang Denkc15f80e2006-03-13 00:50:48 +0100236 I2C_SDA(ack);
wdenkc6097192002-11-03 00:24:07 +0000237 I2C_DELAY;
238 I2C_SCL(1);
239 I2C_DELAY;
240 I2C_DELAY;
241 I2C_SCL(0);
242 I2C_DELAY;
243}
244
wdenkc6097192002-11-03 00:24:07 +0000245/*-----------------------------------------------------------------------
246 * Send 8 bits and look for an acknowledgement.
247 */
248static int write_byte(uchar data)
249{
Heiko Schocher98aed372008-10-15 09:35:26 +0200250 I2C_SOFT_DECLARATIONS /* intentional without ';' */
wdenkc6097192002-11-03 00:24:07 +0000251 int j;
252 int nack;
253
254 I2C_ACTIVE;
255 for(j = 0; j < 8; j++) {
256 I2C_SCL(0);
257 I2C_DELAY;
258 I2C_SDA(data & 0x80);
259 I2C_DELAY;
260 I2C_SCL(1);
261 I2C_DELAY;
262 I2C_DELAY;
263
264 data <<= 1;
265 }
266
267 /*
268 * Look for an <ACK>(negative logic) and return it.
269 */
270 I2C_SCL(0);
271 I2C_DELAY;
272 I2C_SDA(1);
273 I2C_TRISTATE;
274 I2C_DELAY;
275 I2C_SCL(1);
276 I2C_DELAY;
277 I2C_DELAY;
278 nack = I2C_READ;
279 I2C_SCL(0);
280 I2C_DELAY;
281 I2C_ACTIVE;
282
283 return(nack); /* not a nack is an ack */
284}
285
wdenkc6097192002-11-03 00:24:07 +0000286/*-----------------------------------------------------------------------
287 * if ack == I2C_ACK, ACK the byte so can continue reading, else
288 * send I2C_NOACK to end the read.
289 */
290static uchar read_byte(int ack)
291{
Heiko Schocher98aed372008-10-15 09:35:26 +0200292 I2C_SOFT_DECLARATIONS /* intentional without ';' */
wdenkc6097192002-11-03 00:24:07 +0000293 int data;
294 int j;
295
296 /*
297 * Read 8 bits, MSB first.
298 */
299 I2C_TRISTATE;
Haavard Skinnemoen110e0062008-05-16 11:08:11 +0200300 I2C_SDA(1);
wdenkc6097192002-11-03 00:24:07 +0000301 data = 0;
302 for(j = 0; j < 8; j++) {
303 I2C_SCL(0);
304 I2C_DELAY;
305 I2C_SCL(1);
306 I2C_DELAY;
307 data <<= 1;
308 data |= I2C_READ;
309 I2C_DELAY;
310 }
311 send_ack(ack);
312
313 return(data);
314}
315
wdenkc6097192002-11-03 00:24:07 +0000316/*-----------------------------------------------------------------------
317 * Initialization
318 */
Heiko Schocherea818db2013-01-29 08:53:15 +0100319static void soft_i2c_init(struct i2c_adapter *adap, int speed, int slaveaddr)
wdenkc6097192002-11-03 00:24:07 +0000320{
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200321#if defined(CONFIG_SYS_I2C_INIT_BOARD)
Heiko Schocher4ca107e2008-10-15 09:38:38 +0200322 /* call board specific i2c bus reset routine before accessing the */
323 /* environment, which might be in a chip on that bus. For details */
324 /* about this problem see doc/I2C_Edge_Conditions. */
325 i2c_init_board();
326#else
wdenkc6097192002-11-03 00:24:07 +0000327 /*
wdenk8bde7f72003-06-27 21:31:46 +0000328 * WARNING: Do NOT save speed in a static variable: if the
329 * I2C routines are called before RAM is initialized (to read
330 * the DIMM SPD, for instance), RAM won't be usable and your
331 * system will crash.
wdenkc6097192002-11-03 00:24:07 +0000332 */
333 send_reset ();
Heiko Schocher4ca107e2008-10-15 09:38:38 +0200334#endif
wdenkc6097192002-11-03 00:24:07 +0000335}
336
337/*-----------------------------------------------------------------------
338 * Probe to see if a chip is present. Also good for checking for the
339 * completion of EEPROM writes since the chip stops responding until
340 * the write completes (typically 10mSec).
341 */
Heiko Schocherea818db2013-01-29 08:53:15 +0100342static int soft_i2c_probe(struct i2c_adapter *adap, uint8_t addr)
wdenkc6097192002-11-03 00:24:07 +0000343{
344 int rc;
345
Wolfgang Denk82d716f2006-03-12 01:30:45 +0100346 /*
Wolfgang Denk8e7b7032006-03-12 02:55:22 +0100347 * perform 1 byte write transaction with just address byte
Wolfgang Denk82d716f2006-03-12 01:30:45 +0100348 * (fake write)
349 */
wdenkc6097192002-11-03 00:24:07 +0000350 send_start();
wdenk6aff3112002-12-17 01:51:00 +0000351 rc = write_byte ((addr << 1) | 0);
wdenkc6097192002-11-03 00:24:07 +0000352 send_stop();
353
354 return (rc ? 1 : 0);
355}
356
357/*-----------------------------------------------------------------------
358 * Read bytes
359 */
Heiko Schocherea818db2013-01-29 08:53:15 +0100360static int soft_i2c_read(struct i2c_adapter *adap, uchar chip, uint addr,
361 int alen, uchar *buffer, int len)
wdenkc6097192002-11-03 00:24:07 +0000362{
363 int shift;
364 PRINTD("i2c_read: chip %02X addr %02X alen %d buffer %p len %d\n",
365 chip, addr, alen, buffer, len);
366
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200367#ifdef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
wdenkc6097192002-11-03 00:24:07 +0000368 /*
369 * EEPROM chips that implement "address overflow" are ones
370 * like Catalyst 24WC04/08/16 which has 9/10/11 bits of
371 * address and the extra bits end up in the "chip address"
372 * bit slots. This makes a 24WC08 (1Kbyte) chip look like
373 * four 256 byte chips.
374 *
375 * Note that we consider the length of the address field to
376 * still be one byte because the extra address bits are
377 * hidden in the chip address.
378 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200379 chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW);
wdenkc6097192002-11-03 00:24:07 +0000380
381 PRINTD("i2c_read: fix addr_overflow: chip %02X addr %02X\n",
382 chip, addr);
383#endif
384
385 /*
386 * Do the addressing portion of a write cycle to set the
387 * chip's address pointer. If the address length is zero,
388 * don't do the normal write cycle to set the address pointer,
389 * there is no address pointer in this chip.
390 */
391 send_start();
392 if(alen > 0) {
393 if(write_byte(chip << 1)) { /* write cycle */
394 send_stop();
395 PRINTD("i2c_read, no chip responded %02X\n", chip);
396 return(1);
397 }
398 shift = (alen-1) * 8;
399 while(alen-- > 0) {
400 if(write_byte(addr >> shift)) {
401 PRINTD("i2c_read, address not <ACK>ed\n");
402 return(1);
403 }
404 shift -= 8;
405 }
Andrew Dyer2ac69852008-12-29 17:36:01 -0600406
407 /* Some I2C chips need a stop/start sequence here,
408 * other chips don't work with a full stop and need
409 * only a start. Default behaviour is to send the
410 * stop/start sequence.
411 */
412#ifdef CONFIG_SOFT_I2C_READ_REPEATED_START
wdenkc6097192002-11-03 00:24:07 +0000413 send_start();
Andrew Dyer2ac69852008-12-29 17:36:01 -0600414#else
415 send_stop();
416 send_start();
417#endif
wdenkc6097192002-11-03 00:24:07 +0000418 }
419 /*
420 * Send the chip address again, this time for a read cycle.
421 * Then read the data. On the last byte, we do a NACK instead
422 * of an ACK(len == 0) to terminate the read.
423 */
424 write_byte((chip << 1) | 1); /* read cycle */
425 while(len-- > 0) {
426 *buffer++ = read_byte(len == 0);
427 }
428 send_stop();
429 return(0);
430}
431
432/*-----------------------------------------------------------------------
433 * Write bytes
434 */
Heiko Schocherea818db2013-01-29 08:53:15 +0100435static int soft_i2c_write(struct i2c_adapter *adap, uchar chip, uint addr,
436 int alen, uchar *buffer, int len)
wdenkc6097192002-11-03 00:24:07 +0000437{
438 int shift, failures = 0;
439
440 PRINTD("i2c_write: chip %02X addr %02X alen %d buffer %p len %d\n",
441 chip, addr, alen, buffer, len);
442
443 send_start();
444 if(write_byte(chip << 1)) { /* write cycle */
445 send_stop();
446 PRINTD("i2c_write, no chip responded %02X\n", chip);
447 return(1);
448 }
449 shift = (alen-1) * 8;
450 while(alen-- > 0) {
451 if(write_byte(addr >> shift)) {
452 PRINTD("i2c_write, address not <ACK>ed\n");
453 return(1);
454 }
455 shift -= 8;
456 }
457
458 while(len-- > 0) {
459 if(write_byte(*buffer++)) {
460 failures++;
461 }
462 }
463 send_stop();
464 return(failures);
465}
Heiko Schocherea818db2013-01-29 08:53:15 +0100466
467/*
468 * Register soft i2c adapters
469 */
470U_BOOT_I2C_ADAP_COMPLETE(soft0, soft_i2c_init, soft_i2c_probe,
471 soft_i2c_read, soft_i2c_write, NULL,
472 CONFIG_SYS_I2C_SOFT_SPEED, CONFIG_SYS_I2C_SOFT_SLAVE,
473 0)
474#if defined(I2C_SOFT_DECLARATIONS2)
475U_BOOT_I2C_ADAP_COMPLETE(soft1, soft_i2c_init, soft_i2c_probe,
476 soft_i2c_read, soft_i2c_write, NULL,
477 CONFIG_SYS_I2C_SOFT_SPEED_2,
478 CONFIG_SYS_I2C_SOFT_SLAVE_2,
479 1)
480#endif
481#if defined(I2C_SOFT_DECLARATIONS3)
482U_BOOT_I2C_ADAP_COMPLETE(soft2, soft_i2c_init, soft_i2c_probe,
483 soft_i2c_read, soft_i2c_write, NULL,
484 CONFIG_SYS_I2C_SOFT_SPEED_3,
485 CONFIG_SYS_I2C_SOFT_SLAVE_3,
486 2)
487#endif
488#if defined(I2C_SOFT_DECLARATIONS4)
489U_BOOT_I2C_ADAP_COMPLETE(soft3, soft_i2c_init, soft_i2c_probe,
490 soft_i2c_read, soft_i2c_write, NULL,
491 CONFIG_SYS_I2C_SOFT_SPEED_4,
492 CONFIG_SYS_I2C_SOFT_SLAVE_4,
493 3)
494#endif