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wdenkc6097192002-11-03 00:24:07 +00001/*
2 * (C) Copyright 2001, 2002
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 *
23 * This has been changed substantially by Gerald Van Baren, Custom IDEAS,
24 * vanbaren@cideas.com. It was heavily influenced by LiMon, written by
25 * Neil Russell.
26 */
27
28#include <common.h>
29#ifdef CONFIG_MPC8260 /* only valid for MPC8260 */
30#include <ioports.h>
Heiko Schochera21ca952008-10-17 13:52:51 +020031#include <asm/io.h>
wdenkc6097192002-11-03 00:24:07 +000032#endif
Peter Pearsed4fc6012007-08-14 10:10:52 +010033#ifdef CONFIG_AT91RM9200 /* need this for the at91rm9200 */
wdenk9d5028c2004-11-21 00:06:33 +000034#include <asm/io.h>
35#include <asm/arch/hardware.h>
36#endif
Daniel Gorsulowski4e574c42009-05-18 13:20:54 +020037#ifdef CONFIG_AT91SAM9263 /* only valid for AT91SAM9263 */
38#include <asm/arch/at91_pmc.h>
39#include <asm/arch/gpio.h>
40#include <asm/arch/io.h>
41#endif
Wolfgang Denkba94a1b2006-05-30 15:56:48 +020042#ifdef CONFIG_IXP425 /* only valid for IXP425 */
43#include <asm/arch/ixp425.h>
44#endif
Peter Pearseb0d8f5b2007-05-09 11:37:56 +010045#ifdef CONFIG_LPC2292
46#include <asm/arch/hardware.h>
47#endif
Heiko Schocher1b6275d2009-03-12 07:37:34 +010048#if defined(CONFIG_MPC852T) || defined(CONFIG_MPC866)
Heiko Schochera21ca952008-10-17 13:52:51 +020049#include <asm/io.h>
50#endif
wdenkc6097192002-11-03 00:24:07 +000051#include <i2c.h>
52
wdenkc6097192002-11-03 00:24:07 +000053/* #define DEBUG_I2C */
54
Wolfgang Denkd87080b2006-03-31 18:32:53 +020055#ifdef DEBUG_I2C
56DECLARE_GLOBAL_DATA_PTR;
57#endif
58
wdenkc6097192002-11-03 00:24:07 +000059/*-----------------------------------------------------------------------
60 * Definitions
61 */
62
63#define RETRIES 0
64
wdenkc6097192002-11-03 00:24:07 +000065#define I2C_ACK 0 /* PD_SDA level to ack a byte */
66#define I2C_NOACK 1 /* PD_SDA level to noack a byte */
67
68
69#ifdef DEBUG_I2C
70#define PRINTD(fmt,args...) do { \
wdenkc6097192002-11-03 00:24:07 +000071 if (gd->have_console) \
72 printf (fmt ,##args); \
73 } while (0)
74#else
75#define PRINTD(fmt,args...)
76#endif
77
Heiko Schocher799b7842008-10-15 09:34:45 +020078#if defined(CONFIG_I2C_MULTI_BUS)
Trent Piepho5e3ab682008-11-12 17:29:48 -080079static unsigned int i2c_bus_num __attribute__ ((section (".data"))) = 0;
Heiko Schocher799b7842008-10-15 09:34:45 +020080#endif /* CONFIG_I2C_MULTI_BUS */
81
wdenkc6097192002-11-03 00:24:07 +000082/*-----------------------------------------------------------------------
83 * Local functions
84 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020085#if !defined(CONFIG_SYS_I2C_INIT_BOARD)
wdenkc6097192002-11-03 00:24:07 +000086static void send_reset (void);
Heiko Schocher4ca107e2008-10-15 09:38:38 +020087#endif
wdenkc6097192002-11-03 00:24:07 +000088static void send_start (void);
89static void send_stop (void);
90static void send_ack (int);
91static int write_byte (uchar byte);
92static uchar read_byte (int);
93
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020094#if !defined(CONFIG_SYS_I2C_INIT_BOARD)
wdenkc6097192002-11-03 00:24:07 +000095/*-----------------------------------------------------------------------
96 * Send a reset sequence consisting of 9 clocks with the data signal high
97 * to clock any confused device back into an idle state. Also send a
98 * <stop> at the end of the sequence for belts & suspenders.
99 */
100static void send_reset(void)
101{
Heiko Schocher98aed372008-10-15 09:35:26 +0200102 I2C_SOFT_DECLARATIONS /* intentional without ';' */
wdenkc6097192002-11-03 00:24:07 +0000103 int j;
104
wdenk60fbe252003-04-08 23:25:21 +0000105 I2C_SCL(1);
wdenkc6097192002-11-03 00:24:07 +0000106 I2C_SDA(1);
wdenk60fbe252003-04-08 23:25:21 +0000107#ifdef I2C_INIT
108 I2C_INIT;
109#endif
110 I2C_TRISTATE;
wdenkc6097192002-11-03 00:24:07 +0000111 for(j = 0; j < 9; j++) {
112 I2C_SCL(0);
113 I2C_DELAY;
114 I2C_DELAY;
115 I2C_SCL(1);
116 I2C_DELAY;
117 I2C_DELAY;
118 }
119 send_stop();
120 I2C_TRISTATE;
121}
Heiko Schocher4ca107e2008-10-15 09:38:38 +0200122#endif
wdenkc6097192002-11-03 00:24:07 +0000123
124/*-----------------------------------------------------------------------
125 * START: High -> Low on SDA while SCL is High
126 */
127static void send_start(void)
128{
Heiko Schocher98aed372008-10-15 09:35:26 +0200129 I2C_SOFT_DECLARATIONS /* intentional without ';' */
wdenkc6097192002-11-03 00:24:07 +0000130
131 I2C_DELAY;
132 I2C_SDA(1);
133 I2C_ACTIVE;
134 I2C_DELAY;
135 I2C_SCL(1);
136 I2C_DELAY;
137 I2C_SDA(0);
138 I2C_DELAY;
139}
140
141/*-----------------------------------------------------------------------
142 * STOP: Low -> High on SDA while SCL is High
143 */
144static void send_stop(void)
145{
Heiko Schocher98aed372008-10-15 09:35:26 +0200146 I2C_SOFT_DECLARATIONS /* intentional without ';' */
wdenkc6097192002-11-03 00:24:07 +0000147
148 I2C_SCL(0);
149 I2C_DELAY;
150 I2C_SDA(0);
151 I2C_ACTIVE;
152 I2C_DELAY;
153 I2C_SCL(1);
154 I2C_DELAY;
155 I2C_SDA(1);
156 I2C_DELAY;
157 I2C_TRISTATE;
158}
159
wdenkc6097192002-11-03 00:24:07 +0000160/*-----------------------------------------------------------------------
161 * ack should be I2C_ACK or I2C_NOACK
162 */
163static void send_ack(int ack)
164{
Heiko Schocher98aed372008-10-15 09:35:26 +0200165 I2C_SOFT_DECLARATIONS /* intentional without ';' */
wdenkc6097192002-11-03 00:24:07 +0000166
wdenkc6097192002-11-03 00:24:07 +0000167 I2C_SCL(0);
168 I2C_DELAY;
wdenkc6097192002-11-03 00:24:07 +0000169 I2C_ACTIVE;
Wolfgang Denkc15f80e2006-03-13 00:50:48 +0100170 I2C_SDA(ack);
wdenkc6097192002-11-03 00:24:07 +0000171 I2C_DELAY;
172 I2C_SCL(1);
173 I2C_DELAY;
174 I2C_DELAY;
175 I2C_SCL(0);
176 I2C_DELAY;
177}
178
wdenkc6097192002-11-03 00:24:07 +0000179/*-----------------------------------------------------------------------
180 * Send 8 bits and look for an acknowledgement.
181 */
182static int write_byte(uchar data)
183{
Heiko Schocher98aed372008-10-15 09:35:26 +0200184 I2C_SOFT_DECLARATIONS /* intentional without ';' */
wdenkc6097192002-11-03 00:24:07 +0000185 int j;
186 int nack;
187
188 I2C_ACTIVE;
189 for(j = 0; j < 8; j++) {
190 I2C_SCL(0);
191 I2C_DELAY;
192 I2C_SDA(data & 0x80);
193 I2C_DELAY;
194 I2C_SCL(1);
195 I2C_DELAY;
196 I2C_DELAY;
197
198 data <<= 1;
199 }
200
201 /*
202 * Look for an <ACK>(negative logic) and return it.
203 */
204 I2C_SCL(0);
205 I2C_DELAY;
206 I2C_SDA(1);
207 I2C_TRISTATE;
208 I2C_DELAY;
209 I2C_SCL(1);
210 I2C_DELAY;
211 I2C_DELAY;
212 nack = I2C_READ;
213 I2C_SCL(0);
214 I2C_DELAY;
215 I2C_ACTIVE;
216
217 return(nack); /* not a nack is an ack */
218}
219
Heiko Schocher799b7842008-10-15 09:34:45 +0200220#if defined(CONFIG_I2C_MULTI_BUS)
221/*
222 * Functions for multiple I2C bus handling
223 */
224unsigned int i2c_get_bus_num(void)
225{
226 return i2c_bus_num;
227}
228
229int i2c_set_bus_num(unsigned int bus)
230{
Heiko Schocher67b23a32008-10-15 09:39:47 +0200231#if defined(CONFIG_I2C_MUX)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200232 if (bus < CONFIG_SYS_MAX_I2C_BUS) {
Heiko Schocher67b23a32008-10-15 09:39:47 +0200233 i2c_bus_num = bus;
234 } else {
235 int ret;
236
237 ret = i2x_mux_select_mux(bus);
238 if (ret == 0)
239 i2c_bus_num = bus;
240 else
241 return ret;
242 }
243#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200244 if (bus >= CONFIG_SYS_MAX_I2C_BUS)
Heiko Schocher799b7842008-10-15 09:34:45 +0200245 return -1;
246 i2c_bus_num = bus;
Heiko Schocher67b23a32008-10-15 09:39:47 +0200247#endif
Heiko Schocher799b7842008-10-15 09:34:45 +0200248 return 0;
249}
Jens Scharsigd144f942009-03-31 08:18:29 +0200250#endif
Heiko Schocher799b7842008-10-15 09:34:45 +0200251
wdenkc6097192002-11-03 00:24:07 +0000252/*-----------------------------------------------------------------------
253 * if ack == I2C_ACK, ACK the byte so can continue reading, else
254 * send I2C_NOACK to end the read.
255 */
256static uchar read_byte(int ack)
257{
Heiko Schocher98aed372008-10-15 09:35:26 +0200258 I2C_SOFT_DECLARATIONS /* intentional without ';' */
wdenkc6097192002-11-03 00:24:07 +0000259 int data;
260 int j;
261
262 /*
263 * Read 8 bits, MSB first.
264 */
265 I2C_TRISTATE;
Haavard Skinnemoen110e0062008-05-16 11:08:11 +0200266 I2C_SDA(1);
wdenkc6097192002-11-03 00:24:07 +0000267 data = 0;
268 for(j = 0; j < 8; j++) {
269 I2C_SCL(0);
270 I2C_DELAY;
271 I2C_SCL(1);
272 I2C_DELAY;
273 data <<= 1;
274 data |= I2C_READ;
275 I2C_DELAY;
276 }
277 send_ack(ack);
278
279 return(data);
280}
281
282/*=====================================================================*/
283/* Public Functions */
284/*=====================================================================*/
285
286/*-----------------------------------------------------------------------
287 * Initialization
288 */
289void i2c_init (int speed, int slaveaddr)
290{
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200291#if defined(CONFIG_SYS_I2C_INIT_BOARD)
Heiko Schocher4ca107e2008-10-15 09:38:38 +0200292 /* call board specific i2c bus reset routine before accessing the */
293 /* environment, which might be in a chip on that bus. For details */
294 /* about this problem see doc/I2C_Edge_Conditions. */
295 i2c_init_board();
296#else
wdenkc6097192002-11-03 00:24:07 +0000297 /*
wdenk8bde7f72003-06-27 21:31:46 +0000298 * WARNING: Do NOT save speed in a static variable: if the
299 * I2C routines are called before RAM is initialized (to read
300 * the DIMM SPD, for instance), RAM won't be usable and your
301 * system will crash.
wdenkc6097192002-11-03 00:24:07 +0000302 */
303 send_reset ();
Heiko Schocher4ca107e2008-10-15 09:38:38 +0200304#endif
wdenkc6097192002-11-03 00:24:07 +0000305}
306
307/*-----------------------------------------------------------------------
308 * Probe to see if a chip is present. Also good for checking for the
309 * completion of EEPROM writes since the chip stops responding until
310 * the write completes (typically 10mSec).
311 */
312int i2c_probe(uchar addr)
313{
314 int rc;
315
Wolfgang Denk82d716f2006-03-12 01:30:45 +0100316 /*
Wolfgang Denk8e7b7032006-03-12 02:55:22 +0100317 * perform 1 byte write transaction with just address byte
Wolfgang Denk82d716f2006-03-12 01:30:45 +0100318 * (fake write)
319 */
wdenkc6097192002-11-03 00:24:07 +0000320 send_start();
wdenk6aff3112002-12-17 01:51:00 +0000321 rc = write_byte ((addr << 1) | 0);
wdenkc6097192002-11-03 00:24:07 +0000322 send_stop();
323
324 return (rc ? 1 : 0);
325}
326
327/*-----------------------------------------------------------------------
328 * Read bytes
329 */
330int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
331{
332 int shift;
333 PRINTD("i2c_read: chip %02X addr %02X alen %d buffer %p len %d\n",
334 chip, addr, alen, buffer, len);
335
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200336#ifdef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
wdenkc6097192002-11-03 00:24:07 +0000337 /*
338 * EEPROM chips that implement "address overflow" are ones
339 * like Catalyst 24WC04/08/16 which has 9/10/11 bits of
340 * address and the extra bits end up in the "chip address"
341 * bit slots. This makes a 24WC08 (1Kbyte) chip look like
342 * four 256 byte chips.
343 *
344 * Note that we consider the length of the address field to
345 * still be one byte because the extra address bits are
346 * hidden in the chip address.
347 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200348 chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW);
wdenkc6097192002-11-03 00:24:07 +0000349
350 PRINTD("i2c_read: fix addr_overflow: chip %02X addr %02X\n",
351 chip, addr);
352#endif
353
354 /*
355 * Do the addressing portion of a write cycle to set the
356 * chip's address pointer. If the address length is zero,
357 * don't do the normal write cycle to set the address pointer,
358 * there is no address pointer in this chip.
359 */
360 send_start();
361 if(alen > 0) {
362 if(write_byte(chip << 1)) { /* write cycle */
363 send_stop();
364 PRINTD("i2c_read, no chip responded %02X\n", chip);
365 return(1);
366 }
367 shift = (alen-1) * 8;
368 while(alen-- > 0) {
369 if(write_byte(addr >> shift)) {
370 PRINTD("i2c_read, address not <ACK>ed\n");
371 return(1);
372 }
373 shift -= 8;
374 }
Andrew Dyer2ac69852008-12-29 17:36:01 -0600375
376 /* Some I2C chips need a stop/start sequence here,
377 * other chips don't work with a full stop and need
378 * only a start. Default behaviour is to send the
379 * stop/start sequence.
380 */
381#ifdef CONFIG_SOFT_I2C_READ_REPEATED_START
wdenkc6097192002-11-03 00:24:07 +0000382 send_start();
Andrew Dyer2ac69852008-12-29 17:36:01 -0600383#else
384 send_stop();
385 send_start();
386#endif
wdenkc6097192002-11-03 00:24:07 +0000387 }
388 /*
389 * Send the chip address again, this time for a read cycle.
390 * Then read the data. On the last byte, we do a NACK instead
391 * of an ACK(len == 0) to terminate the read.
392 */
393 write_byte((chip << 1) | 1); /* read cycle */
394 while(len-- > 0) {
395 *buffer++ = read_byte(len == 0);
396 }
397 send_stop();
398 return(0);
399}
400
401/*-----------------------------------------------------------------------
402 * Write bytes
403 */
404int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
405{
406 int shift, failures = 0;
407
408 PRINTD("i2c_write: chip %02X addr %02X alen %d buffer %p len %d\n",
409 chip, addr, alen, buffer, len);
410
411 send_start();
412 if(write_byte(chip << 1)) { /* write cycle */
413 send_stop();
414 PRINTD("i2c_write, no chip responded %02X\n", chip);
415 return(1);
416 }
417 shift = (alen-1) * 8;
418 while(alen-- > 0) {
419 if(write_byte(addr >> shift)) {
420 PRINTD("i2c_write, address not <ACK>ed\n");
421 return(1);
422 }
423 shift -= 8;
424 }
425
426 while(len-- > 0) {
427 if(write_byte(*buffer++)) {
428 failures++;
429 }
430 }
431 send_stop();
432 return(failures);
433}