blob: 7270be1b28ace04f68ed909cd275cc0bc4dd4828 [file] [log] [blame]
Kumar Galaf852ce72007-11-29 00:15:30 -06001/*
Kumar Galaa09b9b62010-12-30 12:09:53 -06002 * Copyright 2007-2011 Freescale Semiconductor, Inc.
Kumar Galaf852ce72007-11-29 00:15:30 -06003 *
4 * (C) Copyright 2000
5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
6 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02007 * SPDX-License-Identifier: GPL-2.0+
Kumar Galaf852ce72007-11-29 00:15:30 -06008 */
9
10#include <common.h>
11#include <libfdt.h>
12#include <fdt_support.h>
Kumar Gala730b2fc2008-05-29 11:22:06 -050013#include <asm/processor.h>
Vivek Mahajancb0ff652009-09-22 12:48:27 +053014#include <linux/ctype.h>
Kumar Gala6aba33e2009-03-19 03:40:08 -050015#include <asm/io.h>
Zhao Qiangd4683772015-08-28 10:31:50 +080016#include <asm/fsl_fdt.h>
Kumar Galadb977ab2009-09-10 03:02:13 -050017#include <asm/fsl_portals.h>
Sandeep Singh377ffcf2014-06-05 18:49:57 +053018#include <hwconfig.h>
Dipen Dudhatda1cd952009-09-02 11:25:08 +053019#ifdef CONFIG_FSL_ESDHC
20#include <fsl_esdhc.h>
21#endif
Timur Tabiffadc442011-05-03 13:35:11 -050022#include "../../../../drivers/qe/qe.h" /* For struct qe_firmware */
Kumar Galaf852ce72007-11-29 00:15:30 -060023
Trent Piepho58ec4862008-12-03 15:16:38 -080024DECLARE_GLOBAL_DATA_PTR;
25
Kumar Gala69018ce2008-01-17 08:25:45 -060026extern void ft_qe_setup(void *blob);
Poonam Aggrwalf8027f62009-09-02 19:40:36 +053027extern void ft_fixup_num_cores(void *blob);
Kumar Galaa09b9b62010-12-30 12:09:53 -060028extern void ft_srio_setup(void *blob);
Kim Phillips6b70ffb2008-06-16 15:55:53 -050029
Kumar Galaec2b74f2008-01-17 16:48:33 -060030#ifdef CONFIG_MP
31#include "mp.h"
Kumar Galaec2b74f2008-01-17 16:48:33 -060032
33void ft_fixup_cpu(void *blob, u64 memory_limit)
34{
35 int off;
York Sunffd06e02012-10-08 07:44:30 +000036 phys_addr_t spin_tbl_addr = get_spin_phys_addr();
York Suneb539412012-10-08 07:44:25 +000037 u32 bootpg = determine_mp_bootpg(NULL);
Kumar Galac840d262009-03-31 23:11:05 -050038 u32 id = get_my_id();
Aaron Sierra9d64c6b2010-09-30 12:22:16 -050039 const char *enable_method;
Sandeep Singh377ffcf2014-06-05 18:49:57 +053040#if defined(T1040_TDM_QUIRK_CCSR_BASE)
41 int ret;
42 int tdm_hwconfig_enabled = 0;
43 char buffer[HWCONFIG_BUFFER_SIZE] = {0};
44#endif
Kumar Galaec2b74f2008-01-17 16:48:33 -060045
46 off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
47 while (off != -FDT_ERR_NOTFOUND) {
48 u32 *reg = (u32 *)fdt_getprop(blob, off, "reg", 0);
49
50 if (reg) {
York Sun709389b2012-08-17 08:20:26 +000051 u32 phys_cpu_id = thread_to_core(*reg);
52 u64 val = phys_cpu_id * SIZE_BOOT_ENTRY + spin_tbl_addr;
53 val = cpu_to_fdt64(val);
Kumar Galaec2b74f2008-01-17 16:48:33 -060054 if (*reg == id) {
Matthew McClintockb80d3052010-08-19 13:57:48 -050055 fdt_setprop_string(blob, off, "status",
56 "okay");
Kumar Galaec2b74f2008-01-17 16:48:33 -060057 } else {
Kumar Galaec2b74f2008-01-17 16:48:33 -060058 fdt_setprop_string(blob, off, "status",
59 "disabled");
Kumar Galaec2b74f2008-01-17 16:48:33 -060060 }
Aaron Sierra9d64c6b2010-09-30 12:22:16 -050061
62 if (hold_cores_in_reset(0)) {
63#ifdef CONFIG_FSL_CORENET
64 /* Cores held in reset, use BRR to release */
65 enable_method = "fsl,brr-holdoff";
66#else
67 /* Cores held in reset, use EEBPCR to release */
68 enable_method = "fsl,eebpcr-holdoff";
69#endif
70 } else {
71 /* Cores out of reset and in a spin-loop */
72 enable_method = "spin-table";
73
74 fdt_setprop(blob, off, "cpu-release-addr",
75 &val, sizeof(val));
76 }
77
Matthew McClintockb80d3052010-08-19 13:57:48 -050078 fdt_setprop_string(blob, off, "enable-method",
Aaron Sierra9d64c6b2010-09-30 12:22:16 -050079 enable_method);
Kumar Galaec2b74f2008-01-17 16:48:33 -060080 } else {
81 printf ("cpu NULL\n");
82 }
83 off = fdt_node_offset_by_prop_value(blob, off,
84 "device_type", "cpu", 4);
85 }
86
Sandeep Singh377ffcf2014-06-05 18:49:57 +053087#if defined(T1040_TDM_QUIRK_CCSR_BASE)
88#define CONFIG_MEM_HOLE_16M 0x1000000
89 /*
90 * Extract hwconfig from environment.
91 * Search for tdm entry in hwconfig.
92 */
93 ret = getenv_f("hwconfig", buffer, sizeof(buffer));
94 if (ret > 0)
95 tdm_hwconfig_enabled = hwconfig_f("tdm", buffer);
96
97 /* Reserve the memory hole created by TDM LAW, so OSes dont use it */
98 if (tdm_hwconfig_enabled) {
99 off = fdt_add_mem_rsv(blob, T1040_TDM_QUIRK_CCSR_BASE,
100 CONFIG_MEM_HOLE_16M);
101 if (off < 0)
102 printf("Failed to reserve memory for tdm: %s\n",
103 fdt_strerror(off));
104 }
105#endif
106
Kumar Galaec2b74f2008-01-17 16:48:33 -0600107 /* Reserve the boot page so OSes dont use it */
108 if ((u64)bootpg < memory_limit) {
109 off = fdt_add_mem_rsv(blob, bootpg, (u64)4096);
110 if (off < 0)
York Sunffd06e02012-10-08 07:44:30 +0000111 printf("Failed to reserve memory for bootpg: %s\n",
112 fdt_strerror(off));
113 }
York Sun2d9f26b2012-12-14 06:21:58 +0000114
115#ifndef CONFIG_MPC8xxx_DISABLE_BPTR
116 /*
117 * Reserve the default boot page so OSes dont use it.
118 * The default boot page is always mapped to bootpg above using
119 * boot page translation.
120 */
121 if (0xfffff000ull < memory_limit) {
122 off = fdt_add_mem_rsv(blob, 0xfffff000ull, (u64)4096);
123 if (off < 0) {
124 printf("Failed to reserve memory for 0xfffff000: %s\n",
125 fdt_strerror(off));
126 }
127 }
128#endif
129
York Sunffd06e02012-10-08 07:44:30 +0000130 /* Reserve spin table page */
131 if (spin_tbl_addr < memory_limit) {
132 off = fdt_add_mem_rsv(blob,
133 (spin_tbl_addr & ~0xffful), 4096);
134 if (off < 0)
135 printf("Failed to reserve memory for spin table: %s\n",
136 fdt_strerror(off));
Kumar Galaec2b74f2008-01-17 16:48:33 -0600137 }
Tang Yuantiance249d92014-07-23 17:27:53 +0800138#ifdef CONFIG_DEEP_SLEEP
139#ifdef CONFIG_SPL_MMC_BOOT
140 off = fdt_add_mem_rsv(blob, CONFIG_SYS_MMC_U_BOOT_START,
141 CONFIG_SYS_MMC_U_BOOT_SIZE);
142 if (off < 0)
143 printf("Failed to reserve memory for SD deep sleep: %s\n",
144 fdt_strerror(off));
145#elif defined(CONFIG_SPL_SPI_BOOT)
146 off = fdt_add_mem_rsv(blob, CONFIG_SYS_SPI_FLASH_U_BOOT_START,
147 CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE);
148 if (off < 0)
149 printf("Failed to reserve memory for SPI deep sleep: %s\n",
150 fdt_strerror(off));
151#endif
152#endif
Kumar Galaec2b74f2008-01-17 16:48:33 -0600153}
154#endif
Kumar Gala69018ce2008-01-17 08:25:45 -0600155
Kumar Gala6aba33e2009-03-19 03:40:08 -0500156#ifdef CONFIG_SYS_FSL_CPC
157static inline void ft_fixup_l3cache(void *blob, int off)
158{
159 u32 line_size, num_ways, size, num_sets;
160 cpc_corenet_t *cpc = (void *)CONFIG_SYS_FSL_CPC_ADDR;
161 u32 cfg0 = in_be32(&cpc->cpccfg0);
162
163 size = CPC_CFG0_SZ_K(cfg0) * 1024 * CONFIG_SYS_NUM_CPC;
164 num_ways = CPC_CFG0_NUM_WAYS(cfg0);
165 line_size = CPC_CFG0_LINE_SZ(cfg0);
166 num_sets = size / (line_size * num_ways);
167
168 fdt_setprop(blob, off, "cache-unified", NULL, 0);
169 fdt_setprop_cell(blob, off, "cache-block-size", line_size);
170 fdt_setprop_cell(blob, off, "cache-size", size);
171 fdt_setprop_cell(blob, off, "cache-sets", num_sets);
172 fdt_setprop_cell(blob, off, "cache-level", 3);
173#ifdef CONFIG_SYS_CACHE_STASHING
174 fdt_setprop_cell(blob, off, "cache-stash-id", 1);
175#endif
176}
177#else
Kumar Gala1b3e4042009-03-19 09:16:10 -0500178#define ft_fixup_l3cache(x, y)
Kumar Gala6aba33e2009-03-19 03:40:08 -0500179#endif
Kumar Gala1b3e4042009-03-19 09:16:10 -0500180
181#if defined(CONFIG_L2_CACHE)
Kumar Gala730b2fc2008-05-29 11:22:06 -0500182/* return size in kilobytes */
183static inline u32 l2cache_size(void)
184{
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200185 volatile ccsr_l2cache_t *l2cache = (void *)CONFIG_SYS_MPC85xx_L2_ADDR;
Kumar Gala730b2fc2008-05-29 11:22:06 -0500186 volatile u32 l2siz_field = (l2cache->l2ctl >> 28) & 0x3;
187 u32 ver = SVR_SOC_VER(get_svr());
188
189 switch (l2siz_field) {
190 case 0x0:
191 break;
192 case 0x1:
193 if (ver == SVR_8540 || ver == SVR_8560 ||
York Sun48f6a5c2012-07-06 17:10:33 -0500194 ver == SVR_8541 || ver == SVR_8555)
Kumar Gala730b2fc2008-05-29 11:22:06 -0500195 return 128;
196 else
197 return 256;
198 break;
199 case 0x2:
200 if (ver == SVR_8540 || ver == SVR_8560 ||
York Sun48f6a5c2012-07-06 17:10:33 -0500201 ver == SVR_8541 || ver == SVR_8555)
Kumar Gala730b2fc2008-05-29 11:22:06 -0500202 return 256;
203 else
204 return 512;
205 break;
206 case 0x3:
207 return 1024;
208 break;
209 }
210
211 return 0;
212}
213
214static inline void ft_fixup_l2cache(void *blob)
215{
216 int len, off;
217 u32 *ph;
218 struct cpu_type *cpu = identify_cpu(SVR_SOC_VER(get_svr()));
Kumar Gala730b2fc2008-05-29 11:22:06 -0500219
220 const u32 line_size = 32;
221 const u32 num_ways = 8;
222 const u32 size = l2cache_size() * 1024;
223 const u32 num_sets = size / (line_size * num_ways);
224
225 off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
226 if (off < 0) {
227 debug("no cpu node fount\n");
228 return;
229 }
230
231 ph = (u32 *)fdt_getprop(blob, off, "next-level-cache", 0);
232
233 if (ph == NULL) {
234 debug("no next-level-cache property\n");
235 return ;
236 }
237
238 off = fdt_node_offset_by_phandle(blob, *ph);
239 if (off < 0) {
240 printf("%s: %s\n", __func__, fdt_strerror(off));
241 return ;
242 }
243
244 if (cpu) {
Timur Tabiee4756d2011-04-29 18:08:44 -0500245 char buf[40];
Vivek Mahajancb0ff652009-09-22 12:48:27 +0530246
Timur Tabiee4756d2011-04-29 18:08:44 -0500247 if (isdigit(cpu->name[0])) {
248 /* MPCxxxx, where xxxx == 4-digit number */
249 len = sprintf(buf, "fsl,mpc%s-l2-cache-controller",
250 cpu->name) + 1;
251 } else {
252 /* Pxxxx or Txxxx, where xxxx == 4-digit number */
253 len = sprintf(buf, "fsl,%c%s-l2-cache-controller",
254 tolower(cpu->name[0]), cpu->name + 1) + 1;
255 }
256
257 /*
258 * append "cache" after the NULL character that the previous
259 * sprintf wrote. This is how a device tree stores multiple
260 * strings in a property.
261 */
262 len += sprintf(buf + len, "cache") + 1;
263
264 fdt_setprop(blob, off, "compatible", buf, len);
Kumar Gala730b2fc2008-05-29 11:22:06 -0500265 }
266 fdt_setprop(blob, off, "cache-unified", NULL, 0);
267 fdt_setprop_cell(blob, off, "cache-block-size", line_size);
Kumar Gala730b2fc2008-05-29 11:22:06 -0500268 fdt_setprop_cell(blob, off, "cache-size", size);
269 fdt_setprop_cell(blob, off, "cache-sets", num_sets);
270 fdt_setprop_cell(blob, off, "cache-level", 2);
Kumar Gala1b3e4042009-03-19 09:16:10 -0500271
272 /* we dont bother w/L3 since no platform of this type has one */
273}
York Sun6d2b9da2012-10-08 07:44:08 +0000274#elif defined(CONFIG_BACKSIDE_L2_CACHE) || \
275 defined(CONFIG_SYS_FSL_QORIQ_CHASSIS2)
Kumar Gala1b3e4042009-03-19 09:16:10 -0500276static inline void ft_fixup_l2cache(void *blob)
277{
278 int off, l2_off, l3_off = -1;
279 u32 *ph;
York Sun6d2b9da2012-10-08 07:44:08 +0000280#ifdef CONFIG_BACKSIDE_L2_CACHE
Kumar Gala1b3e4042009-03-19 09:16:10 -0500281 u32 l2cfg0 = mfspr(SPRN_L2CFG0);
York Sun6d2b9da2012-10-08 07:44:08 +0000282#else
283 struct ccsr_cluster_l2 *l2cache =
284 (struct ccsr_cluster_l2 __iomem *)(CONFIG_SYS_FSL_CLUSTER_1_L2);
285 u32 l2cfg0 = in_be32(&l2cache->l2cfg0);
286#endif
Kumar Gala1b3e4042009-03-19 09:16:10 -0500287 u32 size, line_size, num_ways, num_sets;
Kumar Galaacf3f8d2011-07-21 00:20:21 -0500288 int has_l2 = 1;
289
290 /* P2040/P2040E has no L2, so dont set any L2 props */
York Sun48f6a5c2012-07-06 17:10:33 -0500291 if (SVR_SOC_VER(get_svr()) == SVR_P2040)
Kumar Galaacf3f8d2011-07-21 00:20:21 -0500292 has_l2 = 0;
Kumar Gala1b3e4042009-03-19 09:16:10 -0500293
294 size = (l2cfg0 & 0x3fff) * 64 * 1024;
295 num_ways = ((l2cfg0 >> 14) & 0x1f) + 1;
296 line_size = (((l2cfg0 >> 23) & 0x3) + 1) * 32;
297 num_sets = size / (line_size * num_ways);
298
299 off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
300
301 while (off != -FDT_ERR_NOTFOUND) {
302 ph = (u32 *)fdt_getprop(blob, off, "next-level-cache", 0);
303
304 if (ph == NULL) {
305 debug("no next-level-cache property\n");
306 goto next;
307 }
308
309 l2_off = fdt_node_offset_by_phandle(blob, *ph);
310 if (l2_off < 0) {
311 printf("%s: %s\n", __func__, fdt_strerror(off));
312 goto next;
313 }
314
Kumar Galaacf3f8d2011-07-21 00:20:21 -0500315 if (has_l2) {
Kumar Gala82fd1f82009-03-19 02:53:01 -0500316#ifdef CONFIG_SYS_CACHE_STASHING
Kumar Gala82fd1f82009-03-19 02:53:01 -0500317 u32 *reg = (u32 *)fdt_getprop(blob, off, "reg", 0);
Prabhakar Kushwahae9827462013-08-29 13:10:38 +0530318#if defined(CONFIG_SYS_FSL_QORIQ_CHASSIS2) && defined(CONFIG_E6500)
York Sun6d2b9da2012-10-08 07:44:08 +0000319 /* Only initialize every eighth thread */
Scott Wood8d451a72014-03-26 20:30:56 -0500320 if (reg && !((*reg) % 8)) {
Kumar Gala82fd1f82009-03-19 02:53:01 -0500321 fdt_setprop_cell(blob, l2_off, "cache-stash-id",
Scott Wood8d451a72014-03-26 20:30:56 -0500322 (*reg / 4) + 32 + 1);
323 }
324#else
325 if (reg) {
326 fdt_setprop_cell(blob, l2_off, "cache-stash-id",
327 (*reg * 2) + 32 + 1);
328 }
329#endif
Kumar Gala82fd1f82009-03-19 02:53:01 -0500330#endif
331
Kumar Galaacf3f8d2011-07-21 00:20:21 -0500332 fdt_setprop(blob, l2_off, "cache-unified", NULL, 0);
333 fdt_setprop_cell(blob, l2_off, "cache-block-size",
334 line_size);
335 fdt_setprop_cell(blob, l2_off, "cache-size", size);
336 fdt_setprop_cell(blob, l2_off, "cache-sets", num_sets);
337 fdt_setprop_cell(blob, l2_off, "cache-level", 2);
338 fdt_setprop(blob, l2_off, "compatible", "cache", 6);
339 }
Kumar Gala1b3e4042009-03-19 09:16:10 -0500340
341 if (l3_off < 0) {
342 ph = (u32 *)fdt_getprop(blob, l2_off, "next-level-cache", 0);
343
344 if (ph == NULL) {
345 debug("no next-level-cache property\n");
346 goto next;
347 }
348 l3_off = *ph;
349 }
350next:
351 off = fdt_node_offset_by_prop_value(blob, off,
352 "device_type", "cpu", 4);
353 }
354 if (l3_off > 0) {
355 l3_off = fdt_node_offset_by_phandle(blob, l3_off);
356 if (l3_off < 0) {
357 printf("%s: %s\n", __func__, fdt_strerror(off));
358 return ;
359 }
360 ft_fixup_l3cache(blob, l3_off);
361 }
Kumar Gala730b2fc2008-05-29 11:22:06 -0500362}
363#else
364#define ft_fixup_l2cache(x)
365#endif
366
367static inline void ft_fixup_cache(void *blob)
368{
369 int off;
370
371 off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
372
373 while (off != -FDT_ERR_NOTFOUND) {
374 u32 l1cfg0 = mfspr(SPRN_L1CFG0);
375 u32 l1cfg1 = mfspr(SPRN_L1CFG1);
376 u32 isize, iline_size, inum_sets, inum_ways;
377 u32 dsize, dline_size, dnum_sets, dnum_ways;
378
379 /* d-side config */
380 dsize = (l1cfg0 & 0x7ff) * 1024;
381 dnum_ways = ((l1cfg0 >> 11) & 0xff) + 1;
382 dline_size = (((l1cfg0 >> 23) & 0x3) + 1) * 32;
383 dnum_sets = dsize / (dline_size * dnum_ways);
384
385 fdt_setprop_cell(blob, off, "d-cache-block-size", dline_size);
Kumar Gala730b2fc2008-05-29 11:22:06 -0500386 fdt_setprop_cell(blob, off, "d-cache-size", dsize);
387 fdt_setprop_cell(blob, off, "d-cache-sets", dnum_sets);
388
Kumar Gala82fd1f82009-03-19 02:53:01 -0500389#ifdef CONFIG_SYS_CACHE_STASHING
390 {
391 u32 *reg = (u32 *)fdt_getprop(blob, off, "reg", 0);
392 if (reg)
393 fdt_setprop_cell(blob, off, "cache-stash-id",
394 (*reg * 2) + 32 + 0);
395 }
396#endif
397
Kumar Gala730b2fc2008-05-29 11:22:06 -0500398 /* i-side config */
399 isize = (l1cfg1 & 0x7ff) * 1024;
400 inum_ways = ((l1cfg1 >> 11) & 0xff) + 1;
401 iline_size = (((l1cfg1 >> 23) & 0x3) + 1) * 32;
402 inum_sets = isize / (iline_size * inum_ways);
403
404 fdt_setprop_cell(blob, off, "i-cache-block-size", iline_size);
Kumar Gala730b2fc2008-05-29 11:22:06 -0500405 fdt_setprop_cell(blob, off, "i-cache-size", isize);
406 fdt_setprop_cell(blob, off, "i-cache-sets", inum_sets);
407
408 off = fdt_node_offset_by_prop_value(blob, off,
409 "device_type", "cpu", 4);
410 }
411
412 ft_fixup_l2cache(blob);
413}
414
415
Andy Fleming0e17f022008-10-07 08:09:50 -0500416void fdt_add_enet_stashing(void *fdt)
417{
418 do_fixup_by_compat(fdt, "gianfar", "bd-stash", NULL, 0, 1);
419
420 do_fixup_by_compat_u32(fdt, "gianfar", "rx-stash-len", 96, 1);
421
422 do_fixup_by_compat_u32(fdt, "gianfar", "rx-stash-idx", 0, 1);
Pankaj Chauhaneea9a122011-01-25 14:44:57 +0530423 do_fixup_by_compat(fdt, "fsl,etsec2", "bd-stash", NULL, 0, 1);
424 do_fixup_by_compat_u32(fdt, "fsl,etsec2", "rx-stash-len", 96, 1);
425 do_fixup_by_compat_u32(fdt, "fsl,etsec2", "rx-stash-idx", 0, 1);
Andy Fleming0e17f022008-10-07 08:09:50 -0500426}
427
Kumar Galabcad21f2009-03-19 02:46:28 -0500428#if defined(CONFIG_SYS_DPAA_FMAN) || defined(CONFIG_SYS_DPAA_PME)
Kumar Galae2d0f252011-07-31 12:55:39 -0500429#ifdef CONFIG_SYS_DPAA_FMAN
Kumar Gala1b942f72010-07-10 06:38:16 -0500430static void ft_fixup_clks(void *blob, const char *compat, u32 offset,
431 unsigned long freq)
Kumar Galabcad21f2009-03-19 02:46:28 -0500432{
Kumar Gala1b942f72010-07-10 06:38:16 -0500433 phys_addr_t phys = offset + CONFIG_SYS_CCSRBAR_PHYS;
434 int off = fdt_node_offset_by_compat_reg(blob, compat, phys);
Kumar Galabcad21f2009-03-19 02:46:28 -0500435
436 if (off >= 0) {
437 off = fdt_setprop_cell(blob, off, "clock-frequency", freq);
438 if (off > 0)
439 printf("WARNING enable to set clock-frequency "
Kumar Gala1b942f72010-07-10 06:38:16 -0500440 "for %s: %s\n", compat, fdt_strerror(off));
Kumar Galabcad21f2009-03-19 02:46:28 -0500441 }
442}
Kumar Galae2d0f252011-07-31 12:55:39 -0500443#endif
Kumar Galabcad21f2009-03-19 02:46:28 -0500444
445static void ft_fixup_dpaa_clks(void *blob)
446{
447 sys_info_t sysinfo;
448
449 get_sys_info(&sysinfo);
Kumar Galae2d0f252011-07-31 12:55:39 -0500450#ifdef CONFIG_SYS_DPAA_FMAN
Kumar Gala1b942f72010-07-10 06:38:16 -0500451 ft_fixup_clks(blob, "fsl,fman", CONFIG_SYS_FSL_FM1_OFFSET,
Prabhakar Kushwaha997399f2013-08-16 14:52:26 +0530452 sysinfo.freq_fman[0]);
Kumar Galabcad21f2009-03-19 02:46:28 -0500453
454#if (CONFIG_SYS_NUM_FMAN == 2)
Kumar Gala1b942f72010-07-10 06:38:16 -0500455 ft_fixup_clks(blob, "fsl,fman", CONFIG_SYS_FSL_FM2_OFFSET,
Prabhakar Kushwaha997399f2013-08-16 14:52:26 +0530456 sysinfo.freq_fman[1]);
Kumar Galabcad21f2009-03-19 02:46:28 -0500457#endif
Kumar Galae2d0f252011-07-31 12:55:39 -0500458#endif
Kumar Galabcad21f2009-03-19 02:46:28 -0500459
Haiying Wang990e1a82012-10-11 07:13:39 +0000460#ifdef CONFIG_SYS_DPAA_QBMAN
461 do_fixup_by_compat_u32(blob, "fsl,qman",
Prabhakar Kushwaha997399f2013-08-16 14:52:26 +0530462 "clock-frequency", sysinfo.freq_qman, 1);
Haiying Wang990e1a82012-10-11 07:13:39 +0000463#endif
464
Kumar Galabcad21f2009-03-19 02:46:28 -0500465#ifdef CONFIG_SYS_DPAA_PME
Kumar Gala1b942f72010-07-10 06:38:16 -0500466 do_fixup_by_compat_u32(blob, "fsl,pme",
Prabhakar Kushwaha997399f2013-08-16 14:52:26 +0530467 "clock-frequency", sysinfo.freq_pme, 1);
Kumar Galabcad21f2009-03-19 02:46:28 -0500468#endif
469}
470#else
471#define ft_fixup_dpaa_clks(x)
472#endif
473
Liu Yu46df64f2010-01-15 14:58:40 +0800474#ifdef CONFIG_QE
475static void ft_fixup_qe_snum(void *blob)
476{
477 unsigned int svr;
478
479 svr = mfspr(SPRN_SVR);
York Sun48f6a5c2012-07-06 17:10:33 -0500480 if (SVR_SOC_VER(svr) == SVR_8569) {
Liu Yu46df64f2010-01-15 14:58:40 +0800481 if(IS_SVR_REV(svr, 1, 0))
482 do_fixup_by_compat_u32(blob, "fsl,qe",
483 "fsl,qe-num-snums", 46, 1);
484 else
485 do_fixup_by_compat_u32(blob, "fsl,qe",
486 "fsl,qe-num-snums", 76, 1);
487 }
488}
489#endif
490
Timur Tabiffadc442011-05-03 13:35:11 -0500491/**
492 * fdt_fixup_fman_firmware -- insert the Fman firmware into the device tree
493 *
494 * The binding for an Fman firmware node is documented in
495 * Documentation/powerpc/dts-bindings/fsl/dpaa/fman.txt. This node contains
496 * the actual Fman firmware binary data. The operating system is expected to
497 * be able to parse the binary data to determine any attributes it needs.
498 */
499#ifdef CONFIG_SYS_DPAA_FMAN
500void fdt_fixup_fman_firmware(void *blob)
501{
502 int rc, fmnode, fwnode = -1;
503 uint32_t phandle;
504 struct qe_firmware *fmanfw;
505 const struct qe_header *hdr;
506 unsigned int length;
507 uint32_t crc;
508 const char *p;
509
510 /* The first Fman we find will contain the actual firmware. */
511 fmnode = fdt_node_offset_by_compatible(blob, -1, "fsl,fman");
512 if (fmnode < 0)
513 /* Exit silently if there are no Fman devices */
514 return;
515
516 /* If we already have a firmware node, then also exit silently. */
517 if (fdt_node_offset_by_compatible(blob, -1, "fsl,fman-firmware") > 0)
518 return;
519
520 /* If the environment variable is not set, then exit silently */
521 p = getenv("fman_ucode");
522 if (!p)
523 return;
524
Николай Пузановe6394e92013-06-19 11:48:44 +0400525 fmanfw = (struct qe_firmware *) simple_strtoul(p, NULL, 16);
Timur Tabiffadc442011-05-03 13:35:11 -0500526 if (!fmanfw)
527 return;
528
529 hdr = &fmanfw->header;
530 length = be32_to_cpu(hdr->length);
531
532 /* Verify the firmware. */
533 if ((hdr->magic[0] != 'Q') || (hdr->magic[1] != 'E') ||
534 (hdr->magic[2] != 'F')) {
535 printf("Data at %p is not an Fman firmware\n", fmanfw);
536 return;
537 }
538
Timur Tabif2717b42011-11-22 09:21:25 -0600539 if (length > CONFIG_SYS_QE_FMAN_FW_LENGTH) {
Timur Tabiffadc442011-05-03 13:35:11 -0500540 printf("Fman firmware at %p is too large (size=%u)\n",
541 fmanfw, length);
542 return;
543 }
544
545 length -= sizeof(u32); /* Subtract the size of the CRC */
546 crc = be32_to_cpu(*(u32 *)((void *)fmanfw + length));
547 if (crc != crc32_no_comp(0, (void *)fmanfw, length)) {
548 printf("Fman firmware at %p has invalid CRC\n", fmanfw);
549 return;
550 }
551
552 /* Increase the size of the fdt to make room for the node. */
553 rc = fdt_increase_size(blob, fmanfw->header.length);
554 if (rc < 0) {
555 printf("Unable to make room for Fman firmware: %s\n",
556 fdt_strerror(rc));
557 return;
558 }
559
560 /* Create the firmware node. */
561 fwnode = fdt_add_subnode(blob, fmnode, "fman-firmware");
562 if (fwnode < 0) {
563 char s[64];
564 fdt_get_path(blob, fmnode, s, sizeof(s));
565 printf("Could not add firmware node to %s: %s\n", s,
566 fdt_strerror(fwnode));
567 return;
568 }
569 rc = fdt_setprop_string(blob, fwnode, "compatible", "fsl,fman-firmware");
570 if (rc < 0) {
571 char s[64];
572 fdt_get_path(blob, fwnode, s, sizeof(s));
573 printf("Could not add compatible property to node %s: %s\n", s,
574 fdt_strerror(rc));
575 return;
576 }
Timur Tabia2c12292011-09-20 18:24:36 -0500577 phandle = fdt_create_phandle(blob, fwnode);
578 if (!phandle) {
Timur Tabiffadc442011-05-03 13:35:11 -0500579 char s[64];
580 fdt_get_path(blob, fwnode, s, sizeof(s));
581 printf("Could not add phandle property to node %s: %s\n", s,
582 fdt_strerror(rc));
583 return;
584 }
585 rc = fdt_setprop(blob, fwnode, "fsl,firmware", fmanfw, fmanfw->header.length);
586 if (rc < 0) {
587 char s[64];
588 fdt_get_path(blob, fwnode, s, sizeof(s));
589 printf("Could not add firmware property to node %s: %s\n", s,
590 fdt_strerror(rc));
591 return;
592 }
593
594 /* Find all other Fman nodes and point them to the firmware node. */
595 while ((fmnode = fdt_node_offset_by_compatible(blob, fmnode, "fsl,fman")) > 0) {
596 rc = fdt_setprop_cell(blob, fmnode, "fsl,firmware-phandle", phandle);
597 if (rc < 0) {
598 char s[64];
599 fdt_get_path(blob, fmnode, s, sizeof(s));
600 printf("Could not add pointer property to node %s: %s\n",
601 s, fdt_strerror(rc));
602 return;
603 }
604 }
605}
606#else
607#define fdt_fixup_fman_firmware(x)
608#endif
609
Timur Tabi055ce082012-08-14 06:47:27 +0000610#if defined(CONFIG_PPC_P4080)
Shengzhou Liuf81f19f2011-10-14 16:26:06 +0800611static void fdt_fixup_usb(void *fdt)
612{
613 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
614 u32 rcwsr11 = in_be32(&gur->rcwsr[11]);
615 int off;
616
617 off = fdt_node_offset_by_compatible(fdt, -1, "fsl,mpc85xx-usb2-mph");
618 if ((rcwsr11 & FSL_CORENET_RCWSR11_EC1) !=
619 FSL_CORENET_RCWSR11_EC1_FM1_USB1)
620 fdt_status_disabled(fdt, off);
621
622 off = fdt_node_offset_by_compatible(fdt, -1, "fsl,mpc85xx-usb2-dr");
623 if ((rcwsr11 & FSL_CORENET_RCWSR11_EC2) !=
624 FSL_CORENET_RCWSR11_EC2_USB2)
625 fdt_status_disabled(fdt, off);
626}
627#else
628#define fdt_fixup_usb(x)
629#endif
630
Shengzhou Liu605714f2014-05-19 15:08:14 +0800631#if defined(CONFIG_PPC_T2080) || defined(CONFIG_PPC_T4240) || \
632 defined(CONFIG_PPC_T4160) || defined(CONFIG_PPC_T4080)
633void fdt_fixup_dma3(void *blob)
634{
635 /* the 3rd DMA is not functional if SRIO2 is chosen */
636 int nodeoff;
637 ccsr_gur_t __iomem *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
638
639#define CONFIG_SYS_ELO3_DMA3 (0xffe000000 + 0x102300)
640#if defined(CONFIG_PPC_T2080)
641 u32 srds_prtcl_s2 = in_be32(&gur->rcwsr[4]) &
642 FSL_CORENET2_RCWSR4_SRDS2_PRTCL;
643 srds_prtcl_s2 >>= FSL_CORENET2_RCWSR4_SRDS2_PRTCL_SHIFT;
644
645 switch (srds_prtcl_s2) {
646 case 0x29:
647 case 0x2d:
648 case 0x2e:
649#elif defined(CONFIG_PPC_T4240) || defined(CONFIG_PPC_T4160) || \
650 defined(CONFIG_PPC_T4080)
651 u32 srds_prtcl_s4 = in_be32(&gur->rcwsr[4]) &
652 FSL_CORENET2_RCWSR4_SRDS4_PRTCL;
653 srds_prtcl_s4 >>= FSL_CORENET2_RCWSR4_SRDS4_PRTCL_SHIFT;
654
655 switch (srds_prtcl_s4) {
656 case 6:
657 case 8:
658 case 14:
659 case 16:
660#endif
661 nodeoff = fdt_node_offset_by_compat_reg(blob, "fsl,elo3-dma",
662 CONFIG_SYS_ELO3_DMA3);
663 if (nodeoff > 0)
664 fdt_status_disabled(blob, nodeoff);
665 else
666 printf("WARNING: unable to disable dma3\n");
667 break;
668 default:
669 break;
670 }
671}
672#else
673#define fdt_fixup_dma3(x)
674#endif
675
Codrin Ciubotariud616fc52014-03-28 18:57:29 +0200676#if defined(CONFIG_PPC_T1040)
677static void fdt_fixup_l2_switch(void *blob)
678{
679 uchar l2swaddr[6];
680 int node;
681
682 /* The l2switch node from device-tree has
683 * compatible string "vitesse-9953" */
684 node = fdt_node_offset_by_compatible(blob, -1, "vitesse-9953");
685 if (node == -FDT_ERR_NOTFOUND)
686 /* no l2switch node has been found */
687 return;
688
689 /* Get MAC address for the l2switch from "l2switchaddr"*/
690 if (!eth_getenv_enetaddr("l2switchaddr", l2swaddr)) {
691 printf("Warning: MAC address for l2switch not found\n");
692 memset(l2swaddr, 0, sizeof(l2swaddr));
693 }
694
695 /* Add MAC address to l2switch node */
696 fdt_setprop(blob, node, "local-mac-address", l2swaddr,
697 sizeof(l2swaddr));
698}
699#else
700#define fdt_fixup_l2_switch(x)
701#endif
702
Kumar Galaf852ce72007-11-29 00:15:30 -0600703void ft_cpu_setup(void *blob, bd_t *bd)
704{
Haiying Wang2fc7eb02009-01-15 11:58:35 -0500705 int off;
706 int val;
Laurentiu TUDOR51abee62013-10-23 15:20:45 +0300707 int len;
Haiying Wang2fc7eb02009-01-15 11:58:35 -0500708 sys_info_t sysinfo;
709
Kim Phillips6b70ffb2008-06-16 15:55:53 -0500710 /* delete crypto node if not on an E-processor */
711 if (!IS_E_PROCESSOR(get_svr()))
712 fdt_fixup_crypto_node(blob, 0);
Vakul Garg5e95e2d2013-01-23 22:52:31 +0000713#if CONFIG_SYS_FSL_SEC_COMPAT >= 4
714 else {
715 ccsr_sec_t __iomem *sec;
716
717 sec = (void __iomem *)CONFIG_SYS_FSL_SEC_ADDR;
Ruchika Gupta028dbb82014-09-09 11:50:31 +0530718 fdt_fixup_crypto_node(blob, sec_in32(&sec->secvid_ms));
Vakul Garg5e95e2d2013-01-23 22:52:31 +0000719 }
720#endif
Kim Phillips6b70ffb2008-06-16 15:55:53 -0500721
Kumar Galaba37aa02008-08-19 15:41:18 -0500722 fdt_fixup_ethernet(blob);
Andy Fleming0e17f022008-10-07 08:09:50 -0500723
724 fdt_add_enet_stashing(blob);
Kumar Galaf852ce72007-11-29 00:15:30 -0600725
York Suncb930712013-06-25 11:37:41 -0700726#ifndef CONFIG_FSL_TBCLK_EXTRA_DIV
727#define CONFIG_FSL_TBCLK_EXTRA_DIV 1
728#endif
Kumar Galaf852ce72007-11-29 00:15:30 -0600729 do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
York Suncb930712013-06-25 11:37:41 -0700730 "timebase-frequency", get_tbclk() / CONFIG_FSL_TBCLK_EXTRA_DIV,
731 1);
Kumar Galaf852ce72007-11-29 00:15:30 -0600732 do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
733 "bus-frequency", bd->bi_busfreq, 1);
Haiying Wang2fc7eb02009-01-15 11:58:35 -0500734 get_sys_info(&sysinfo);
735 off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
736 while (off != -FDT_ERR_NOTFOUND) {
Laurentiu TUDOR51abee62013-10-23 15:20:45 +0300737 u32 *reg = (u32 *)fdt_getprop(blob, off, "reg", &len);
738 val = cpu_to_fdt32(sysinfo.freq_processor[(*reg) / (len / 4)]);
Haiying Wang2fc7eb02009-01-15 11:58:35 -0500739 fdt_setprop(blob, off, "clock-frequency", &val, 4);
740 off = fdt_node_offset_by_prop_value(blob, off, "device_type",
741 "cpu", 4);
742 }
Kumar Galaf852ce72007-11-29 00:15:30 -0600743 do_fixup_by_prop_u32(blob, "device_type", "soc", 4,
744 "bus-frequency", bd->bi_busfreq, 1);
Trent Piepho58ec4862008-12-03 15:16:38 -0800745
746 do_fixup_by_compat_u32(blob, "fsl,pq3-localbus",
Simon Glass67ac13b2012-12-13 20:48:48 +0000747 "bus-frequency", gd->arch.lbc_clk, 1);
Trent Piepho58ec4862008-12-03 15:16:38 -0800748 do_fixup_by_compat_u32(blob, "fsl,elbc",
Simon Glass67ac13b2012-12-13 20:48:48 +0000749 "bus-frequency", gd->arch.lbc_clk, 1);
Kumar Galaf852ce72007-11-29 00:15:30 -0600750#ifdef CONFIG_QE
Kumar Gala69018ce2008-01-17 08:25:45 -0600751 ft_qe_setup(blob);
Liu Yu46df64f2010-01-15 14:58:40 +0800752 ft_fixup_qe_snum(blob);
Kumar Galaf852ce72007-11-29 00:15:30 -0600753#endif
754
Timur Tabiffadc442011-05-03 13:35:11 -0500755 fdt_fixup_fman_firmware(blob);
756
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200757#ifdef CONFIG_SYS_NS16550
Kumar Galaf852ce72007-11-29 00:15:30 -0600758 do_fixup_by_compat_u32(blob, "ns16550",
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200759 "clock-frequency", CONFIG_SYS_NS16550_CLK, 1);
Kumar Galaf852ce72007-11-29 00:15:30 -0600760#endif
761
762#ifdef CONFIG_CPM2
763 do_fixup_by_compat_u32(blob, "fsl,cpm2-scc-uart",
Masahiro Yamada8e261572014-04-04 20:09:58 +0900764 "current-speed", gd->baudrate, 1);
Kumar Galaf852ce72007-11-29 00:15:30 -0600765
766 do_fixup_by_compat_u32(blob, "fsl,cpm2-brg",
767 "clock-frequency", bd->bi_brgfreq, 1);
768#endif
769
Kumar Gala85f8cda2010-07-10 06:55:41 -0500770#ifdef CONFIG_FSL_CORENET
771 do_fixup_by_compat_u32(blob, "fsl,qoriq-clockgen-1.0",
772 "clock-frequency", CONFIG_SYS_CLK_FREQ, 1);
Andy Fleming7dd09b52013-06-17 15:10:28 -0500773 do_fixup_by_compat_u32(blob, "fsl,qoriq-clockgen-2.0",
Tang Yuantian7b700d22013-02-28 23:24:34 +0000774 "clock-frequency", CONFIG_SYS_CLK_FREQ, 1);
Dongsheng.wang@freescale.comf5c26232013-01-30 18:51:52 +0000775 do_fixup_by_compat_u32(blob, "fsl,mpic",
776 "clock-frequency", get_bus_freq(0)/2, 1);
777#else
778 do_fixup_by_compat_u32(blob, "fsl,mpic",
779 "clock-frequency", get_bus_freq(0), 1);
Kumar Gala85f8cda2010-07-10 06:55:41 -0500780#endif
781
Kumar Galaf852ce72007-11-29 00:15:30 -0600782 fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
Kumar Galaec2b74f2008-01-17 16:48:33 -0600783
784#ifdef CONFIG_MP
785 ft_fixup_cpu(blob, (u64)bd->bi_memstart + (u64)bd->bi_memsize);
Poonam Aggrwalf8027f62009-09-02 19:40:36 +0530786 ft_fixup_num_cores(blob);
Kumar Gala8f3a7fa2010-06-09 22:33:53 -0500787#endif
Kumar Gala730b2fc2008-05-29 11:22:06 -0500788
789 ft_fixup_cache(blob);
Dipen Dudhatda1cd952009-09-02 11:25:08 +0530790
791#if defined(CONFIG_FSL_ESDHC)
792 fdt_fixup_esdhc(blob, bd);
793#endif
Kumar Galabcad21f2009-03-19 02:46:28 -0500794
795 ft_fixup_dpaa_clks(blob);
Kumar Galadb977ab2009-09-10 03:02:13 -0500796
797#if defined(CONFIG_SYS_BMAN_MEM_PHYS)
798 fdt_portal(blob, "fsl,bman-portal", "bman-portals",
799 (u64)CONFIG_SYS_BMAN_MEM_PHYS,
800 CONFIG_SYS_BMAN_MEM_SIZE);
Haiying Wang2a0ffb82011-03-01 09:30:07 -0500801 fdt_fixup_bportals(blob);
Kumar Galadb977ab2009-09-10 03:02:13 -0500802#endif
803
804#if defined(CONFIG_SYS_QMAN_MEM_PHYS)
805 fdt_portal(blob, "fsl,qman-portal", "qman-portals",
806 (u64)CONFIG_SYS_QMAN_MEM_PHYS,
807 CONFIG_SYS_QMAN_MEM_SIZE);
808
809 fdt_fixup_qportals(blob);
810#endif
Kumar Galaa09b9b62010-12-30 12:09:53 -0600811
812#ifdef CONFIG_SYS_SRIO
813 ft_srio_setup(blob);
814#endif
bhaskar upadhayaf5feb5a2011-02-02 14:44:28 +0000815
816 /*
817 * system-clock = CCB clock/2
818 * Here gd->bus_clk = CCB clock
819 * We are using the system clock as 1588 Timer reference
820 * clock source select
821 */
822 do_fixup_by_compat_u32(blob, "fsl,gianfar-ptp-timer",
823 "timer-frequency", gd->bus_clk/2, 1);
Bhaskar Upadhaya65bb8b02011-03-04 20:27:58 +0530824
Jia Hongtao33c87532011-11-15 15:04:11 +0800825 /*
826 * clock-freq should change to clock-frequency and
827 * flexcan-v1.0 should change to p1010-flexcan respectively
828 * in the future.
829 */
Bhaskar Upadhaya65bb8b02011-03-04 20:27:58 +0530830 do_fixup_by_compat_u32(blob, "fsl,flexcan-v1.0",
Jia Hongtao33c87532011-11-15 15:04:11 +0800831 "clock_freq", gd->bus_clk/2, 1);
832
833 do_fixup_by_compat_u32(blob, "fsl,flexcan-v1.0",
834 "clock-frequency", gd->bus_clk/2, 1);
835
836 do_fixup_by_compat_u32(blob, "fsl,p1010-flexcan",
837 "clock-frequency", gd->bus_clk/2, 1);
Shengzhou Liuf81f19f2011-10-14 16:26:06 +0800838
839 fdt_fixup_usb(blob);
Codrin Ciubotariud616fc52014-03-28 18:57:29 +0200840
841 fdt_fixup_l2_switch(blob);
Shengzhou Liu605714f2014-05-19 15:08:14 +0800842
843 fdt_fixup_dma3(blob);
Kumar Galaf852ce72007-11-29 00:15:30 -0600844}
Timur Tabi90f89f02011-05-03 13:24:08 -0500845
846/*
847 * For some CCSR devices, we only have the virtual address, not the physical
848 * address. This is because we map CCSR as a whole, so we typically don't need
849 * a macro for the physical address of any device within CCSR. In this case,
850 * we calculate the physical address of that device using it's the difference
851 * between the virtual address of the device and the virtual address of the
852 * beginning of CCSR.
853 */
854#define CCSR_VIRT_TO_PHYS(x) \
855 (CONFIG_SYS_CCSRBAR_PHYS + ((x) - CONFIG_SYS_CCSRBAR))
856
Timur Tabicc15df52011-11-16 13:28:34 -0600857static void msg(const char *name, uint64_t uaddr, uint64_t daddr)
858{
859 printf("Warning: U-Boot configured %s at address %llx,\n"
860 "but the device tree has it at %llx\n", name, uaddr, daddr);
861}
862
Timur Tabi90f89f02011-05-03 13:24:08 -0500863/*
864 * Verify the device tree
865 *
866 * This function compares several CONFIG_xxx macros that contain physical
867 * addresses with the corresponding nodes in the device tree, to see if
868 * the physical addresses are all correct. For example, if
869 * CONFIG_SYS_NS16550_COM1 is defined, then it contains the virtual address
870 * of the first UART. We convert this to a physical address and compare
871 * that with the physical address of the first ns16550-compatible node
872 * in the device tree. If they don't match, then we display a warning.
873 *
874 * Returns 1 on success, 0 on failure
875 */
876int ft_verify_fdt(void *fdt)
877{
Timur Tabicc15df52011-11-16 13:28:34 -0600878 uint64_t addr = 0;
Timur Tabi90f89f02011-05-03 13:24:08 -0500879 int aliases;
880 int off;
881
882 /* First check the CCSR base address */
883 off = fdt_node_offset_by_prop_value(fdt, -1, "device_type", "soc", 4);
884 if (off > 0)
Timur Tabicc15df52011-11-16 13:28:34 -0600885 addr = fdt_get_base_address(fdt, off);
Timur Tabi90f89f02011-05-03 13:24:08 -0500886
Timur Tabicc15df52011-11-16 13:28:34 -0600887 if (!addr) {
Timur Tabi90f89f02011-05-03 13:24:08 -0500888 printf("Warning: could not determine base CCSR address in "
889 "device tree\n");
890 /* No point in checking anything else */
891 return 0;
892 }
893
Timur Tabicc15df52011-11-16 13:28:34 -0600894 if (addr != CONFIG_SYS_CCSRBAR_PHYS) {
895 msg("CCSR", CONFIG_SYS_CCSRBAR_PHYS, addr);
Timur Tabi90f89f02011-05-03 13:24:08 -0500896 /* No point in checking anything else */
897 return 0;
898 }
899
900 /*
Timur Tabicc15df52011-11-16 13:28:34 -0600901 * Check some nodes via aliases. We assume that U-Boot and the device
902 * tree enumerate the devices equally. E.g. the first serial port in
903 * U-Boot is the same as "serial0" in the device tree.
Timur Tabi90f89f02011-05-03 13:24:08 -0500904 */
905 aliases = fdt_path_offset(fdt, "/aliases");
906 if (aliases > 0) {
907#ifdef CONFIG_SYS_NS16550_COM1
908 if (!fdt_verify_alias_address(fdt, aliases, "serial0",
909 CCSR_VIRT_TO_PHYS(CONFIG_SYS_NS16550_COM1)))
910 return 0;
911#endif
912
913#ifdef CONFIG_SYS_NS16550_COM2
914 if (!fdt_verify_alias_address(fdt, aliases, "serial1",
915 CCSR_VIRT_TO_PHYS(CONFIG_SYS_NS16550_COM2)))
916 return 0;
917#endif
918 }
919
Timur Tabicc15df52011-11-16 13:28:34 -0600920 /*
921 * The localbus node is typically a root node, even though the lbc
922 * controller is part of CCSR. If we were to put the lbc node under
923 * the SOC node, then the 'ranges' property in the lbc node would
924 * translate through the 'ranges' property of the parent SOC node, and
925 * we don't want that. Since it's a separate node, it's possible for
926 * the 'reg' property to be wrong, so check it here. For now, we
927 * only check for "fsl,elbc" nodes.
928 */
929#ifdef CONFIG_SYS_LBC_ADDR
930 off = fdt_node_offset_by_compatible(fdt, -1, "fsl,elbc");
931 if (off > 0) {
Kim Phillips8aa5ec62013-01-16 14:00:11 +0000932 const fdt32_t *reg = fdt_getprop(fdt, off, "reg", NULL);
Timur Tabicc15df52011-11-16 13:28:34 -0600933 if (reg) {
934 uint64_t uaddr = CCSR_VIRT_TO_PHYS(CONFIG_SYS_LBC_ADDR);
935
936 addr = fdt_translate_address(fdt, off, reg);
937 if (uaddr != addr) {
938 msg("the localbus", uaddr, addr);
939 return 0;
940 }
941 }
942 }
943#endif
944
Timur Tabi90f89f02011-05-03 13:24:08 -0500945 return 1;
946}
Zhao Qiangd4683772015-08-28 10:31:50 +0800947
948void fdt_del_diu(void *blob)
949{
950 int nodeoff = 0;
951
952 while ((nodeoff = fdt_node_offset_by_compatible(blob, 0,
953 "fsl,diu")) >= 0) {
954 fdt_del_node(blob, nodeoff);
955 }
956}