blob: 6f8d09ecc464c8e9a541ab9c50458c8c609a0241 [file] [log] [blame]
Kumar Galaf852ce72007-11-29 00:15:30 -06001/*
Kumar Galaa09b9b62010-12-30 12:09:53 -06002 * Copyright 2007-2011 Freescale Semiconductor, Inc.
Kumar Galaf852ce72007-11-29 00:15:30 -06003 *
4 * (C) Copyright 2000
5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26#include <common.h>
27#include <libfdt.h>
28#include <fdt_support.h>
Kumar Gala730b2fc2008-05-29 11:22:06 -050029#include <asm/processor.h>
Vivek Mahajancb0ff652009-09-22 12:48:27 +053030#include <linux/ctype.h>
Kumar Gala6aba33e2009-03-19 03:40:08 -050031#include <asm/io.h>
Kumar Galadb977ab2009-09-10 03:02:13 -050032#include <asm/fsl_portals.h>
Dipen Dudhatda1cd952009-09-02 11:25:08 +053033#ifdef CONFIG_FSL_ESDHC
34#include <fsl_esdhc.h>
35#endif
Timur Tabiffadc442011-05-03 13:35:11 -050036#include "../../../../drivers/qe/qe.h" /* For struct qe_firmware */
Kumar Galaf852ce72007-11-29 00:15:30 -060037
Trent Piepho58ec4862008-12-03 15:16:38 -080038DECLARE_GLOBAL_DATA_PTR;
39
Kumar Gala69018ce2008-01-17 08:25:45 -060040extern void ft_qe_setup(void *blob);
Poonam Aggrwalf8027f62009-09-02 19:40:36 +053041extern void ft_fixup_num_cores(void *blob);
Kumar Galaa09b9b62010-12-30 12:09:53 -060042extern void ft_srio_setup(void *blob);
Kim Phillips6b70ffb2008-06-16 15:55:53 -050043
Kumar Galaec2b74f2008-01-17 16:48:33 -060044#ifdef CONFIG_MP
45#include "mp.h"
Kumar Galaec2b74f2008-01-17 16:48:33 -060046
47void ft_fixup_cpu(void *blob, u64 memory_limit)
48{
49 int off;
York Sunffd06e02012-10-08 07:44:30 +000050 phys_addr_t spin_tbl_addr = get_spin_phys_addr();
York Suneb539412012-10-08 07:44:25 +000051 u32 bootpg = determine_mp_bootpg(NULL);
Kumar Galac840d262009-03-31 23:11:05 -050052 u32 id = get_my_id();
Aaron Sierra9d64c6b2010-09-30 12:22:16 -050053 const char *enable_method;
Kumar Galaec2b74f2008-01-17 16:48:33 -060054
55 off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
56 while (off != -FDT_ERR_NOTFOUND) {
57 u32 *reg = (u32 *)fdt_getprop(blob, off, "reg", 0);
58
59 if (reg) {
York Sun709389b2012-08-17 08:20:26 +000060 u32 phys_cpu_id = thread_to_core(*reg);
61 u64 val = phys_cpu_id * SIZE_BOOT_ENTRY + spin_tbl_addr;
62 val = cpu_to_fdt64(val);
Kumar Galaec2b74f2008-01-17 16:48:33 -060063 if (*reg == id) {
Matthew McClintockb80d3052010-08-19 13:57:48 -050064 fdt_setprop_string(blob, off, "status",
65 "okay");
Kumar Galaec2b74f2008-01-17 16:48:33 -060066 } else {
Kumar Galaec2b74f2008-01-17 16:48:33 -060067 fdt_setprop_string(blob, off, "status",
68 "disabled");
Kumar Galaec2b74f2008-01-17 16:48:33 -060069 }
Aaron Sierra9d64c6b2010-09-30 12:22:16 -050070
71 if (hold_cores_in_reset(0)) {
72#ifdef CONFIG_FSL_CORENET
73 /* Cores held in reset, use BRR to release */
74 enable_method = "fsl,brr-holdoff";
75#else
76 /* Cores held in reset, use EEBPCR to release */
77 enable_method = "fsl,eebpcr-holdoff";
78#endif
79 } else {
80 /* Cores out of reset and in a spin-loop */
81 enable_method = "spin-table";
82
83 fdt_setprop(blob, off, "cpu-release-addr",
84 &val, sizeof(val));
85 }
86
Matthew McClintockb80d3052010-08-19 13:57:48 -050087 fdt_setprop_string(blob, off, "enable-method",
Aaron Sierra9d64c6b2010-09-30 12:22:16 -050088 enable_method);
Kumar Galaec2b74f2008-01-17 16:48:33 -060089 } else {
90 printf ("cpu NULL\n");
91 }
92 off = fdt_node_offset_by_prop_value(blob, off,
93 "device_type", "cpu", 4);
94 }
95
96 /* Reserve the boot page so OSes dont use it */
97 if ((u64)bootpg < memory_limit) {
98 off = fdt_add_mem_rsv(blob, bootpg, (u64)4096);
99 if (off < 0)
York Sunffd06e02012-10-08 07:44:30 +0000100 printf("Failed to reserve memory for bootpg: %s\n",
101 fdt_strerror(off));
102 }
York Sun2d9f26b2012-12-14 06:21:58 +0000103
104#ifndef CONFIG_MPC8xxx_DISABLE_BPTR
105 /*
106 * Reserve the default boot page so OSes dont use it.
107 * The default boot page is always mapped to bootpg above using
108 * boot page translation.
109 */
110 if (0xfffff000ull < memory_limit) {
111 off = fdt_add_mem_rsv(blob, 0xfffff000ull, (u64)4096);
112 if (off < 0) {
113 printf("Failed to reserve memory for 0xfffff000: %s\n",
114 fdt_strerror(off));
115 }
116 }
117#endif
118
York Sunffd06e02012-10-08 07:44:30 +0000119 /* Reserve spin table page */
120 if (spin_tbl_addr < memory_limit) {
121 off = fdt_add_mem_rsv(blob,
122 (spin_tbl_addr & ~0xffful), 4096);
123 if (off < 0)
124 printf("Failed to reserve memory for spin table: %s\n",
125 fdt_strerror(off));
Kumar Galaec2b74f2008-01-17 16:48:33 -0600126 }
127}
128#endif
Kumar Gala69018ce2008-01-17 08:25:45 -0600129
Kumar Gala6aba33e2009-03-19 03:40:08 -0500130#ifdef CONFIG_SYS_FSL_CPC
131static inline void ft_fixup_l3cache(void *blob, int off)
132{
133 u32 line_size, num_ways, size, num_sets;
134 cpc_corenet_t *cpc = (void *)CONFIG_SYS_FSL_CPC_ADDR;
135 u32 cfg0 = in_be32(&cpc->cpccfg0);
136
137 size = CPC_CFG0_SZ_K(cfg0) * 1024 * CONFIG_SYS_NUM_CPC;
138 num_ways = CPC_CFG0_NUM_WAYS(cfg0);
139 line_size = CPC_CFG0_LINE_SZ(cfg0);
140 num_sets = size / (line_size * num_ways);
141
142 fdt_setprop(blob, off, "cache-unified", NULL, 0);
143 fdt_setprop_cell(blob, off, "cache-block-size", line_size);
144 fdt_setprop_cell(blob, off, "cache-size", size);
145 fdt_setprop_cell(blob, off, "cache-sets", num_sets);
146 fdt_setprop_cell(blob, off, "cache-level", 3);
147#ifdef CONFIG_SYS_CACHE_STASHING
148 fdt_setprop_cell(blob, off, "cache-stash-id", 1);
149#endif
150}
151#else
Kumar Gala1b3e4042009-03-19 09:16:10 -0500152#define ft_fixup_l3cache(x, y)
Kumar Gala6aba33e2009-03-19 03:40:08 -0500153#endif
Kumar Gala1b3e4042009-03-19 09:16:10 -0500154
155#if defined(CONFIG_L2_CACHE)
Kumar Gala730b2fc2008-05-29 11:22:06 -0500156/* return size in kilobytes */
157static inline u32 l2cache_size(void)
158{
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200159 volatile ccsr_l2cache_t *l2cache = (void *)CONFIG_SYS_MPC85xx_L2_ADDR;
Kumar Gala730b2fc2008-05-29 11:22:06 -0500160 volatile u32 l2siz_field = (l2cache->l2ctl >> 28) & 0x3;
161 u32 ver = SVR_SOC_VER(get_svr());
162
163 switch (l2siz_field) {
164 case 0x0:
165 break;
166 case 0x1:
167 if (ver == SVR_8540 || ver == SVR_8560 ||
York Sun48f6a5c2012-07-06 17:10:33 -0500168 ver == SVR_8541 || ver == SVR_8555)
Kumar Gala730b2fc2008-05-29 11:22:06 -0500169 return 128;
170 else
171 return 256;
172 break;
173 case 0x2:
174 if (ver == SVR_8540 || ver == SVR_8560 ||
York Sun48f6a5c2012-07-06 17:10:33 -0500175 ver == SVR_8541 || ver == SVR_8555)
Kumar Gala730b2fc2008-05-29 11:22:06 -0500176 return 256;
177 else
178 return 512;
179 break;
180 case 0x3:
181 return 1024;
182 break;
183 }
184
185 return 0;
186}
187
188static inline void ft_fixup_l2cache(void *blob)
189{
190 int len, off;
191 u32 *ph;
192 struct cpu_type *cpu = identify_cpu(SVR_SOC_VER(get_svr()));
Kumar Gala730b2fc2008-05-29 11:22:06 -0500193
194 const u32 line_size = 32;
195 const u32 num_ways = 8;
196 const u32 size = l2cache_size() * 1024;
197 const u32 num_sets = size / (line_size * num_ways);
198
199 off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
200 if (off < 0) {
201 debug("no cpu node fount\n");
202 return;
203 }
204
205 ph = (u32 *)fdt_getprop(blob, off, "next-level-cache", 0);
206
207 if (ph == NULL) {
208 debug("no next-level-cache property\n");
209 return ;
210 }
211
212 off = fdt_node_offset_by_phandle(blob, *ph);
213 if (off < 0) {
214 printf("%s: %s\n", __func__, fdt_strerror(off));
215 return ;
216 }
217
218 if (cpu) {
Timur Tabiee4756d2011-04-29 18:08:44 -0500219 char buf[40];
Vivek Mahajancb0ff652009-09-22 12:48:27 +0530220
Timur Tabiee4756d2011-04-29 18:08:44 -0500221 if (isdigit(cpu->name[0])) {
222 /* MPCxxxx, where xxxx == 4-digit number */
223 len = sprintf(buf, "fsl,mpc%s-l2-cache-controller",
224 cpu->name) + 1;
225 } else {
226 /* Pxxxx or Txxxx, where xxxx == 4-digit number */
227 len = sprintf(buf, "fsl,%c%s-l2-cache-controller",
228 tolower(cpu->name[0]), cpu->name + 1) + 1;
229 }
230
231 /*
232 * append "cache" after the NULL character that the previous
233 * sprintf wrote. This is how a device tree stores multiple
234 * strings in a property.
235 */
236 len += sprintf(buf + len, "cache") + 1;
237
238 fdt_setprop(blob, off, "compatible", buf, len);
Kumar Gala730b2fc2008-05-29 11:22:06 -0500239 }
240 fdt_setprop(blob, off, "cache-unified", NULL, 0);
241 fdt_setprop_cell(blob, off, "cache-block-size", line_size);
Kumar Gala730b2fc2008-05-29 11:22:06 -0500242 fdt_setprop_cell(blob, off, "cache-size", size);
243 fdt_setprop_cell(blob, off, "cache-sets", num_sets);
244 fdt_setprop_cell(blob, off, "cache-level", 2);
Kumar Gala1b3e4042009-03-19 09:16:10 -0500245
246 /* we dont bother w/L3 since no platform of this type has one */
247}
York Sun6d2b9da2012-10-08 07:44:08 +0000248#elif defined(CONFIG_BACKSIDE_L2_CACHE) || \
249 defined(CONFIG_SYS_FSL_QORIQ_CHASSIS2)
Kumar Gala1b3e4042009-03-19 09:16:10 -0500250static inline void ft_fixup_l2cache(void *blob)
251{
252 int off, l2_off, l3_off = -1;
253 u32 *ph;
York Sun6d2b9da2012-10-08 07:44:08 +0000254#ifdef CONFIG_BACKSIDE_L2_CACHE
Kumar Gala1b3e4042009-03-19 09:16:10 -0500255 u32 l2cfg0 = mfspr(SPRN_L2CFG0);
York Sun6d2b9da2012-10-08 07:44:08 +0000256#else
257 struct ccsr_cluster_l2 *l2cache =
258 (struct ccsr_cluster_l2 __iomem *)(CONFIG_SYS_FSL_CLUSTER_1_L2);
259 u32 l2cfg0 = in_be32(&l2cache->l2cfg0);
260#endif
Kumar Gala1b3e4042009-03-19 09:16:10 -0500261 u32 size, line_size, num_ways, num_sets;
Kumar Galaacf3f8d2011-07-21 00:20:21 -0500262 int has_l2 = 1;
263
264 /* P2040/P2040E has no L2, so dont set any L2 props */
York Sun48f6a5c2012-07-06 17:10:33 -0500265 if (SVR_SOC_VER(get_svr()) == SVR_P2040)
Kumar Galaacf3f8d2011-07-21 00:20:21 -0500266 has_l2 = 0;
Kumar Gala1b3e4042009-03-19 09:16:10 -0500267
268 size = (l2cfg0 & 0x3fff) * 64 * 1024;
269 num_ways = ((l2cfg0 >> 14) & 0x1f) + 1;
270 line_size = (((l2cfg0 >> 23) & 0x3) + 1) * 32;
271 num_sets = size / (line_size * num_ways);
272
273 off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
274
275 while (off != -FDT_ERR_NOTFOUND) {
276 ph = (u32 *)fdt_getprop(blob, off, "next-level-cache", 0);
277
278 if (ph == NULL) {
279 debug("no next-level-cache property\n");
280 goto next;
281 }
282
283 l2_off = fdt_node_offset_by_phandle(blob, *ph);
284 if (l2_off < 0) {
285 printf("%s: %s\n", __func__, fdt_strerror(off));
286 goto next;
287 }
288
Kumar Galaacf3f8d2011-07-21 00:20:21 -0500289 if (has_l2) {
Kumar Gala82fd1f82009-03-19 02:53:01 -0500290#ifdef CONFIG_SYS_CACHE_STASHING
Kumar Gala82fd1f82009-03-19 02:53:01 -0500291 u32 *reg = (u32 *)fdt_getprop(blob, off, "reg", 0);
York Sun6d2b9da2012-10-08 07:44:08 +0000292#ifdef CONFIG_SYS_FSL_QORIQ_CHASSIS2
293 /* Only initialize every eighth thread */
294 if (reg && !((*reg) % 8))
295#else
Kumar Gala82fd1f82009-03-19 02:53:01 -0500296 if (reg)
York Sun6d2b9da2012-10-08 07:44:08 +0000297#endif
Kumar Gala82fd1f82009-03-19 02:53:01 -0500298 fdt_setprop_cell(blob, l2_off, "cache-stash-id",
299 (*reg * 2) + 32 + 1);
Kumar Gala82fd1f82009-03-19 02:53:01 -0500300#endif
301
Kumar Galaacf3f8d2011-07-21 00:20:21 -0500302 fdt_setprop(blob, l2_off, "cache-unified", NULL, 0);
303 fdt_setprop_cell(blob, l2_off, "cache-block-size",
304 line_size);
305 fdt_setprop_cell(blob, l2_off, "cache-size", size);
306 fdt_setprop_cell(blob, l2_off, "cache-sets", num_sets);
307 fdt_setprop_cell(blob, l2_off, "cache-level", 2);
308 fdt_setprop(blob, l2_off, "compatible", "cache", 6);
309 }
Kumar Gala1b3e4042009-03-19 09:16:10 -0500310
311 if (l3_off < 0) {
312 ph = (u32 *)fdt_getprop(blob, l2_off, "next-level-cache", 0);
313
314 if (ph == NULL) {
315 debug("no next-level-cache property\n");
316 goto next;
317 }
318 l3_off = *ph;
319 }
320next:
321 off = fdt_node_offset_by_prop_value(blob, off,
322 "device_type", "cpu", 4);
323 }
324 if (l3_off > 0) {
325 l3_off = fdt_node_offset_by_phandle(blob, l3_off);
326 if (l3_off < 0) {
327 printf("%s: %s\n", __func__, fdt_strerror(off));
328 return ;
329 }
330 ft_fixup_l3cache(blob, l3_off);
331 }
Kumar Gala730b2fc2008-05-29 11:22:06 -0500332}
333#else
334#define ft_fixup_l2cache(x)
335#endif
336
337static inline void ft_fixup_cache(void *blob)
338{
339 int off;
340
341 off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
342
343 while (off != -FDT_ERR_NOTFOUND) {
344 u32 l1cfg0 = mfspr(SPRN_L1CFG0);
345 u32 l1cfg1 = mfspr(SPRN_L1CFG1);
346 u32 isize, iline_size, inum_sets, inum_ways;
347 u32 dsize, dline_size, dnum_sets, dnum_ways;
348
349 /* d-side config */
350 dsize = (l1cfg0 & 0x7ff) * 1024;
351 dnum_ways = ((l1cfg0 >> 11) & 0xff) + 1;
352 dline_size = (((l1cfg0 >> 23) & 0x3) + 1) * 32;
353 dnum_sets = dsize / (dline_size * dnum_ways);
354
355 fdt_setprop_cell(blob, off, "d-cache-block-size", dline_size);
Kumar Gala730b2fc2008-05-29 11:22:06 -0500356 fdt_setprop_cell(blob, off, "d-cache-size", dsize);
357 fdt_setprop_cell(blob, off, "d-cache-sets", dnum_sets);
358
Kumar Gala82fd1f82009-03-19 02:53:01 -0500359#ifdef CONFIG_SYS_CACHE_STASHING
360 {
361 u32 *reg = (u32 *)fdt_getprop(blob, off, "reg", 0);
362 if (reg)
363 fdt_setprop_cell(blob, off, "cache-stash-id",
364 (*reg * 2) + 32 + 0);
365 }
366#endif
367
Kumar Gala730b2fc2008-05-29 11:22:06 -0500368 /* i-side config */
369 isize = (l1cfg1 & 0x7ff) * 1024;
370 inum_ways = ((l1cfg1 >> 11) & 0xff) + 1;
371 iline_size = (((l1cfg1 >> 23) & 0x3) + 1) * 32;
372 inum_sets = isize / (iline_size * inum_ways);
373
374 fdt_setprop_cell(blob, off, "i-cache-block-size", iline_size);
Kumar Gala730b2fc2008-05-29 11:22:06 -0500375 fdt_setprop_cell(blob, off, "i-cache-size", isize);
376 fdt_setprop_cell(blob, off, "i-cache-sets", inum_sets);
377
378 off = fdt_node_offset_by_prop_value(blob, off,
379 "device_type", "cpu", 4);
380 }
381
382 ft_fixup_l2cache(blob);
383}
384
385
Andy Fleming0e17f022008-10-07 08:09:50 -0500386void fdt_add_enet_stashing(void *fdt)
387{
388 do_fixup_by_compat(fdt, "gianfar", "bd-stash", NULL, 0, 1);
389
390 do_fixup_by_compat_u32(fdt, "gianfar", "rx-stash-len", 96, 1);
391
392 do_fixup_by_compat_u32(fdt, "gianfar", "rx-stash-idx", 0, 1);
Pankaj Chauhaneea9a122011-01-25 14:44:57 +0530393 do_fixup_by_compat(fdt, "fsl,etsec2", "bd-stash", NULL, 0, 1);
394 do_fixup_by_compat_u32(fdt, "fsl,etsec2", "rx-stash-len", 96, 1);
395 do_fixup_by_compat_u32(fdt, "fsl,etsec2", "rx-stash-idx", 0, 1);
Andy Fleming0e17f022008-10-07 08:09:50 -0500396}
397
Kumar Galabcad21f2009-03-19 02:46:28 -0500398#if defined(CONFIG_SYS_DPAA_FMAN) || defined(CONFIG_SYS_DPAA_PME)
Kumar Galae2d0f252011-07-31 12:55:39 -0500399#ifdef CONFIG_SYS_DPAA_FMAN
Kumar Gala1b942f72010-07-10 06:38:16 -0500400static void ft_fixup_clks(void *blob, const char *compat, u32 offset,
401 unsigned long freq)
Kumar Galabcad21f2009-03-19 02:46:28 -0500402{
Kumar Gala1b942f72010-07-10 06:38:16 -0500403 phys_addr_t phys = offset + CONFIG_SYS_CCSRBAR_PHYS;
404 int off = fdt_node_offset_by_compat_reg(blob, compat, phys);
Kumar Galabcad21f2009-03-19 02:46:28 -0500405
406 if (off >= 0) {
407 off = fdt_setprop_cell(blob, off, "clock-frequency", freq);
408 if (off > 0)
409 printf("WARNING enable to set clock-frequency "
Kumar Gala1b942f72010-07-10 06:38:16 -0500410 "for %s: %s\n", compat, fdt_strerror(off));
Kumar Galabcad21f2009-03-19 02:46:28 -0500411 }
412}
Kumar Galae2d0f252011-07-31 12:55:39 -0500413#endif
Kumar Galabcad21f2009-03-19 02:46:28 -0500414
415static void ft_fixup_dpaa_clks(void *blob)
416{
417 sys_info_t sysinfo;
418
419 get_sys_info(&sysinfo);
Kumar Galae2d0f252011-07-31 12:55:39 -0500420#ifdef CONFIG_SYS_DPAA_FMAN
Kumar Gala1b942f72010-07-10 06:38:16 -0500421 ft_fixup_clks(blob, "fsl,fman", CONFIG_SYS_FSL_FM1_OFFSET,
422 sysinfo.freqFMan[0]);
Kumar Galabcad21f2009-03-19 02:46:28 -0500423
424#if (CONFIG_SYS_NUM_FMAN == 2)
Kumar Gala1b942f72010-07-10 06:38:16 -0500425 ft_fixup_clks(blob, "fsl,fman", CONFIG_SYS_FSL_FM2_OFFSET,
426 sysinfo.freqFMan[1]);
Kumar Galabcad21f2009-03-19 02:46:28 -0500427#endif
Kumar Galae2d0f252011-07-31 12:55:39 -0500428#endif
Kumar Galabcad21f2009-03-19 02:46:28 -0500429
Haiying Wang990e1a82012-10-11 07:13:39 +0000430#ifdef CONFIG_SYS_DPAA_QBMAN
431 do_fixup_by_compat_u32(blob, "fsl,qman",
432 "clock-frequency", sysinfo.freqQMAN, 1);
433#endif
434
Kumar Galabcad21f2009-03-19 02:46:28 -0500435#ifdef CONFIG_SYS_DPAA_PME
Kumar Gala1b942f72010-07-10 06:38:16 -0500436 do_fixup_by_compat_u32(blob, "fsl,pme",
437 "clock-frequency", sysinfo.freqPME, 1);
Kumar Galabcad21f2009-03-19 02:46:28 -0500438#endif
439}
440#else
441#define ft_fixup_dpaa_clks(x)
442#endif
443
Liu Yu46df64f2010-01-15 14:58:40 +0800444#ifdef CONFIG_QE
445static void ft_fixup_qe_snum(void *blob)
446{
447 unsigned int svr;
448
449 svr = mfspr(SPRN_SVR);
York Sun48f6a5c2012-07-06 17:10:33 -0500450 if (SVR_SOC_VER(svr) == SVR_8569) {
Liu Yu46df64f2010-01-15 14:58:40 +0800451 if(IS_SVR_REV(svr, 1, 0))
452 do_fixup_by_compat_u32(blob, "fsl,qe",
453 "fsl,qe-num-snums", 46, 1);
454 else
455 do_fixup_by_compat_u32(blob, "fsl,qe",
456 "fsl,qe-num-snums", 76, 1);
457 }
458}
459#endif
460
Timur Tabiffadc442011-05-03 13:35:11 -0500461/**
462 * fdt_fixup_fman_firmware -- insert the Fman firmware into the device tree
463 *
464 * The binding for an Fman firmware node is documented in
465 * Documentation/powerpc/dts-bindings/fsl/dpaa/fman.txt. This node contains
466 * the actual Fman firmware binary data. The operating system is expected to
467 * be able to parse the binary data to determine any attributes it needs.
468 */
469#ifdef CONFIG_SYS_DPAA_FMAN
470void fdt_fixup_fman_firmware(void *blob)
471{
472 int rc, fmnode, fwnode = -1;
473 uint32_t phandle;
474 struct qe_firmware *fmanfw;
475 const struct qe_header *hdr;
476 unsigned int length;
477 uint32_t crc;
478 const char *p;
479
480 /* The first Fman we find will contain the actual firmware. */
481 fmnode = fdt_node_offset_by_compatible(blob, -1, "fsl,fman");
482 if (fmnode < 0)
483 /* Exit silently if there are no Fman devices */
484 return;
485
486 /* If we already have a firmware node, then also exit silently. */
487 if (fdt_node_offset_by_compatible(blob, -1, "fsl,fman-firmware") > 0)
488 return;
489
490 /* If the environment variable is not set, then exit silently */
491 p = getenv("fman_ucode");
492 if (!p)
493 return;
494
495 fmanfw = (struct qe_firmware *) simple_strtoul(p, NULL, 0);
496 if (!fmanfw)
497 return;
498
499 hdr = &fmanfw->header;
500 length = be32_to_cpu(hdr->length);
501
502 /* Verify the firmware. */
503 if ((hdr->magic[0] != 'Q') || (hdr->magic[1] != 'E') ||
504 (hdr->magic[2] != 'F')) {
505 printf("Data at %p is not an Fman firmware\n", fmanfw);
506 return;
507 }
508
Timur Tabif2717b42011-11-22 09:21:25 -0600509 if (length > CONFIG_SYS_QE_FMAN_FW_LENGTH) {
Timur Tabiffadc442011-05-03 13:35:11 -0500510 printf("Fman firmware at %p is too large (size=%u)\n",
511 fmanfw, length);
512 return;
513 }
514
515 length -= sizeof(u32); /* Subtract the size of the CRC */
516 crc = be32_to_cpu(*(u32 *)((void *)fmanfw + length));
517 if (crc != crc32_no_comp(0, (void *)fmanfw, length)) {
518 printf("Fman firmware at %p has invalid CRC\n", fmanfw);
519 return;
520 }
521
522 /* Increase the size of the fdt to make room for the node. */
523 rc = fdt_increase_size(blob, fmanfw->header.length);
524 if (rc < 0) {
525 printf("Unable to make room for Fman firmware: %s\n",
526 fdt_strerror(rc));
527 return;
528 }
529
530 /* Create the firmware node. */
531 fwnode = fdt_add_subnode(blob, fmnode, "fman-firmware");
532 if (fwnode < 0) {
533 char s[64];
534 fdt_get_path(blob, fmnode, s, sizeof(s));
535 printf("Could not add firmware node to %s: %s\n", s,
536 fdt_strerror(fwnode));
537 return;
538 }
539 rc = fdt_setprop_string(blob, fwnode, "compatible", "fsl,fman-firmware");
540 if (rc < 0) {
541 char s[64];
542 fdt_get_path(blob, fwnode, s, sizeof(s));
543 printf("Could not add compatible property to node %s: %s\n", s,
544 fdt_strerror(rc));
545 return;
546 }
Timur Tabia2c12292011-09-20 18:24:36 -0500547 phandle = fdt_create_phandle(blob, fwnode);
548 if (!phandle) {
Timur Tabiffadc442011-05-03 13:35:11 -0500549 char s[64];
550 fdt_get_path(blob, fwnode, s, sizeof(s));
551 printf("Could not add phandle property to node %s: %s\n", s,
552 fdt_strerror(rc));
553 return;
554 }
555 rc = fdt_setprop(blob, fwnode, "fsl,firmware", fmanfw, fmanfw->header.length);
556 if (rc < 0) {
557 char s[64];
558 fdt_get_path(blob, fwnode, s, sizeof(s));
559 printf("Could not add firmware property to node %s: %s\n", s,
560 fdt_strerror(rc));
561 return;
562 }
563
564 /* Find all other Fman nodes and point them to the firmware node. */
565 while ((fmnode = fdt_node_offset_by_compatible(blob, fmnode, "fsl,fman")) > 0) {
566 rc = fdt_setprop_cell(blob, fmnode, "fsl,firmware-phandle", phandle);
567 if (rc < 0) {
568 char s[64];
569 fdt_get_path(blob, fmnode, s, sizeof(s));
570 printf("Could not add pointer property to node %s: %s\n",
571 s, fdt_strerror(rc));
572 return;
573 }
574 }
575}
576#else
577#define fdt_fixup_fman_firmware(x)
578#endif
579
Timur Tabi055ce082012-08-14 06:47:27 +0000580#if defined(CONFIG_PPC_P4080)
Shengzhou Liuf81f19f2011-10-14 16:26:06 +0800581static void fdt_fixup_usb(void *fdt)
582{
583 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
584 u32 rcwsr11 = in_be32(&gur->rcwsr[11]);
585 int off;
586
587 off = fdt_node_offset_by_compatible(fdt, -1, "fsl,mpc85xx-usb2-mph");
588 if ((rcwsr11 & FSL_CORENET_RCWSR11_EC1) !=
589 FSL_CORENET_RCWSR11_EC1_FM1_USB1)
590 fdt_status_disabled(fdt, off);
591
592 off = fdt_node_offset_by_compatible(fdt, -1, "fsl,mpc85xx-usb2-dr");
593 if ((rcwsr11 & FSL_CORENET_RCWSR11_EC2) !=
594 FSL_CORENET_RCWSR11_EC2_USB2)
595 fdt_status_disabled(fdt, off);
596}
597#else
598#define fdt_fixup_usb(x)
599#endif
600
Kumar Galaf852ce72007-11-29 00:15:30 -0600601void ft_cpu_setup(void *blob, bd_t *bd)
602{
Haiying Wang2fc7eb02009-01-15 11:58:35 -0500603 int off;
604 int val;
605 sys_info_t sysinfo;
606
Kim Phillips6b70ffb2008-06-16 15:55:53 -0500607 /* delete crypto node if not on an E-processor */
608 if (!IS_E_PROCESSOR(get_svr()))
609 fdt_fixup_crypto_node(blob, 0);
Vakul Garg5e95e2d2013-01-23 22:52:31 +0000610#if CONFIG_SYS_FSL_SEC_COMPAT >= 4
611 else {
612 ccsr_sec_t __iomem *sec;
613
614 sec = (void __iomem *)CONFIG_SYS_FSL_SEC_ADDR;
615 fdt_fixup_crypto_node(blob, in_be32(&sec->secvid_ms));
616 }
617#endif
Kim Phillips6b70ffb2008-06-16 15:55:53 -0500618
Kumar Galaba37aa02008-08-19 15:41:18 -0500619 fdt_fixup_ethernet(blob);
Andy Fleming0e17f022008-10-07 08:09:50 -0500620
621 fdt_add_enet_stashing(blob);
Kumar Galaf852ce72007-11-29 00:15:30 -0600622
623 do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
Kumar Gala3c2a67e2009-09-17 01:52:37 -0500624 "timebase-frequency", get_tbclk(), 1);
Kumar Galaf852ce72007-11-29 00:15:30 -0600625 do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
626 "bus-frequency", bd->bi_busfreq, 1);
Haiying Wang2fc7eb02009-01-15 11:58:35 -0500627 get_sys_info(&sysinfo);
628 off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
629 while (off != -FDT_ERR_NOTFOUND) {
630 u32 *reg = (u32 *)fdt_getprop(blob, off, "reg", 0);
631 val = cpu_to_fdt32(sysinfo.freqProcessor[*reg]);
632 fdt_setprop(blob, off, "clock-frequency", &val, 4);
633 off = fdt_node_offset_by_prop_value(blob, off, "device_type",
634 "cpu", 4);
635 }
Kumar Galaf852ce72007-11-29 00:15:30 -0600636 do_fixup_by_prop_u32(blob, "device_type", "soc", 4,
637 "bus-frequency", bd->bi_busfreq, 1);
Trent Piepho58ec4862008-12-03 15:16:38 -0800638
639 do_fixup_by_compat_u32(blob, "fsl,pq3-localbus",
Simon Glass67ac13b2012-12-13 20:48:48 +0000640 "bus-frequency", gd->arch.lbc_clk, 1);
Trent Piepho58ec4862008-12-03 15:16:38 -0800641 do_fixup_by_compat_u32(blob, "fsl,elbc",
Simon Glass67ac13b2012-12-13 20:48:48 +0000642 "bus-frequency", gd->arch.lbc_clk, 1);
Kumar Galaf852ce72007-11-29 00:15:30 -0600643#ifdef CONFIG_QE
Kumar Gala69018ce2008-01-17 08:25:45 -0600644 ft_qe_setup(blob);
Liu Yu46df64f2010-01-15 14:58:40 +0800645 ft_fixup_qe_snum(blob);
Kumar Galaf852ce72007-11-29 00:15:30 -0600646#endif
647
Timur Tabiffadc442011-05-03 13:35:11 -0500648 fdt_fixup_fman_firmware(blob);
649
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200650#ifdef CONFIG_SYS_NS16550
Kumar Galaf852ce72007-11-29 00:15:30 -0600651 do_fixup_by_compat_u32(blob, "ns16550",
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200652 "clock-frequency", CONFIG_SYS_NS16550_CLK, 1);
Kumar Galaf852ce72007-11-29 00:15:30 -0600653#endif
654
655#ifdef CONFIG_CPM2
656 do_fixup_by_compat_u32(blob, "fsl,cpm2-scc-uart",
657 "current-speed", bd->bi_baudrate, 1);
658
659 do_fixup_by_compat_u32(blob, "fsl,cpm2-brg",
660 "clock-frequency", bd->bi_brgfreq, 1);
661#endif
662
Kumar Gala85f8cda2010-07-10 06:55:41 -0500663#ifdef CONFIG_FSL_CORENET
664 do_fixup_by_compat_u32(blob, "fsl,qoriq-clockgen-1.0",
665 "clock-frequency", CONFIG_SYS_CLK_FREQ, 1);
Dongsheng.wang@freescale.comf5c26232013-01-30 18:51:52 +0000666 do_fixup_by_compat_u32(blob, "fsl,mpic",
667 "clock-frequency", get_bus_freq(0)/2, 1);
668#else
669 do_fixup_by_compat_u32(blob, "fsl,mpic",
670 "clock-frequency", get_bus_freq(0), 1);
Kumar Gala85f8cda2010-07-10 06:55:41 -0500671#endif
672
Kumar Galaf852ce72007-11-29 00:15:30 -0600673 fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
Kumar Galaec2b74f2008-01-17 16:48:33 -0600674
675#ifdef CONFIG_MP
676 ft_fixup_cpu(blob, (u64)bd->bi_memstart + (u64)bd->bi_memsize);
Poonam Aggrwalf8027f62009-09-02 19:40:36 +0530677 ft_fixup_num_cores(blob);
Kumar Gala8f3a7fa2010-06-09 22:33:53 -0500678#endif
Kumar Gala730b2fc2008-05-29 11:22:06 -0500679
680 ft_fixup_cache(blob);
Dipen Dudhatda1cd952009-09-02 11:25:08 +0530681
682#if defined(CONFIG_FSL_ESDHC)
683 fdt_fixup_esdhc(blob, bd);
684#endif
Kumar Galabcad21f2009-03-19 02:46:28 -0500685
686 ft_fixup_dpaa_clks(blob);
Kumar Galadb977ab2009-09-10 03:02:13 -0500687
688#if defined(CONFIG_SYS_BMAN_MEM_PHYS)
689 fdt_portal(blob, "fsl,bman-portal", "bman-portals",
690 (u64)CONFIG_SYS_BMAN_MEM_PHYS,
691 CONFIG_SYS_BMAN_MEM_SIZE);
Haiying Wang2a0ffb82011-03-01 09:30:07 -0500692 fdt_fixup_bportals(blob);
Kumar Galadb977ab2009-09-10 03:02:13 -0500693#endif
694
695#if defined(CONFIG_SYS_QMAN_MEM_PHYS)
696 fdt_portal(blob, "fsl,qman-portal", "qman-portals",
697 (u64)CONFIG_SYS_QMAN_MEM_PHYS,
698 CONFIG_SYS_QMAN_MEM_SIZE);
699
700 fdt_fixup_qportals(blob);
701#endif
Kumar Galaa09b9b62010-12-30 12:09:53 -0600702
703#ifdef CONFIG_SYS_SRIO
704 ft_srio_setup(blob);
705#endif
bhaskar upadhayaf5feb5a2011-02-02 14:44:28 +0000706
707 /*
708 * system-clock = CCB clock/2
709 * Here gd->bus_clk = CCB clock
710 * We are using the system clock as 1588 Timer reference
711 * clock source select
712 */
713 do_fixup_by_compat_u32(blob, "fsl,gianfar-ptp-timer",
714 "timer-frequency", gd->bus_clk/2, 1);
Bhaskar Upadhaya65bb8b02011-03-04 20:27:58 +0530715
Jia Hongtao33c87532011-11-15 15:04:11 +0800716 /*
717 * clock-freq should change to clock-frequency and
718 * flexcan-v1.0 should change to p1010-flexcan respectively
719 * in the future.
720 */
Bhaskar Upadhaya65bb8b02011-03-04 20:27:58 +0530721 do_fixup_by_compat_u32(blob, "fsl,flexcan-v1.0",
Jia Hongtao33c87532011-11-15 15:04:11 +0800722 "clock_freq", gd->bus_clk/2, 1);
723
724 do_fixup_by_compat_u32(blob, "fsl,flexcan-v1.0",
725 "clock-frequency", gd->bus_clk/2, 1);
726
727 do_fixup_by_compat_u32(blob, "fsl,p1010-flexcan",
728 "clock-frequency", gd->bus_clk/2, 1);
Shengzhou Liuf81f19f2011-10-14 16:26:06 +0800729
730 fdt_fixup_usb(blob);
Kumar Galaf852ce72007-11-29 00:15:30 -0600731}
Timur Tabi90f89f02011-05-03 13:24:08 -0500732
733/*
734 * For some CCSR devices, we only have the virtual address, not the physical
735 * address. This is because we map CCSR as a whole, so we typically don't need
736 * a macro for the physical address of any device within CCSR. In this case,
737 * we calculate the physical address of that device using it's the difference
738 * between the virtual address of the device and the virtual address of the
739 * beginning of CCSR.
740 */
741#define CCSR_VIRT_TO_PHYS(x) \
742 (CONFIG_SYS_CCSRBAR_PHYS + ((x) - CONFIG_SYS_CCSRBAR))
743
Timur Tabicc15df52011-11-16 13:28:34 -0600744static void msg(const char *name, uint64_t uaddr, uint64_t daddr)
745{
746 printf("Warning: U-Boot configured %s at address %llx,\n"
747 "but the device tree has it at %llx\n", name, uaddr, daddr);
748}
749
Timur Tabi90f89f02011-05-03 13:24:08 -0500750/*
751 * Verify the device tree
752 *
753 * This function compares several CONFIG_xxx macros that contain physical
754 * addresses with the corresponding nodes in the device tree, to see if
755 * the physical addresses are all correct. For example, if
756 * CONFIG_SYS_NS16550_COM1 is defined, then it contains the virtual address
757 * of the first UART. We convert this to a physical address and compare
758 * that with the physical address of the first ns16550-compatible node
759 * in the device tree. If they don't match, then we display a warning.
760 *
761 * Returns 1 on success, 0 on failure
762 */
763int ft_verify_fdt(void *fdt)
764{
Timur Tabicc15df52011-11-16 13:28:34 -0600765 uint64_t addr = 0;
Timur Tabi90f89f02011-05-03 13:24:08 -0500766 int aliases;
767 int off;
768
769 /* First check the CCSR base address */
770 off = fdt_node_offset_by_prop_value(fdt, -1, "device_type", "soc", 4);
771 if (off > 0)
Timur Tabicc15df52011-11-16 13:28:34 -0600772 addr = fdt_get_base_address(fdt, off);
Timur Tabi90f89f02011-05-03 13:24:08 -0500773
Timur Tabicc15df52011-11-16 13:28:34 -0600774 if (!addr) {
Timur Tabi90f89f02011-05-03 13:24:08 -0500775 printf("Warning: could not determine base CCSR address in "
776 "device tree\n");
777 /* No point in checking anything else */
778 return 0;
779 }
780
Timur Tabicc15df52011-11-16 13:28:34 -0600781 if (addr != CONFIG_SYS_CCSRBAR_PHYS) {
782 msg("CCSR", CONFIG_SYS_CCSRBAR_PHYS, addr);
Timur Tabi90f89f02011-05-03 13:24:08 -0500783 /* No point in checking anything else */
784 return 0;
785 }
786
787 /*
Timur Tabicc15df52011-11-16 13:28:34 -0600788 * Check some nodes via aliases. We assume that U-Boot and the device
789 * tree enumerate the devices equally. E.g. the first serial port in
790 * U-Boot is the same as "serial0" in the device tree.
Timur Tabi90f89f02011-05-03 13:24:08 -0500791 */
792 aliases = fdt_path_offset(fdt, "/aliases");
793 if (aliases > 0) {
794#ifdef CONFIG_SYS_NS16550_COM1
795 if (!fdt_verify_alias_address(fdt, aliases, "serial0",
796 CCSR_VIRT_TO_PHYS(CONFIG_SYS_NS16550_COM1)))
797 return 0;
798#endif
799
800#ifdef CONFIG_SYS_NS16550_COM2
801 if (!fdt_verify_alias_address(fdt, aliases, "serial1",
802 CCSR_VIRT_TO_PHYS(CONFIG_SYS_NS16550_COM2)))
803 return 0;
804#endif
805 }
806
Timur Tabicc15df52011-11-16 13:28:34 -0600807 /*
808 * The localbus node is typically a root node, even though the lbc
809 * controller is part of CCSR. If we were to put the lbc node under
810 * the SOC node, then the 'ranges' property in the lbc node would
811 * translate through the 'ranges' property of the parent SOC node, and
812 * we don't want that. Since it's a separate node, it's possible for
813 * the 'reg' property to be wrong, so check it here. For now, we
814 * only check for "fsl,elbc" nodes.
815 */
816#ifdef CONFIG_SYS_LBC_ADDR
817 off = fdt_node_offset_by_compatible(fdt, -1, "fsl,elbc");
818 if (off > 0) {
Kim Phillips8aa5ec62013-01-16 14:00:11 +0000819 const fdt32_t *reg = fdt_getprop(fdt, off, "reg", NULL);
Timur Tabicc15df52011-11-16 13:28:34 -0600820 if (reg) {
821 uint64_t uaddr = CCSR_VIRT_TO_PHYS(CONFIG_SYS_LBC_ADDR);
822
823 addr = fdt_translate_address(fdt, off, reg);
824 if (uaddr != addr) {
825 msg("the localbus", uaddr, addr);
826 return 0;
827 }
828 }
829 }
830#endif
831
Timur Tabi90f89f02011-05-03 13:24:08 -0500832 return 1;
833}