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wdenk0157ced2002-10-21 17:04:47 +00001/*
Wolfgang Denk91a76752010-07-24 20:22:02 +02002 * (C) Copyright 2002-2010
wdenk0157ced2002-10-21 17:04:47 +00003 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#ifndef __ASM_GBL_DATA_H
25#define __ASM_GBL_DATA_H
Eran Libertyf046ccd2005-07-28 10:08:46 -050026
Peter Tyser34694242009-09-21 11:20:37 -050027#include "config.h"
Eran Libertyf046ccd2005-07-28 10:08:46 -050028#include "asm/types.h"
29
Simon Glass5cb48582012-12-13 20:48:30 +000030/* Architecture-specific global data */
31struct arch_global_data {
Simon Glass1206c182012-12-13 20:48:44 +000032#if defined(CONFIG_8xx)
33 unsigned long brg_clk;
34#endif
35#if defined(CONFIG_CPM2)
36 unsigned long brg_clk;
37#endif
38#if defined(CONFIG_QE)
39 u32 brg_clk;
40#endif
Simon Glass5cb48582012-12-13 20:48:30 +000041};
42
wdenk0157ced2002-10-21 17:04:47 +000043/*
44 * The following data structure is placed in some memory wich is
45 * available very early after boot (like DPRAM on MPC8xx/MPC82xx, or
46 * some locked parts of the data cache) to allow for a minimum set of
47 * global variables during system initialization (until we have set
48 * up the memory controller so that we can use RAM).
wdenk0157ced2002-10-21 17:04:47 +000049 */
50
51typedef struct global_data {
52 bd_t *bd;
53 unsigned long flags;
Simon Glassa7e5ee92012-10-12 14:21:14 +000054 unsigned int baudrate;
Bryan O'Donoghue77ff7b72008-02-17 22:57:47 +000055 unsigned long cpu_clk; /* CPU clock in Hz! */
wdenk0157ced2002-10-21 17:04:47 +000056 unsigned long bus_clk;
Jon Loeliger9c4c5ae2005-07-23 10:37:35 -050057#if defined(CONFIG_CPM2)
wdenk0157ced2002-10-21 17:04:47 +000058 /* There are many clocks on the MPC8260 - see page 9-5 */
59 unsigned long vco_out;
60 unsigned long cpm_clk;
61 unsigned long scc_clk;
Stefan Roesef2302d42008-08-06 14:05:38 +020062#ifdef CONFIG_PCI
63 unsigned long pci_clk;
64#endif
wdenk0157ced2002-10-21 17:04:47 +000065#endif
roy zang4c527832006-11-02 18:49:51 +080066 unsigned long mem_clk;
Peter Tyser0f898602009-05-22 17:23:24 -050067#if defined(CONFIG_MPC83xx)
Eran Libertyf046ccd2005-07-28 10:08:46 -050068 /* There are other clocks in the MPC83XX */
69 u32 csb_clk;
Ilya Yanok7c619dd2010-06-28 16:44:33 +040070#if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \
71 defined(CONFIG_MPC834x) || defined(CONFIG_MPC837x)
Eran Libertyf046ccd2005-07-28 10:08:46 -050072 u32 tsec1_clk;
73 u32 tsec2_clk;
Eran Libertyf046ccd2005-07-28 10:08:46 -050074 u32 usbdr_clk;
Gerlando Falautoa88731a2012-10-10 22:13:08 +000075#elif defined(CONFIG_MPC8309)
76 u32 usbdr_clk;
Scott Wood0f253282007-04-16 14:34:18 -050077#endif
Peter Tyser2c7920a2009-05-22 17:23:25 -050078#if defined (CONFIG_MPC834x)
Scott Wood0f253282007-04-16 14:34:18 -050079 u32 usbmph_clk;
Peter Tyser2c7920a2009-05-22 17:23:25 -050080#endif /* CONFIG_MPC834x */
Dave Liuc86ef2c2008-01-10 23:04:13 +080081#if defined(CONFIG_MPC8315)
Dave Liu555da612007-09-18 12:36:58 +080082 u32 tdm_clk;
83#endif
Dave Liu5f820432006-11-03 19:33:44 -060084 u32 core_clk;
Eran Libertyf046ccd2005-07-28 10:08:46 -050085 u32 enc_clk;
86 u32 lbiu_clk;
87 u32 lclk_clk;
Rafal Jaworowski6902df52005-10-17 02:39:53 +020088 u32 pci_clk;
Ilya Yanok7c619dd2010-06-28 16:44:33 +040089#if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \
90 defined(CONFIG_MPC837x)
Dave Liu03051c32007-09-18 12:36:11 +080091 u32 pciexp1_clk;
92 u32 pciexp2_clk;
Dave Liu555da612007-09-18 12:36:58 +080093#endif
Peter Tyser2c7920a2009-05-22 17:23:25 -050094#if defined(CONFIG_MPC837x) || defined(CONFIG_MPC8315)
Dave Liu03051c32007-09-18 12:36:11 +080095 u32 sata_clk;
96#endif
Andy Flemingda9d4612007-08-14 00:14:25 -050097#if defined(CONFIG_MPC8360)
Kim Phillips35cf1552008-03-28 10:18:40 -050098 u32 mem_sec_clk;
Andy Flemingda9d4612007-08-14 00:14:25 -050099#endif /* CONFIG_MPC8360 */
100#endif
Poonam Aggrwal728ece32009-08-05 13:29:24 +0530101#if defined(CONFIG_FSL_ESDHC)
Kumar Galaef50d6c2008-08-12 11:14:19 -0500102 u32 sdhc_clk;
103#endif
Trent Piephoada591d2008-12-03 15:16:37 -0800104#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
105 u32 lbc_clk;
Poonam Aggrwal0e870982009-07-31 12:08:14 +0530106 void *cpu;
Trent Piephoada591d2008-12-03 15:16:37 -0800107#endif /* CONFIG_MPC85xx || CONFIG_MPC86xx */
Peter Tyser0f898602009-05-22 17:23:24 -0500108#if defined(CONFIG_MPC83xx) || defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
Timur Tabi943afa22008-01-09 14:35:26 -0600109 u32 i2c1_clk;
110 u32 i2c2_clk;
111#endif
Dave Liu5f820432006-11-03 19:33:44 -0600112#if defined(CONFIG_QE)
113 u32 qe_clk;
Dave Liu7737d5c2006-11-03 12:11:15 -0600114 uint mp_alloc_base;
115 uint mp_alloc_top;
Dave Liu5f820432006-11-03 19:33:44 -0600116#endif /* CONFIG_QE */
Kumar Galaf0600542008-06-11 00:44:10 -0500117#if defined(CONFIG_FSL_LAW)
118 u32 used_laws;
119#endif
Kumar Gala94e94112009-11-12 10:26:16 -0600120#if defined(CONFIG_E500)
121 u32 used_tlb_cams[(CONFIG_SYS_NUM_TLBCAMS+31)/32];
122#endif
wdenkcbd8a352004-02-24 02:00:03 +0000123#if defined(CONFIG_MPC5xxx)
wdenk945af8d2003-07-16 21:53:01 +0000124 unsigned long ipb_clk;
125 unsigned long pci_clk;
126#endif
Rafal Jaworowski8993e542007-07-27 14:43:59 +0200127#if defined(CONFIG_MPC512X)
Grzegorz Bernacki5d49e0e2008-01-11 12:03:43 +0100128 u32 ips_clk;
Rafal Jaworowski8993e542007-07-27 14:43:59 +0200129 u32 csb_clk;
John Rigby5f91db72008-02-26 09:38:14 -0700130 u32 pci_clk;
Rafal Jaworowski8993e542007-07-27 14:43:59 +0200131#endif /* CONFIG_MPC512X */
wdenk983fda82004-10-28 00:09:35 +0000132#if defined(CONFIG_MPC8220)
133 unsigned long bExtUart;
134 unsigned long inp_clk;
135 unsigned long pci_clk;
136 unsigned long vco_clk;
137 unsigned long pev_clk;
138 unsigned long flb_clk;
139#endif
Becky Bruceb57ca3e2008-06-09 20:37:16 -0500140 phys_size_t ram_size; /* RAM size */
wdenk0157ced2002-10-21 17:04:47 +0000141 unsigned long reset_status; /* reset status register at boot */
Peter Tyser0f898602009-05-22 17:23:24 -0500142#if defined(CONFIG_MPC83xx)
Nick Spence46497052008-08-28 14:09:19 -0700143 unsigned long arbiter_event_attributes;
144 unsigned long arbiter_event_address;
145#endif
wdenk0157ced2002-10-21 17:04:47 +0000146 unsigned long env_addr; /* Address of Environment struct */
147 unsigned long env_valid; /* Checksum of Environment valid? */
148 unsigned long have_console; /* serial_init() was called */
Graeme Russ9558b482011-09-01 00:48:27 +0000149#ifdef CONFIG_PRE_CONSOLE_BUFFER
150 unsigned long precon_buf_idx; /* Pre-Console buffer index */
151#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200152#if defined(CONFIG_SYS_ALLOC_DPRAM) || defined(CONFIG_CPM2)
wdenk0157ced2002-10-21 17:04:47 +0000153 unsigned int dp_alloc_base;
154 unsigned int dp_alloc_top;
155#endif
Stefan Roesef10493c2007-10-23 11:31:05 +0200156#if defined(CONFIG_4xx)
157 u32 uart_clk;
158#endif /* CONFIG_4xx */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200159#if defined(CONFIG_SYS_GT_6426x)
wdenk0157ced2002-10-21 17:04:47 +0000160 unsigned int mirror_hack[16];
161#endif
wdenk756f5862005-04-03 15:51:42 +0000162#if defined(CONFIG_A3000) || \
163 defined(CONFIG_HIDDEN_DRAGON) || \
164 defined(CONFIG_MUSENKI) || \
165 defined(CONFIG_SANDPOINT)
wdenk0157ced2002-10-21 17:04:47 +0000166 void * console_addr;
167#endif
wdenkc7de8292002-11-19 11:04:11 +0000168 unsigned long relocaddr; /* Start address of U-Boot in RAM */
wdenk0157ced2002-10-21 17:04:47 +0000169#if defined(CONFIG_LCD) || defined(CONFIG_VIDEO)
170 unsigned long fb_base; /* Base address of framebuffer memory */
171#endif
wdenk667122a2003-07-15 21:50:34 +0000172#if defined(CONFIG_POST) || defined(CONFIG_LOGBUFFER)
wdenk228f29a2002-12-08 09:53:23 +0000173 unsigned long post_log_word; /* Record POST activities */
Valentin Longchamp79843952011-08-03 02:37:01 +0000174 unsigned long post_log_res; /* success of POST test */
wdenk4532cb62003-04-27 22:52:51 +0000175 unsigned long post_init_f_time; /* When post_init_f started */
wdenk228f29a2002-12-08 09:53:23 +0000176#endif
wdenk0157ced2002-10-21 17:04:47 +0000177#ifdef CONFIG_BOARD_TYPES
178 unsigned long board_type;
179#endif
wdenk4532cb62003-04-27 22:52:51 +0000180#ifdef CONFIG_MODEM_SUPPORT
181 unsigned long do_mdm_init;
182 unsigned long be_quiet;
183#endif
Stefan Roese3ad63872007-08-21 16:27:57 +0200184#if defined(CONFIG_LWMON) || defined(CONFIG_LWMON5)
wdenk4532cb62003-04-27 22:52:51 +0000185 unsigned long kbd_status;
wdenk8bde7f72003-06-27 21:31:46 +0000186#endif
Dirk Eibach2da0fc02011-01-21 09:31:21 +0100187#ifdef CONFIG_SYS_FPGA_COUNT
188 unsigned fpga_state[CONFIG_SYS_FPGA_COUNT];
189#endif
Yuri Tikhonovd32a8742008-04-06 19:19:14 +0200190#if defined(CONFIG_WD_MAX_RATE)
191 unsigned long long wdt_last; /* trace watch-dog triggering rate */
192#endif
wdenk27b207f2003-07-24 23:38:38 +0000193 void **jt; /* jump table */
Wolfgang Denk91a76752010-07-24 20:22:02 +0200194 char env_buf[32]; /* buffer for getenv() before reloc. */
Simon Glass5cb48582012-12-13 20:48:30 +0000195 struct arch_global_data arch; /* architecture-specific data */
wdenk0157ced2002-10-21 17:04:47 +0000196} gd_t;
197
Mike Frysinger47fde912012-03-18 14:31:24 +0000198#include <asm-generic/global_data_flags.h>
wdenk0157ced2002-10-21 17:04:47 +0000199
200#if 1
Wolfgang Denke7670f62008-02-14 22:43:22 +0100201#define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("r2")
wdenk0157ced2002-10-21 17:04:47 +0000202#else /* We could use plain global data, but the resulting code is bigger */
203#define XTRN_DECLARE_GLOBAL_DATA_PTR extern
204#define DECLARE_GLOBAL_DATA_PTR XTRN_DECLARE_GLOBAL_DATA_PTR \
205 gd_t *gd
206#endif
207
208#endif /* __ASM_GBL_DATA_H */