wdenk | 0157ced | 2002-10-21 17:04:47 +0000 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2002 |
| 3 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
| 4 | * |
| 5 | * See file CREDITS for list of people who contributed to this |
| 6 | * project. |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or |
| 9 | * modify it under the terms of the GNU General Public License as |
| 10 | * published by the Free Software Foundation; either version 2 of |
| 11 | * the License, or (at your option) any later version. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License |
| 19 | * along with this program; if not, write to the Free Software |
| 20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 21 | * MA 02111-1307 USA |
| 22 | */ |
| 23 | |
| 24 | #ifndef __ASM_GBL_DATA_H |
| 25 | #define __ASM_GBL_DATA_H |
Eran Liberty | f046ccd | 2005-07-28 10:08:46 -0500 | [diff] [blame] | 26 | |
| 27 | #include "asm/types.h" |
| 28 | |
wdenk | 0157ced | 2002-10-21 17:04:47 +0000 | [diff] [blame] | 29 | /* |
| 30 | * The following data structure is placed in some memory wich is |
| 31 | * available very early after boot (like DPRAM on MPC8xx/MPC82xx, or |
| 32 | * some locked parts of the data cache) to allow for a minimum set of |
| 33 | * global variables during system initialization (until we have set |
| 34 | * up the memory controller so that we can use RAM). |
| 35 | * |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 36 | * Keep it *SMALL* and remember to set CONFIG_SYS_GBL_DATA_SIZE > sizeof(gd_t) |
wdenk | 0157ced | 2002-10-21 17:04:47 +0000 | [diff] [blame] | 37 | */ |
| 38 | |
| 39 | typedef struct global_data { |
| 40 | bd_t *bd; |
| 41 | unsigned long flags; |
| 42 | unsigned long baudrate; |
Bryan O'Donoghue | 77ff7b7 | 2008-02-17 22:57:47 +0000 | [diff] [blame] | 43 | unsigned long cpu_clk; /* CPU clock in Hz! */ |
wdenk | 0157ced | 2002-10-21 17:04:47 +0000 | [diff] [blame] | 44 | unsigned long bus_clk; |
Bryan O'Donoghue | 77ff7b7 | 2008-02-17 22:57:47 +0000 | [diff] [blame] | 45 | #if defined(CONFIG_8xx) |
| 46 | unsigned long brg_clk; |
| 47 | #endif |
Jon Loeliger | 9c4c5ae | 2005-07-23 10:37:35 -0500 | [diff] [blame] | 48 | #if defined(CONFIG_CPM2) |
wdenk | 0157ced | 2002-10-21 17:04:47 +0000 | [diff] [blame] | 49 | /* There are many clocks on the MPC8260 - see page 9-5 */ |
| 50 | unsigned long vco_out; |
| 51 | unsigned long cpm_clk; |
| 52 | unsigned long scc_clk; |
| 53 | unsigned long brg_clk; |
Stefan Roese | f2302d4 | 2008-08-06 14:05:38 +0200 | [diff] [blame] | 54 | #ifdef CONFIG_PCI |
| 55 | unsigned long pci_clk; |
| 56 | #endif |
wdenk | 0157ced | 2002-10-21 17:04:47 +0000 | [diff] [blame] | 57 | #endif |
roy zang | 4c52783 | 2006-11-02 18:49:51 +0800 | [diff] [blame] | 58 | unsigned long mem_clk; |
Peter Tyser | 0f89860 | 2009-05-22 17:23:24 -0500 | [diff] [blame] | 59 | #if defined(CONFIG_MPC83xx) |
Eran Liberty | f046ccd | 2005-07-28 10:08:46 -0500 | [diff] [blame] | 60 | /* There are other clocks in the MPC83XX */ |
| 61 | u32 csb_clk; |
Peter Tyser | 2c7920a | 2009-05-22 17:23:25 -0500 | [diff] [blame] | 62 | #if defined(CONFIG_MPC834x) || defined(CONFIG_MPC831x) || defined(CONFIG_MPC837x) |
Eran Liberty | f046ccd | 2005-07-28 10:08:46 -0500 | [diff] [blame] | 63 | u32 tsec1_clk; |
| 64 | u32 tsec2_clk; |
Eran Liberty | f046ccd | 2005-07-28 10:08:46 -0500 | [diff] [blame] | 65 | u32 usbdr_clk; |
Scott Wood | 0f25328 | 2007-04-16 14:34:18 -0500 | [diff] [blame] | 66 | #endif |
Peter Tyser | 2c7920a | 2009-05-22 17:23:25 -0500 | [diff] [blame] | 67 | #if defined (CONFIG_MPC834x) |
Scott Wood | 0f25328 | 2007-04-16 14:34:18 -0500 | [diff] [blame] | 68 | u32 usbmph_clk; |
Peter Tyser | 2c7920a | 2009-05-22 17:23:25 -0500 | [diff] [blame] | 69 | #endif /* CONFIG_MPC834x */ |
Dave Liu | c86ef2c | 2008-01-10 23:04:13 +0800 | [diff] [blame] | 70 | #if defined(CONFIG_MPC8315) |
Dave Liu | 555da61 | 2007-09-18 12:36:58 +0800 | [diff] [blame] | 71 | u32 tdm_clk; |
| 72 | #endif |
Dave Liu | 5f82043 | 2006-11-03 19:33:44 -0600 | [diff] [blame] | 73 | u32 core_clk; |
Eran Liberty | f046ccd | 2005-07-28 10:08:46 -0500 | [diff] [blame] | 74 | u32 enc_clk; |
| 75 | u32 lbiu_clk; |
| 76 | u32 lclk_clk; |
Rafal Jaworowski | 6902df5 | 2005-10-17 02:39:53 +0200 | [diff] [blame] | 77 | u32 pci_clk; |
Peter Tyser | 2c7920a | 2009-05-22 17:23:25 -0500 | [diff] [blame] | 78 | #if defined(CONFIG_MPC837x) || defined(CONFIG_MPC831x) |
Dave Liu | 03051c3 | 2007-09-18 12:36:11 +0800 | [diff] [blame] | 79 | u32 pciexp1_clk; |
| 80 | u32 pciexp2_clk; |
Dave Liu | 555da61 | 2007-09-18 12:36:58 +0800 | [diff] [blame] | 81 | #endif |
Peter Tyser | 2c7920a | 2009-05-22 17:23:25 -0500 | [diff] [blame] | 82 | #if defined(CONFIG_MPC837x) || defined(CONFIG_MPC8315) |
Dave Liu | 03051c3 | 2007-09-18 12:36:11 +0800 | [diff] [blame] | 83 | u32 sata_clk; |
| 84 | #endif |
Andy Fleming | da9d461 | 2007-08-14 00:14:25 -0500 | [diff] [blame] | 85 | #if defined(CONFIG_MPC8360) |
Kim Phillips | 35cf155 | 2008-03-28 10:18:40 -0500 | [diff] [blame] | 86 | u32 mem_sec_clk; |
Andy Fleming | da9d461 | 2007-08-14 00:14:25 -0500 | [diff] [blame] | 87 | #endif /* CONFIG_MPC8360 */ |
| 88 | #endif |
Peter Tyser | 2c7920a | 2009-05-22 17:23:25 -0500 | [diff] [blame] | 89 | #if defined(CONFIG_MPC837x) || defined(CONFIG_MPC8536) |
Kumar Gala | ef50d6c | 2008-08-12 11:14:19 -0500 | [diff] [blame] | 90 | u32 sdhc_clk; |
| 91 | #endif |
Trent Piepho | ada591d | 2008-12-03 15:16:37 -0800 | [diff] [blame] | 92 | #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) |
| 93 | u32 lbc_clk; |
Poonam Aggrwal | 0e87098 | 2009-07-31 12:08:14 +0530 | [diff] [blame^] | 94 | void *cpu; |
Trent Piepho | ada591d | 2008-12-03 15:16:37 -0800 | [diff] [blame] | 95 | #endif /* CONFIG_MPC85xx || CONFIG_MPC86xx */ |
Peter Tyser | 0f89860 | 2009-05-22 17:23:24 -0500 | [diff] [blame] | 96 | #if defined(CONFIG_MPC83xx) || defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) |
Timur Tabi | 943afa2 | 2008-01-09 14:35:26 -0600 | [diff] [blame] | 97 | u32 i2c1_clk; |
| 98 | u32 i2c2_clk; |
| 99 | #endif |
Dave Liu | 5f82043 | 2006-11-03 19:33:44 -0600 | [diff] [blame] | 100 | #if defined(CONFIG_QE) |
| 101 | u32 qe_clk; |
| 102 | u32 brg_clk; |
Dave Liu | 7737d5c | 2006-11-03 12:11:15 -0600 | [diff] [blame] | 103 | uint mp_alloc_base; |
| 104 | uint mp_alloc_top; |
Dave Liu | 5f82043 | 2006-11-03 19:33:44 -0600 | [diff] [blame] | 105 | #endif /* CONFIG_QE */ |
Kumar Gala | f060054 | 2008-06-11 00:44:10 -0500 | [diff] [blame] | 106 | #if defined(CONFIG_FSL_LAW) |
| 107 | u32 used_laws; |
| 108 | #endif |
wdenk | cbd8a35 | 2004-02-24 02:00:03 +0000 | [diff] [blame] | 109 | #if defined(CONFIG_MPC5xxx) |
wdenk | 945af8d | 2003-07-16 21:53:01 +0000 | [diff] [blame] | 110 | unsigned long ipb_clk; |
| 111 | unsigned long pci_clk; |
| 112 | #endif |
Rafal Jaworowski | 8993e54 | 2007-07-27 14:43:59 +0200 | [diff] [blame] | 113 | #if defined(CONFIG_MPC512X) |
Grzegorz Bernacki | 5d49e0e | 2008-01-11 12:03:43 +0100 | [diff] [blame] | 114 | u32 ips_clk; |
Rafal Jaworowski | 8993e54 | 2007-07-27 14:43:59 +0200 | [diff] [blame] | 115 | u32 csb_clk; |
John Rigby | 5f91db7 | 2008-02-26 09:38:14 -0700 | [diff] [blame] | 116 | u32 pci_clk; |
Rafal Jaworowski | 8993e54 | 2007-07-27 14:43:59 +0200 | [diff] [blame] | 117 | #endif /* CONFIG_MPC512X */ |
wdenk | 983fda8 | 2004-10-28 00:09:35 +0000 | [diff] [blame] | 118 | #if defined(CONFIG_MPC8220) |
| 119 | unsigned long bExtUart; |
| 120 | unsigned long inp_clk; |
| 121 | unsigned long pci_clk; |
| 122 | unsigned long vco_clk; |
| 123 | unsigned long pev_clk; |
| 124 | unsigned long flb_clk; |
| 125 | #endif |
Becky Bruce | b57ca3e | 2008-06-09 20:37:16 -0500 | [diff] [blame] | 126 | phys_size_t ram_size; /* RAM size */ |
wdenk | 0157ced | 2002-10-21 17:04:47 +0000 | [diff] [blame] | 127 | unsigned long reloc_off; /* Relocation Offset */ |
| 128 | unsigned long reset_status; /* reset status register at boot */ |
Peter Tyser | 0f89860 | 2009-05-22 17:23:24 -0500 | [diff] [blame] | 129 | #if defined(CONFIG_MPC83xx) |
Nick Spence | 4649705 | 2008-08-28 14:09:19 -0700 | [diff] [blame] | 130 | unsigned long arbiter_event_attributes; |
| 131 | unsigned long arbiter_event_address; |
| 132 | #endif |
wdenk | 0157ced | 2002-10-21 17:04:47 +0000 | [diff] [blame] | 133 | unsigned long env_addr; /* Address of Environment struct */ |
| 134 | unsigned long env_valid; /* Checksum of Environment valid? */ |
| 135 | unsigned long have_console; /* serial_init() was called */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 136 | #if defined(CONFIG_SYS_ALLOC_DPRAM) || defined(CONFIG_CPM2) |
wdenk | 0157ced | 2002-10-21 17:04:47 +0000 | [diff] [blame] | 137 | unsigned int dp_alloc_base; |
| 138 | unsigned int dp_alloc_top; |
| 139 | #endif |
Stefan Roese | f10493c | 2007-10-23 11:31:05 +0200 | [diff] [blame] | 140 | #if defined(CONFIG_4xx) |
| 141 | u32 uart_clk; |
| 142 | #endif /* CONFIG_4xx */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 143 | #if defined(CONFIG_SYS_GT_6426x) |
wdenk | 0157ced | 2002-10-21 17:04:47 +0000 | [diff] [blame] | 144 | unsigned int mirror_hack[16]; |
| 145 | #endif |
wdenk | 756f586 | 2005-04-03 15:51:42 +0000 | [diff] [blame] | 146 | #if defined(CONFIG_A3000) || \ |
| 147 | defined(CONFIG_HIDDEN_DRAGON) || \ |
| 148 | defined(CONFIG_MUSENKI) || \ |
| 149 | defined(CONFIG_SANDPOINT) |
wdenk | 0157ced | 2002-10-21 17:04:47 +0000 | [diff] [blame] | 150 | void * console_addr; |
| 151 | #endif |
wdenk | c7de829 | 2002-11-19 11:04:11 +0000 | [diff] [blame] | 152 | #ifdef CONFIG_AMIGAONEG3SE |
| 153 | unsigned long relocaddr; /* Start address of U-Boot in RAM */ |
| 154 | #endif |
wdenk | 0157ced | 2002-10-21 17:04:47 +0000 | [diff] [blame] | 155 | #if defined(CONFIG_LCD) || defined(CONFIG_VIDEO) |
| 156 | unsigned long fb_base; /* Base address of framebuffer memory */ |
| 157 | #endif |
wdenk | 667122a | 2003-07-15 21:50:34 +0000 | [diff] [blame] | 158 | #if defined(CONFIG_POST) || defined(CONFIG_LOGBUFFER) |
wdenk | 228f29a | 2002-12-08 09:53:23 +0000 | [diff] [blame] | 159 | unsigned long post_log_word; /* Record POST activities */ |
wdenk | 4532cb6 | 2003-04-27 22:52:51 +0000 | [diff] [blame] | 160 | unsigned long post_init_f_time; /* When post_init_f started */ |
wdenk | 228f29a | 2002-12-08 09:53:23 +0000 | [diff] [blame] | 161 | #endif |
wdenk | 0157ced | 2002-10-21 17:04:47 +0000 | [diff] [blame] | 162 | #ifdef CONFIG_BOARD_TYPES |
| 163 | unsigned long board_type; |
| 164 | #endif |
wdenk | 4532cb6 | 2003-04-27 22:52:51 +0000 | [diff] [blame] | 165 | #ifdef CONFIG_MODEM_SUPPORT |
| 166 | unsigned long do_mdm_init; |
| 167 | unsigned long be_quiet; |
| 168 | #endif |
Stefan Roese | 3ad6387 | 2007-08-21 16:27:57 +0200 | [diff] [blame] | 169 | #if defined(CONFIG_LWMON) || defined(CONFIG_LWMON5) |
wdenk | 4532cb6 | 2003-04-27 22:52:51 +0000 | [diff] [blame] | 170 | unsigned long kbd_status; |
wdenk | 8bde7f7 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 171 | #endif |
Yuri Tikhonov | d32a874 | 2008-04-06 19:19:14 +0200 | [diff] [blame] | 172 | #if defined(CONFIG_WD_MAX_RATE) |
| 173 | unsigned long long wdt_last; /* trace watch-dog triggering rate */ |
| 174 | #endif |
wdenk | 27b207f | 2003-07-24 23:38:38 +0000 | [diff] [blame] | 175 | void **jt; /* jump table */ |
wdenk | 0157ced | 2002-10-21 17:04:47 +0000 | [diff] [blame] | 176 | } gd_t; |
| 177 | |
| 178 | /* |
| 179 | * Global Data Flags |
| 180 | */ |
| 181 | #define GD_FLG_RELOC 0x00001 /* Code was relocated to RAM */ |
| 182 | #define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */ |
wdenk | f72da34 | 2003-10-10 10:05:42 +0000 | [diff] [blame] | 183 | #define GD_FLG_SILENT 0x00004 /* Silent mode */ |
Yuri Tikhonov | b428f6a | 2008-02-04 14:11:03 +0100 | [diff] [blame] | 184 | #define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */ |
Yuri Tikhonov | 28a3850 | 2008-05-08 15:45:26 +0200 | [diff] [blame] | 185 | #define GD_FLG_POSTSTOP 0x00010 /* POST seqeunce aborted */ |
Yuri Tikhonov | 0e15ddd | 2008-05-08 15:46:42 +0200 | [diff] [blame] | 186 | #define GD_FLG_LOGINIT 0x00020 /* Log Buffer has been initialized */ |
Mark Jackson | f5c3ba7 | 2008-08-25 19:21:30 +0100 | [diff] [blame] | 187 | #define GD_FLG_DISABLE_CONSOLE 0x00040 /* Disable console (in & out) */ |
wdenk | 0157ced | 2002-10-21 17:04:47 +0000 | [diff] [blame] | 188 | |
| 189 | #if 1 |
Wolfgang Denk | e7670f6 | 2008-02-14 22:43:22 +0100 | [diff] [blame] | 190 | #define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("r2") |
wdenk | 0157ced | 2002-10-21 17:04:47 +0000 | [diff] [blame] | 191 | #else /* We could use plain global data, but the resulting code is bigger */ |
| 192 | #define XTRN_DECLARE_GLOBAL_DATA_PTR extern |
| 193 | #define DECLARE_GLOBAL_DATA_PTR XTRN_DECLARE_GLOBAL_DATA_PTR \ |
| 194 | gd_t *gd |
| 195 | #endif |
| 196 | |
| 197 | #endif /* __ASM_GBL_DATA_H */ |