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wdenk0157ced2002-10-21 17:04:47 +00001/*
Wolfgang Denk91a76752010-07-24 20:22:02 +02002 * (C) Copyright 2002-2010
wdenk0157ced2002-10-21 17:04:47 +00003 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#ifndef __ASM_GBL_DATA_H
25#define __ASM_GBL_DATA_H
Eran Libertyf046ccd2005-07-28 10:08:46 -050026
Peter Tyser34694242009-09-21 11:20:37 -050027#include "config.h"
Eran Libertyf046ccd2005-07-28 10:08:46 -050028#include "asm/types.h"
29
Simon Glass5cb48582012-12-13 20:48:30 +000030/* Architecture-specific global data */
31struct arch_global_data {
32};
33
wdenk0157ced2002-10-21 17:04:47 +000034/*
35 * The following data structure is placed in some memory wich is
36 * available very early after boot (like DPRAM on MPC8xx/MPC82xx, or
37 * some locked parts of the data cache) to allow for a minimum set of
38 * global variables during system initialization (until we have set
39 * up the memory controller so that we can use RAM).
wdenk0157ced2002-10-21 17:04:47 +000040 */
41
42typedef struct global_data {
43 bd_t *bd;
44 unsigned long flags;
Simon Glassa7e5ee92012-10-12 14:21:14 +000045 unsigned int baudrate;
Bryan O'Donoghue77ff7b72008-02-17 22:57:47 +000046 unsigned long cpu_clk; /* CPU clock in Hz! */
wdenk0157ced2002-10-21 17:04:47 +000047 unsigned long bus_clk;
Bryan O'Donoghue77ff7b72008-02-17 22:57:47 +000048#if defined(CONFIG_8xx)
49 unsigned long brg_clk;
50#endif
Jon Loeliger9c4c5ae2005-07-23 10:37:35 -050051#if defined(CONFIG_CPM2)
wdenk0157ced2002-10-21 17:04:47 +000052 /* There are many clocks on the MPC8260 - see page 9-5 */
53 unsigned long vco_out;
54 unsigned long cpm_clk;
55 unsigned long scc_clk;
56 unsigned long brg_clk;
Stefan Roesef2302d42008-08-06 14:05:38 +020057#ifdef CONFIG_PCI
58 unsigned long pci_clk;
59#endif
wdenk0157ced2002-10-21 17:04:47 +000060#endif
roy zang4c527832006-11-02 18:49:51 +080061 unsigned long mem_clk;
Peter Tyser0f898602009-05-22 17:23:24 -050062#if defined(CONFIG_MPC83xx)
Eran Libertyf046ccd2005-07-28 10:08:46 -050063 /* There are other clocks in the MPC83XX */
64 u32 csb_clk;
Ilya Yanok7c619dd2010-06-28 16:44:33 +040065#if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \
66 defined(CONFIG_MPC834x) || defined(CONFIG_MPC837x)
Eran Libertyf046ccd2005-07-28 10:08:46 -050067 u32 tsec1_clk;
68 u32 tsec2_clk;
Eran Libertyf046ccd2005-07-28 10:08:46 -050069 u32 usbdr_clk;
Gerlando Falautoa88731a2012-10-10 22:13:08 +000070#elif defined(CONFIG_MPC8309)
71 u32 usbdr_clk;
Scott Wood0f253282007-04-16 14:34:18 -050072#endif
Peter Tyser2c7920a2009-05-22 17:23:25 -050073#if defined (CONFIG_MPC834x)
Scott Wood0f253282007-04-16 14:34:18 -050074 u32 usbmph_clk;
Peter Tyser2c7920a2009-05-22 17:23:25 -050075#endif /* CONFIG_MPC834x */
Dave Liuc86ef2c2008-01-10 23:04:13 +080076#if defined(CONFIG_MPC8315)
Dave Liu555da612007-09-18 12:36:58 +080077 u32 tdm_clk;
78#endif
Dave Liu5f820432006-11-03 19:33:44 -060079 u32 core_clk;
Eran Libertyf046ccd2005-07-28 10:08:46 -050080 u32 enc_clk;
81 u32 lbiu_clk;
82 u32 lclk_clk;
Rafal Jaworowski6902df52005-10-17 02:39:53 +020083 u32 pci_clk;
Ilya Yanok7c619dd2010-06-28 16:44:33 +040084#if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \
85 defined(CONFIG_MPC837x)
Dave Liu03051c32007-09-18 12:36:11 +080086 u32 pciexp1_clk;
87 u32 pciexp2_clk;
Dave Liu555da612007-09-18 12:36:58 +080088#endif
Peter Tyser2c7920a2009-05-22 17:23:25 -050089#if defined(CONFIG_MPC837x) || defined(CONFIG_MPC8315)
Dave Liu03051c32007-09-18 12:36:11 +080090 u32 sata_clk;
91#endif
Andy Flemingda9d4612007-08-14 00:14:25 -050092#if defined(CONFIG_MPC8360)
Kim Phillips35cf1552008-03-28 10:18:40 -050093 u32 mem_sec_clk;
Andy Flemingda9d4612007-08-14 00:14:25 -050094#endif /* CONFIG_MPC8360 */
95#endif
Poonam Aggrwal728ece32009-08-05 13:29:24 +053096#if defined(CONFIG_FSL_ESDHC)
Kumar Galaef50d6c2008-08-12 11:14:19 -050097 u32 sdhc_clk;
98#endif
Trent Piephoada591d2008-12-03 15:16:37 -080099#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
100 u32 lbc_clk;
Poonam Aggrwal0e870982009-07-31 12:08:14 +0530101 void *cpu;
Trent Piephoada591d2008-12-03 15:16:37 -0800102#endif /* CONFIG_MPC85xx || CONFIG_MPC86xx */
Peter Tyser0f898602009-05-22 17:23:24 -0500103#if defined(CONFIG_MPC83xx) || defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
Timur Tabi943afa22008-01-09 14:35:26 -0600104 u32 i2c1_clk;
105 u32 i2c2_clk;
106#endif
Dave Liu5f820432006-11-03 19:33:44 -0600107#if defined(CONFIG_QE)
108 u32 qe_clk;
109 u32 brg_clk;
Dave Liu7737d5c2006-11-03 12:11:15 -0600110 uint mp_alloc_base;
111 uint mp_alloc_top;
Dave Liu5f820432006-11-03 19:33:44 -0600112#endif /* CONFIG_QE */
Kumar Galaf0600542008-06-11 00:44:10 -0500113#if defined(CONFIG_FSL_LAW)
114 u32 used_laws;
115#endif
Kumar Gala94e94112009-11-12 10:26:16 -0600116#if defined(CONFIG_E500)
117 u32 used_tlb_cams[(CONFIG_SYS_NUM_TLBCAMS+31)/32];
118#endif
wdenkcbd8a352004-02-24 02:00:03 +0000119#if defined(CONFIG_MPC5xxx)
wdenk945af8d2003-07-16 21:53:01 +0000120 unsigned long ipb_clk;
121 unsigned long pci_clk;
122#endif
Rafal Jaworowski8993e542007-07-27 14:43:59 +0200123#if defined(CONFIG_MPC512X)
Grzegorz Bernacki5d49e0e2008-01-11 12:03:43 +0100124 u32 ips_clk;
Rafal Jaworowski8993e542007-07-27 14:43:59 +0200125 u32 csb_clk;
John Rigby5f91db72008-02-26 09:38:14 -0700126 u32 pci_clk;
Rafal Jaworowski8993e542007-07-27 14:43:59 +0200127#endif /* CONFIG_MPC512X */
wdenk983fda82004-10-28 00:09:35 +0000128#if defined(CONFIG_MPC8220)
129 unsigned long bExtUart;
130 unsigned long inp_clk;
131 unsigned long pci_clk;
132 unsigned long vco_clk;
133 unsigned long pev_clk;
134 unsigned long flb_clk;
135#endif
Becky Bruceb57ca3e2008-06-09 20:37:16 -0500136 phys_size_t ram_size; /* RAM size */
wdenk0157ced2002-10-21 17:04:47 +0000137 unsigned long reset_status; /* reset status register at boot */
Peter Tyser0f898602009-05-22 17:23:24 -0500138#if defined(CONFIG_MPC83xx)
Nick Spence46497052008-08-28 14:09:19 -0700139 unsigned long arbiter_event_attributes;
140 unsigned long arbiter_event_address;
141#endif
wdenk0157ced2002-10-21 17:04:47 +0000142 unsigned long env_addr; /* Address of Environment struct */
143 unsigned long env_valid; /* Checksum of Environment valid? */
144 unsigned long have_console; /* serial_init() was called */
Graeme Russ9558b482011-09-01 00:48:27 +0000145#ifdef CONFIG_PRE_CONSOLE_BUFFER
146 unsigned long precon_buf_idx; /* Pre-Console buffer index */
147#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200148#if defined(CONFIG_SYS_ALLOC_DPRAM) || defined(CONFIG_CPM2)
wdenk0157ced2002-10-21 17:04:47 +0000149 unsigned int dp_alloc_base;
150 unsigned int dp_alloc_top;
151#endif
Stefan Roesef10493c2007-10-23 11:31:05 +0200152#if defined(CONFIG_4xx)
153 u32 uart_clk;
154#endif /* CONFIG_4xx */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200155#if defined(CONFIG_SYS_GT_6426x)
wdenk0157ced2002-10-21 17:04:47 +0000156 unsigned int mirror_hack[16];
157#endif
wdenk756f5862005-04-03 15:51:42 +0000158#if defined(CONFIG_A3000) || \
159 defined(CONFIG_HIDDEN_DRAGON) || \
160 defined(CONFIG_MUSENKI) || \
161 defined(CONFIG_SANDPOINT)
wdenk0157ced2002-10-21 17:04:47 +0000162 void * console_addr;
163#endif
wdenkc7de8292002-11-19 11:04:11 +0000164 unsigned long relocaddr; /* Start address of U-Boot in RAM */
wdenk0157ced2002-10-21 17:04:47 +0000165#if defined(CONFIG_LCD) || defined(CONFIG_VIDEO)
166 unsigned long fb_base; /* Base address of framebuffer memory */
167#endif
wdenk667122a2003-07-15 21:50:34 +0000168#if defined(CONFIG_POST) || defined(CONFIG_LOGBUFFER)
wdenk228f29a2002-12-08 09:53:23 +0000169 unsigned long post_log_word; /* Record POST activities */
Valentin Longchamp79843952011-08-03 02:37:01 +0000170 unsigned long post_log_res; /* success of POST test */
wdenk4532cb62003-04-27 22:52:51 +0000171 unsigned long post_init_f_time; /* When post_init_f started */
wdenk228f29a2002-12-08 09:53:23 +0000172#endif
wdenk0157ced2002-10-21 17:04:47 +0000173#ifdef CONFIG_BOARD_TYPES
174 unsigned long board_type;
175#endif
wdenk4532cb62003-04-27 22:52:51 +0000176#ifdef CONFIG_MODEM_SUPPORT
177 unsigned long do_mdm_init;
178 unsigned long be_quiet;
179#endif
Stefan Roese3ad63872007-08-21 16:27:57 +0200180#if defined(CONFIG_LWMON) || defined(CONFIG_LWMON5)
wdenk4532cb62003-04-27 22:52:51 +0000181 unsigned long kbd_status;
wdenk8bde7f72003-06-27 21:31:46 +0000182#endif
Dirk Eibach2da0fc02011-01-21 09:31:21 +0100183#ifdef CONFIG_SYS_FPGA_COUNT
184 unsigned fpga_state[CONFIG_SYS_FPGA_COUNT];
185#endif
Yuri Tikhonovd32a8742008-04-06 19:19:14 +0200186#if defined(CONFIG_WD_MAX_RATE)
187 unsigned long long wdt_last; /* trace watch-dog triggering rate */
188#endif
wdenk27b207f2003-07-24 23:38:38 +0000189 void **jt; /* jump table */
Wolfgang Denk91a76752010-07-24 20:22:02 +0200190 char env_buf[32]; /* buffer for getenv() before reloc. */
Simon Glass5cb48582012-12-13 20:48:30 +0000191 struct arch_global_data arch; /* architecture-specific data */
wdenk0157ced2002-10-21 17:04:47 +0000192} gd_t;
193
Mike Frysinger47fde912012-03-18 14:31:24 +0000194#include <asm-generic/global_data_flags.h>
wdenk0157ced2002-10-21 17:04:47 +0000195
196#if 1
Wolfgang Denke7670f62008-02-14 22:43:22 +0100197#define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("r2")
wdenk0157ced2002-10-21 17:04:47 +0000198#else /* We could use plain global data, but the resulting code is bigger */
199#define XTRN_DECLARE_GLOBAL_DATA_PTR extern
200#define DECLARE_GLOBAL_DATA_PTR XTRN_DECLARE_GLOBAL_DATA_PTR \
201 gd_t *gd
202#endif
203
204#endif /* __ASM_GBL_DATA_H */