Sascha Hauer | caebc95 | 2008-03-26 20:41:09 +0100 | [diff] [blame] | 1 | /* |
| 2 | * |
| 3 | * (c) 2007 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de> |
| 4 | * |
| 5 | * See file CREDITS for list of people who contributed to this |
| 6 | * project. |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or |
| 9 | * modify it under the terms of the GNU General Public License as |
| 10 | * published by the Free Software Foundation; either version 2 of |
| 11 | * the License, or (at your option) any later version. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License |
| 19 | * along with this program; if not, write to the Free Software |
| 20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 21 | * MA 02111-1307 USA |
| 22 | */ |
| 23 | |
| 24 | |
| 25 | #include <common.h> |
Ben Warren | 736fead | 2009-07-20 22:01:11 -0700 | [diff] [blame] | 26 | #include <netdev.h> |
Stefano Babic | 8627111 | 2011-03-14 15:43:56 +0100 | [diff] [blame] | 27 | #include <asm/arch/clock.h> |
| 28 | #include <asm/arch/imx-regs.h> |
Helmut Raiger | 47c5455 | 2011-09-29 05:45:03 +0000 | [diff] [blame] | 29 | #include <asm/arch/sys_proto.h> |
Sascha Hauer | caebc95 | 2008-03-26 20:41:09 +0100 | [diff] [blame] | 30 | |
| 31 | DECLARE_GLOBAL_DATA_PTR; |
| 32 | |
Fabio Estevam | 4e37731 | 2011-06-05 14:56:02 +0000 | [diff] [blame] | 33 | int dram_init(void) |
Sascha Hauer | caebc95 | 2008-03-26 20:41:09 +0100 | [diff] [blame] | 34 | { |
Fabio Estevam | 4e37731 | 2011-06-05 14:56:02 +0000 | [diff] [blame] | 35 | /* dram_init must store complete ramsize in gd->ram_size */ |
Albert ARIBAUD | a55d23c | 2011-07-03 05:55:33 +0000 | [diff] [blame] | 36 | gd->ram_size = get_ram_size((void *)PHYS_SDRAM_1, |
Fabio Estevam | 4e37731 | 2011-06-05 14:56:02 +0000 | [diff] [blame] | 37 | PHYS_SDRAM_1_SIZE); |
Sascha Hauer | caebc95 | 2008-03-26 20:41:09 +0100 | [diff] [blame] | 38 | return 0; |
| 39 | } |
| 40 | |
Fabio Estevam | 4e37731 | 2011-06-05 14:56:02 +0000 | [diff] [blame] | 41 | int board_early_init_f(void) |
Sascha Hauer | caebc95 | 2008-03-26 20:41:09 +0100 | [diff] [blame] | 42 | { |
Helmut Raiger | 47c5455 | 2011-09-29 05:45:03 +0000 | [diff] [blame] | 43 | /* CS0: Nor Flash */ |
| 44 | static const struct mxc_weimcs cs0 = { |
| 45 | /* sp wp bcd bcs psz pme sync dol cnc wsc ew wws edc */ |
| 46 | CSCR_U(0, 0, 0, 0, 0, 0, 0, 0, 3, 15, 0, 0, 3), |
| 47 | /* oea oen ebwa ebwn csa ebc dsz csn psr cre wrap csen */ |
| 48 | CSCR_L(10, 0, 3, 3, 0, 1, 5, 0, 0, 0, 0, 1), |
| 49 | /* ebra ebrn rwa rwn mum lah lbn lba dww dct wwu age cnc2 fce*/ |
| 50 | CSCR_A(0, 0, 2, 2, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0) |
| 51 | }; |
Sascha Hauer | caebc95 | 2008-03-26 20:41:09 +0100 | [diff] [blame] | 52 | |
Helmut Raiger | 47c5455 | 2011-09-29 05:45:03 +0000 | [diff] [blame] | 53 | /* CS4: Network Controller */ |
| 54 | static const struct mxc_weimcs cs4 = { |
| 55 | /* sp wp bcd bcs psz pme sync dol cnc wsc ew wws edc */ |
| 56 | CSCR_U(0, 0, 0, 0, 0, 0, 0, 0, 3, 28, 1, 7, 6), |
| 57 | /* oea oen ebwa ebwn csa ebc dsz csn psr cre wrap csen */ |
| 58 | CSCR_L(4, 4, 4, 10, 4, 0, 5, 4, 0, 0, 0, 1), |
| 59 | /* ebra ebrn rwa rwn mum lah lbn lba dww dct wwu age cnc2 fce*/ |
| 60 | CSCR_A(4, 4, 4, 4, 0, 1, 4, 3, 0, 0, 0, 0, 1, 0) |
| 61 | }; |
| 62 | |
| 63 | mxc_setup_weimcs(0, &cs0); |
| 64 | mxc_setup_weimcs(4, &cs4); |
Sascha Hauer | caebc95 | 2008-03-26 20:41:09 +0100 | [diff] [blame] | 65 | |
| 66 | /* setup pins for UART1 */ |
| 67 | mx31_gpio_mux(MUX_RXD1__UART1_RXD_MUX); |
| 68 | mx31_gpio_mux(MUX_TXD1__UART1_TXD_MUX); |
| 69 | mx31_gpio_mux(MUX_RTS1__UART1_RTS_B); |
Magnus Lilja | b6b183c | 2008-08-03 21:43:37 +0200 | [diff] [blame] | 70 | mx31_gpio_mux(MUX_CTS1__UART1_CTS_B); |
Sascha Hauer | caebc95 | 2008-03-26 20:41:09 +0100 | [diff] [blame] | 71 | |
Magnus Lilja | f9204e1 | 2008-04-20 10:38:12 +0200 | [diff] [blame] | 72 | /* SPI2 */ |
Magnus Lilja | 5276a35 | 2008-08-03 21:44:10 +0200 | [diff] [blame] | 73 | mx31_gpio_mux(MUX_CSPI2_SS2__CSPI2_SS2_B); |
| 74 | mx31_gpio_mux(MUX_CSPI2_SCLK__CSPI2_CLK); |
| 75 | mx31_gpio_mux(MUX_CSPI2_SPI_RDY__CSPI2_DATAREADY_B); |
| 76 | mx31_gpio_mux(MUX_CSPI2_MOSI__CSPI2_MOSI); |
| 77 | mx31_gpio_mux(MUX_CSPI2_MISO__CSPI2_MISO); |
| 78 | mx31_gpio_mux(MUX_CSPI2_SS0__CSPI2_SS0_B); |
| 79 | mx31_gpio_mux(MUX_CSPI2_SS1__CSPI2_SS1_B); |
Magnus Lilja | f9204e1 | 2008-04-20 10:38:12 +0200 | [diff] [blame] | 80 | |
| 81 | /* start SPI2 clock */ |
| 82 | __REG(CCM_CGR2) = __REG(CCM_CGR2) | (3 << 4); |
| 83 | |
Fabio Estevam | 4e37731 | 2011-06-05 14:56:02 +0000 | [diff] [blame] | 84 | return 0; |
| 85 | } |
| 86 | |
| 87 | int board_init(void) |
| 88 | { |
Sascha Hauer | caebc95 | 2008-03-26 20:41:09 +0100 | [diff] [blame] | 89 | gd->bd->bi_boot_params = (0x80000100); /* adress of boot parameters */ |
| 90 | |
| 91 | return 0; |
| 92 | } |
| 93 | |
Fabio Estevam | 77f11a9 | 2011-10-13 05:34:59 +0000 | [diff] [blame] | 94 | int checkboard(void) |
Sascha Hauer | caebc95 | 2008-03-26 20:41:09 +0100 | [diff] [blame] | 95 | { |
| 96 | printf("Board: i.MX31 Litekit\n"); |
| 97 | return 0; |
| 98 | } |
Ben Warren | 736fead | 2009-07-20 22:01:11 -0700 | [diff] [blame] | 99 | |
| 100 | int board_eth_init(bd_t *bis) |
| 101 | { |
| 102 | int rc = 0; |
| 103 | #ifdef CONFIG_SMC911X |
| 104 | rc = smc911x_initialize(0, CONFIG_SMC911X_BASE); |
| 105 | #endif |
| 106 | return rc; |
| 107 | } |