blob: cd9c9f3977629bcc771b4a7ea93d1081f1593396 [file] [log] [blame]
Jens Scharsig98250e82010-02-03 22:47:35 +01001/*
2 * (C) Copyright 2002
3 * Lineo, Inc. <www.lineo.com>
4 * Bernhard Kuhn <bkuhn@lineo.com>
5 *
6 * (C) Copyright 2002
7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
8 * Marius Groeger <mgroeger@sysgo.de>
9 *
10 * (C) Copyright 2002
11 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
12 * Alex Zuepke <azu@sysgo.de>
13 *
14 * See file CREDITS for list of people who contributed to this
15 * project.
16 *
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation; either version 2 of
20 * the License, or (at your option) any later version.
21 *
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
26 *
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30 * MA 02111-1307 USA
31 */
32
33#include <common.h>
34#include <asm/io.h>
35#include <asm/arch/hardware.h>
36#include <asm/arch/at91_st.h>
37
Andreas Bießmann305bf482010-11-30 09:45:05 +000038void __attribute__((weak)) board_reset(void)
39{
40 /* true empty function for defining weak symbol */
41}
Jens Scharsig98250e82010-02-03 22:47:35 +010042
43void reset_cpu(ulong ignored)
44{
Jens Scharsig80733992011-02-19 06:17:02 +000045 at91_st_t *st = (at91_st_t *) ATMEL_BASE_ST;
Jens Scharsig98250e82010-02-03 22:47:35 +010046
Andreas Bießmann305bf482010-11-30 09:45:05 +000047 board_reset();
Jens Scharsig98250e82010-02-03 22:47:35 +010048
49 /* Reset the cpu by setting up the watchdog timer */
50 writel(AT91_ST_WDMR_RSTEN | AT91_ST_WDMR_EXTEN | AT91_ST_WDMR_WDV(2),
51 &st->wdmr);
52 writel(AT91_ST_CR_WDRST, &st->cr);
53 /* and let it timeout */
54 while (1)
55 ;
56 /* Never reached */
57}