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Simon Glassdde3b702012-02-23 03:28:41 +00001/*
2 * Copyright (c) 2004-2008 Texas Instruments
3 *
4 * (C) Copyright 2002
5 * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
6 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02007 * SPDX-License-Identifier: GPL-2.0+
Simon Glassdde3b702012-02-23 03:28:41 +00008 */
9
Marc Zyngierbf433af2014-07-12 14:24:02 +010010#include <config.h>
Chen-Yu Tsai980d6a52016-06-19 12:38:36 +080011#include <asm/psci.h>
Marc Zyngierbf433af2014-07-12 14:24:02 +010012
Simon Glassdde3b702012-02-23 03:28:41 +000013OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
14OUTPUT_ARCH(arm)
15ENTRY(_start)
16SECTIONS
17{
Simon Glassc1352112016-03-13 19:07:29 -060018#ifndef CONFIG_CMDLINE
19 /DISCARD/ : { *(.u_boot_list_2_cmd_*) }
20#endif
Wang Dongshengc5e954e2016-01-18 11:02:40 +080021#if defined(CONFIG_ARMV7_SECURE_BASE) && defined(CONFIG_ARMV7_NONSEC)
Peng Fand47cb0b2015-10-23 10:13:03 +080022 /*
Wang Dongshengc5e954e2016-01-18 11:02:40 +080023 * If CONFIG_ARMV7_SECURE_BASE is true, secure code will not
24 * bundle with u-boot, and code offsets are fixed. Secure zone
25 * only needs to be copied from the loading address to
26 * CONFIG_ARMV7_SECURE_BASE, which is the linking and running
27 * address for secure code.
Peng Fand47cb0b2015-10-23 10:13:03 +080028 *
Wang Dongshengc5e954e2016-01-18 11:02:40 +080029 * If CONFIG_ARMV7_SECURE_BASE is undefined, the secure zone will
30 * be included in u-boot address space, and some absolute address
31 * were used in secure code. The absolute addresses of the secure
32 * code also needs to be relocated along with the accompanying u-boot
33 * code.
34 *
35 * So DISCARD is only for CONFIG_ARMV7_SECURE_BASE.
Peng Fand47cb0b2015-10-23 10:13:03 +080036 */
37 /DISCARD/ : { *(.rel._secure*) }
Wang Dongshengc5e954e2016-01-18 11:02:40 +080038#endif
Simon Glassdde3b702012-02-23 03:28:41 +000039 . = 0x00000000;
40
41 . = ALIGN(4);
42 .text :
43 {
Albert ARIBAUDd026dec2013-06-11 14:17:33 +020044 *(.__image_copy_start)
Albert ARIBAUD41623c92014-04-15 16:13:51 +020045 *(.vectors)
Stephen Warrenb68d6712012-10-22 06:19:32 +000046 CPUDIR/start.o (.text*)
47 *(.text*)
Simon Glassdde3b702012-02-23 03:28:41 +000048 }
49
Jan Kiszka104d6fb2015-04-21 07:18:24 +020050#ifdef CONFIG_ARMV7_NONSEC
Marc Zyngierbf433af2014-07-12 14:24:02 +010051
Chen-Yu Tsaia1274cc2016-06-19 12:38:34 +080052 /* Align the secure section only if we're going to use it in situ */
53 .__secure_start :
54#ifndef CONFIG_ARMV7_SECURE_BASE
55 ALIGN(CONSTANT(COMMONPAGESIZE))
56#endif
57 {
58 KEEP(*(.__secure_start))
59 }
60
Marc Zyngierbf433af2014-07-12 14:24:02 +010061#ifndef CONFIG_ARMV7_SECURE_BASE
62#define CONFIG_ARMV7_SECURE_BASE
Chen-Yu Tsaib56e06d2016-06-07 10:54:27 +080063#define __ARMV7_PSCI_STACK_IN_RAM
Marc Zyngierbf433af2014-07-12 14:24:02 +010064#endif
65
Marc Zyngierbf433af2014-07-12 14:24:02 +010066 .secure_text CONFIG_ARMV7_SECURE_BASE :
67 AT(ADDR(.__secure_start) + SIZEOF(.__secure_start))
68 {
69 *(._secure.text)
70 }
71
Chen-Yu Tsaia5aa7ff2016-07-05 21:45:06 +080072 .secure_data : AT(LOADADDR(.secure_text) + SIZEOF(.secure_text))
73 {
74 *(._secure.data)
75 }
76
Masahiro Yamada2fe12812016-09-26 14:21:30 +090077#ifdef CONFIG_ARMV7_PSCI
Chen-Yu Tsaia5aa7ff2016-07-05 21:45:06 +080078 .secure_stack ALIGN(ADDR(.secure_data) + SIZEOF(.secure_data),
Chen-Yu Tsai980d6a52016-06-19 12:38:36 +080079 CONSTANT(COMMONPAGESIZE)) (NOLOAD) :
Chen-Yu Tsaib56e06d2016-06-07 10:54:27 +080080#ifdef __ARMV7_PSCI_STACK_IN_RAM
Chen-Yu Tsai980d6a52016-06-19 12:38:36 +080081 AT(ADDR(.secure_stack))
82#else
Chen-Yu Tsaia5aa7ff2016-07-05 21:45:06 +080083 AT(LOADADDR(.secure_data) + SIZEOF(.secure_data))
Chen-Yu Tsai980d6a52016-06-19 12:38:36 +080084#endif
85 {
86 KEEP(*(.__secure_stack_start))
Masahiro Yamada2fe12812016-09-26 14:21:30 +090087
Chen-Yu Tsai980d6a52016-06-19 12:38:36 +080088 /* Skip addreses for stack */
89 . = . + CONFIG_ARMV7_PSCI_NR_CPUS * ARM_PSCI_STACK_SIZE;
Masahiro Yamada2fe12812016-09-26 14:21:30 +090090
Chen-Yu Tsai980d6a52016-06-19 12:38:36 +080091 /* Align end of stack section to page boundary */
92 . = ALIGN(CONSTANT(COMMONPAGESIZE));
93
94 KEEP(*(.__secure_stack_end))
Chen-Yu Tsai3eff6812016-06-19 12:38:39 +080095
96#ifdef CONFIG_ARMV7_SECURE_MAX_SIZE
97 /*
98 * We are not checking (__secure_end - __secure_start) here,
99 * as these are the load addresses, and do not include the
100 * stack section. Instead, use the end of the stack section
101 * and the start of the text section.
102 */
103 ASSERT((. - ADDR(.secure_text)) <= CONFIG_ARMV7_SECURE_MAX_SIZE,
104 "Error: secure section exceeds secure memory size");
105#endif
Chen-Yu Tsai980d6a52016-06-19 12:38:36 +0800106 }
107
108#ifndef __ARMV7_PSCI_STACK_IN_RAM
109 /* Reset VMA but don't allocate space if we have secure SRAM */
110 . = LOADADDR(.secure_stack);
Chen-Yu Tsaib56e06d2016-06-07 10:54:27 +0800111#endif
112
Masahiro Yamada2fe12812016-09-26 14:21:30 +0900113#endif
114
Chen-Yu Tsai980d6a52016-06-19 12:38:36 +0800115 .__secure_end : AT(ADDR(.__secure_end)) {
Marc Zyngierbf433af2014-07-12 14:24:02 +0100116 *(.__secure_end)
117 LONG(0x1d1071c); /* Must output something to reset LMA */
118 }
119#endif
120
Simon Glassdde3b702012-02-23 03:28:41 +0000121 . = ALIGN(4);
122 .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
123
124 . = ALIGN(4);
125 .data : {
Stephen Warrenb68d6712012-10-22 06:19:32 +0000126 *(.data*)
Simon Glassdde3b702012-02-23 03:28:41 +0000127 }
128
129 . = ALIGN(4);
130
131 . = .;
Simon Glassdde3b702012-02-23 03:28:41 +0000132
133 . = ALIGN(4);
Marek Vasut55675142012-10-12 10:27:03 +0000134 .u_boot_list : {
Albert ARIBAUDef123c52013-02-25 00:59:00 +0000135 KEEP(*(SORT(.u_boot_list*)));
Marek Vasut55675142012-10-12 10:27:03 +0000136 }
137
138 . = ALIGN(4);
Simon Glassdde3b702012-02-23 03:28:41 +0000139
Alexander Graf50149ea2016-03-04 01:10:01 +0100140 .__efi_runtime_start : {
141 *(.__efi_runtime_start)
142 }
143
144 .efi_runtime : {
145 *(efi_runtime_text)
146 *(efi_runtime_data)
147 }
148
149 .__efi_runtime_stop : {
150 *(.__efi_runtime_stop)
151 }
152
153 .efi_runtime_rel_start :
154 {
155 *(.__efi_runtime_rel_start)
156 }
157
158 .efi_runtime_rel : {
159 *(.relefi_runtime_text)
160 *(.relefi_runtime_data)
161 }
162
163 .efi_runtime_rel_stop :
164 {
165 *(.__efi_runtime_rel_stop)
166 }
167
Tom Rini83ebd4a2017-06-14 09:13:21 -0400168 . = ALIGN(4);
Alexander Graf50149ea2016-03-04 01:10:01 +0100169
Albert ARIBAUDd026dec2013-06-11 14:17:33 +0200170 .image_copy_end :
171 {
172 *(.__image_copy_end)
173 }
Simon Glassdde3b702012-02-23 03:28:41 +0000174
Albert ARIBAUD47bd65e2013-06-11 14:17:34 +0200175 .rel_dyn_start :
176 {
177 *(.__rel_dyn_start)
178 }
179
Simon Glassdde3b702012-02-23 03:28:41 +0000180 .rel.dyn : {
Simon Glassdde3b702012-02-23 03:28:41 +0000181 *(.rel*)
Albert ARIBAUD47bd65e2013-06-11 14:17:34 +0200182 }
183
184 .rel_dyn_end :
185 {
186 *(.__rel_dyn_end)
Simon Glassdde3b702012-02-23 03:28:41 +0000187 }
188
Albert ARIBAUDd0b5d9d2014-02-22 17:53:42 +0100189 .end :
190 {
191 *(.__end)
192 }
193
194 _image_binary_end = .;
Simon Glassdde3b702012-02-23 03:28:41 +0000195
196 /*
197 * Deprecated: this MMU section is used by pxa at present but
198 * should not be used by new boards/CPUs.
199 */
200 . = ALIGN(4096);
201 .mmutable : {
202 *(.mmutable)
203 }
204
Albert ARIBAUDf84a7b82013-04-11 05:43:21 +0000205/*
206 * Compiler-generated __bss_start and __bss_end, see arch/arm/lib/bss.c
207 * __bss_base and __bss_limit are for linker only (overlay ordering)
208 */
209
Albert ARIBAUD3ebd1cb2013-02-25 00:58:59 +0000210 .bss_start __rel_dyn_start (OVERLAY) : {
211 KEEP(*(.__bss_start));
Albert ARIBAUDf84a7b82013-04-11 05:43:21 +0000212 __bss_base = .;
Albert ARIBAUD3ebd1cb2013-02-25 00:58:59 +0000213 }
214
Albert ARIBAUDf84a7b82013-04-11 05:43:21 +0000215 .bss __bss_base (OVERLAY) : {
Stephen Warrenb68d6712012-10-22 06:19:32 +0000216 *(.bss*)
Simon Glassdde3b702012-02-23 03:28:41 +0000217 . = ALIGN(4);
Albert ARIBAUDf84a7b82013-04-11 05:43:21 +0000218 __bss_limit = .;
Albert ARIBAUD3ebd1cb2013-02-25 00:58:59 +0000219 }
Tom Rini0ce033d2013-03-18 12:31:00 -0400220
Albert ARIBAUDf84a7b82013-04-11 05:43:21 +0000221 .bss_end __bss_limit (OVERLAY) : {
222 KEEP(*(.__bss_end));
Simon Glassdde3b702012-02-23 03:28:41 +0000223 }
224
Albert ARIBAUDd0b5d9d2014-02-22 17:53:42 +0100225 .dynsym _image_binary_end : { *(.dynsym) }
Albert ARIBAUD47ed5dd2013-11-07 14:21:46 +0100226 .dynbss : { *(.dynbss) }
227 .dynstr : { *(.dynstr*) }
228 .dynamic : { *(.dynamic*) }
229 .plt : { *(.plt*) }
230 .interp : { *(.interp*) }
Andreas Färber2c67e0e2014-01-27 05:48:11 +0100231 .gnu.hash : { *(.gnu.hash) }
Albert ARIBAUD47ed5dd2013-11-07 14:21:46 +0100232 .gnu : { *(.gnu*) }
233 .ARM.exidx : { *(.ARM.exidx*) }
Albert ARIBAUDb02bfc42014-01-13 14:57:05 +0100234 .gnu.linkonce.armexidx : { *(.gnu.linkonce.armexidx.*) }
Simon Glassdde3b702012-02-23 03:28:41 +0000235}