Jon Loeliger | debb735 | 2006-04-26 17:58:56 -0500 | [diff] [blame] | 1 | /* |
Kumar Gala | 5655136 | 2011-01-04 17:07:54 -0600 | [diff] [blame] | 2 | * Copyright 2004,2009-2011 Freescale Semiconductor, Inc. |
Jon Loeliger | c934f65 | 2006-05-31 13:55:35 -0500 | [diff] [blame] | 3 | * Jeff Brown |
Jon Loeliger | debb735 | 2006-04-26 17:58:56 -0500 | [diff] [blame] | 4 | * Srikanth Srinivasan (srikanth.srinivasan@freescale.com) |
| 5 | * |
| 6 | * See file CREDITS for list of people who contributed to this |
| 7 | * project. |
| 8 | * |
| 9 | * This program is free software; you can redistribute it and/or |
| 10 | * modify it under the terms of the GNU General Public License as |
| 11 | * published by the Free Software Foundation; either version 2 of |
| 12 | * the License, or (at your option) any later version. |
| 13 | * |
| 14 | * This program is distributed in the hope that it will be useful, |
| 15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 17 | * GNU General Public License for more details. |
| 18 | * |
| 19 | * You should have received a copy of the GNU General Public License |
| 20 | * along with this program; if not, write to the Free Software |
| 21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 22 | * MA 02111-1307 USA |
| 23 | */ |
| 24 | |
| 25 | /* |
| 26 | * cpu_init.c - low level cpu init |
| 27 | */ |
| 28 | |
Becky Bruce | 2d0daa0 | 2008-08-04 14:02:26 -0500 | [diff] [blame] | 29 | #include <config.h> |
Jon Loeliger | debb735 | 2006-04-26 17:58:56 -0500 | [diff] [blame] | 30 | #include <common.h> |
| 31 | #include <mpc86xx.h> |
Becky Bruce | 2d0daa0 | 2008-08-04 14:02:26 -0500 | [diff] [blame] | 32 | #include <asm/mmu.h> |
Jean-Christophe PLAGNIOL-VILLARD | 83d1b38 | 2008-02-17 23:03:36 +0100 | [diff] [blame] | 33 | #include <asm/fsl_law.h> |
Kumar Gala | af04247 | 2010-12-15 04:52:48 -0600 | [diff] [blame] | 34 | #include <asm/fsl_serdes.h> |
Kumar Gala | 7649a59 | 2009-03-31 23:02:38 -0500 | [diff] [blame] | 35 | #include <asm/mp.h> |
Jon Loeliger | debb735 | 2006-04-26 17:58:56 -0500 | [diff] [blame] | 36 | |
Kumar Gala | 5655136 | 2011-01-04 17:07:54 -0600 | [diff] [blame] | 37 | extern void srio_init(void); |
Becky Bruce | 24bfb48 | 2008-11-05 14:55:30 -0600 | [diff] [blame] | 38 | |
Wolfgang Denk | 1218abf | 2007-09-15 20:48:41 +0200 | [diff] [blame] | 39 | DECLARE_GLOBAL_DATA_PTR; |
| 40 | |
Jon Loeliger | debb735 | 2006-04-26 17:58:56 -0500 | [diff] [blame] | 41 | /* |
| 42 | * Breathe some life into the CPU... |
| 43 | * |
| 44 | * Set up the memory map |
| 45 | * initialize a bunch of registers |
| 46 | */ |
| 47 | |
Jon Loeliger | 5c9efb3 | 2006-04-27 10:15:16 -0500 | [diff] [blame] | 48 | void cpu_init_f(void) |
Jon Loeliger | debb735 | 2006-04-26 17:58:56 -0500 | [diff] [blame] | 49 | { |
Jon Loeliger | ffff3ae | 2006-08-22 12:06:18 -0500 | [diff] [blame] | 50 | /* Pointer is writable since we allocated a register for it */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 51 | gd = (gd_t *) (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET); |
Jon Loeliger | debb735 | 2006-04-26 17:58:56 -0500 | [diff] [blame] | 52 | |
| 53 | /* Clear initial global data */ |
| 54 | memset ((void *) gd, 0, sizeof (gd_t)); |
| 55 | |
Becky Bruce | 4933b91 | 2008-01-23 16:31:01 -0600 | [diff] [blame] | 56 | #ifdef CONFIG_FSL_LAW |
| 57 | init_laws(); |
| 58 | #endif |
| 59 | |
Becky Bruce | 24bfb48 | 2008-11-05 14:55:30 -0600 | [diff] [blame] | 60 | setup_bats(); |
| 61 | |
Becky Bruce | f51cdaf | 2010-06-17 11:37:20 -0500 | [diff] [blame] | 62 | init_early_memctl_regs(); |
Jon Loeliger | debb735 | 2006-04-26 17:58:56 -0500 | [diff] [blame] | 63 | |
Peter Tyser | 79f4333 | 2009-06-30 17:15:47 -0500 | [diff] [blame] | 64 | #if defined(CONFIG_FSL_DMA) |
| 65 | dma_init(); |
| 66 | #endif |
Jon Loeliger | debb735 | 2006-04-26 17:58:56 -0500 | [diff] [blame] | 67 | |
| 68 | /* enable the timebase bit in HID0 */ |
| 69 | set_hid0(get_hid0() | 0x4000000); |
| 70 | |
Jon Loeliger | cfc7a7f | 2007-08-02 14:42:20 -0500 | [diff] [blame] | 71 | /* enable EMCP, SYNCBE | ABE bits in HID1 */ |
| 72 | set_hid1(get_hid1() | 0x80000C00); |
Jon Loeliger | debb735 | 2006-04-26 17:58:56 -0500 | [diff] [blame] | 73 | } |
| 74 | |
| 75 | /* |
| 76 | * initialize higher level parts of CPU like timers |
| 77 | */ |
Jon Loeliger | 5c9efb3 | 2006-04-27 10:15:16 -0500 | [diff] [blame] | 78 | int cpu_init_r(void) |
Jon Loeliger | debb735 | 2006-04-26 17:58:56 -0500 | [diff] [blame] | 79 | { |
Kumar Gala | af04247 | 2010-12-15 04:52:48 -0600 | [diff] [blame] | 80 | /* needs to be in ram since code uses global static vars */ |
| 81 | fsl_serdes_init(); |
| 82 | |
Kumar Gala | 5655136 | 2011-01-04 17:07:54 -0600 | [diff] [blame] | 83 | #ifdef CONFIG_SYS_SRIO |
| 84 | srio_init(); |
| 85 | #endif |
| 86 | |
Poonam Aggrwal | 0e87098 | 2009-07-31 12:08:14 +0530 | [diff] [blame] | 87 | #if defined(CONFIG_MP) |
Becky Bruce | 1266df8 | 2008-11-03 15:44:01 -0600 | [diff] [blame] | 88 | setup_mp(); |
| 89 | #endif |
Jon Loeliger | 5c9efb3 | 2006-04-27 10:15:16 -0500 | [diff] [blame] | 90 | return 0; |
Jon Loeliger | debb735 | 2006-04-26 17:58:56 -0500 | [diff] [blame] | 91 | } |
Becky Bruce | 2d0daa0 | 2008-08-04 14:02:26 -0500 | [diff] [blame] | 92 | |
Becky Bruce | c9315e6 | 2009-02-03 18:10:52 -0600 | [diff] [blame] | 93 | #ifdef CONFIG_ADDR_MAP |
| 94 | /* Initialize address mapping array */ |
| 95 | void init_addr_map(void) |
| 96 | { |
| 97 | int i; |
| 98 | ppc_bat_t bat = DBAT0; |
| 99 | phys_size_t size; |
| 100 | unsigned long upper, lower; |
| 101 | |
| 102 | for (i = 0; i < CONFIG_SYS_NUM_ADDR_MAP; i++, bat++) { |
| 103 | if (read_bat(bat, &upper, &lower) != -1) { |
| 104 | if (!BATU_VALID(upper)) |
| 105 | size = 0; |
| 106 | else |
| 107 | size = BATU_SIZE(upper); |
| 108 | addrmap_set_entry(BATU_VADDR(upper), BATL_PADDR(lower), |
| 109 | size, i); |
| 110 | } |
| 111 | #ifdef CONFIG_HIGH_BATS |
| 112 | /* High bats are not contiguous with low BAT numbers */ |
| 113 | if (bat == DBAT3) |
| 114 | bat = DBAT4 - 1; |
| 115 | #endif |
| 116 | } |
| 117 | } |
| 118 | #endif |