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gerrit.cesnet.cz / github / trini / u-boot / c9639421fd877fa0e95d7744dade002042eb721e / . / arch / arm / cpu / arm720t / start.S
blob: 01c85be64b1a5861628459fee3deab99fb868a81 [file] [log] [blame]
wdenkfe8c2802002-11-03 00:38:21 +0000[diff] [blame]1/*
2 * armboot - Startup Code for ARM720 CPU-core
3 *
Albert ARIBAUDfa82f872011-08-04 18:45:45 +0200[diff] [blame]4 * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
5 * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
wdenkfe8c2802002-11-03 00:38:21 +0000[diff] [blame]6 *
Wolfgang Denk3765b3e2013-10-07 13:07:26 +0200[diff] [blame]7 * SPDX-License-Identifier: GPL-2.0+
wdenkfe8c2802002-11-03 00:38:21 +0000[diff] [blame]8 */
9
Wolfgang Denk25ddd1f2010-10-26 14:34:52 +0200[diff] [blame]10#include <asm-offsets.h>
wdenkfe8c2802002-11-03 00:38:21 +0000[diff] [blame]11#include <config.h>
12#include <version.h>
wdenk39539882004-07-01 16:30:44 +0000[diff] [blame]13#include <asm/hardware.h>
wdenkfe8c2802002-11-03 00:38:21 +0000[diff] [blame]14
15/*
16 *************************************************************************
17 *
wdenkfe8c2802002-11-03 00:38:21 +0000[diff] [blame]18 * Startup Code (reset vector)
19 *
wdenkf6e20fc2004-02-08 19:38:38 +0000[diff] [blame]20 * do important init only if we don't start from RAM!
wdenkfe8c2802002-11-03 00:38:21 +0000[diff] [blame]21 * relocate armboot to ram
22 * setup stack
23 * jump to second stage
24 *
25 *************************************************************************
26 */
27
Albert ARIBAUD41623c92014-04-15 16:13:51 +0200[diff] [blame]28 .globl reset
Heiko Schocherabef7b82010-09-17 13:10:52 +0200[diff] [blame]29
30reset:
31 /*
32 * set the cpu to SVC32 mode
33 */
34 mrs r0,cpsr
35 bic r0,r0,#0x1f
36 orr r0,r0,#0xd3
37 msr cpsr,r0
38
39 /*
40 * we do sys-critical inits only at reboot,
41 * not when booting from ram!
42 */
43#ifndef CONFIG_SKIP_LOWLEVEL_INIT
44 bl cpu_init_crit
45#endif
46
Albert ARIBAUDe05e5de2013-01-08 10:18:02 +0000[diff] [blame]47 bl _main
Heiko Schocherabef7b82010-09-17 13:10:52 +0200[diff] [blame]48
49/*------------------------------------------------------------------------------*/
50
Albert ARIBAUDe05e5de2013-01-08 10:18:02 +0000[diff] [blame]51 .globl c_runtime_cpu_setup
52c_runtime_cpu_setup:
53
54 mov pc, lr
55
wdenkfe8c2802002-11-03 00:38:21 +0000[diff] [blame]56/*
57 *************************************************************************
58 *
59 * CPU_init_critical registers
60 *
61 * setup important registers
62 * setup memory timing
63 *
64 *************************************************************************
65 */
66
Axel Lin578e6372013-05-21 13:44:10 +0000[diff] [blame]67#ifndef CONFIG_SKIP_LOWLEVEL_INIT
wdenkfe8c2802002-11-03 00:38:21 +0000[diff] [blame]68cpu_init_crit:
wdenkfe8c2802002-11-03 00:38:21 +0000[diff] [blame]69
Wolfgang Denk87cb6862005-10-06 17:08:18 +0200[diff] [blame]70 mov ip, lr
wdenkfe8c2802002-11-03 00:38:21 +0000[diff] [blame]71 /*
72 * before relocating, we have to setup RAM timing
wdenkf6e20fc2004-02-08 19:38:38 +0000[diff] [blame]73 * because memory timing is board-dependent, you will
wdenk400558b2005-04-02 23:52:25 +0000[diff] [blame]74 * find a lowlevel_init.S in your board directory.
wdenkfe8c2802002-11-03 00:38:21 +0000[diff] [blame]75 */
wdenk400558b2005-04-02 23:52:25 +0000[diff] [blame]76 bl lowlevel_init
wdenkfe8c2802002-11-03 00:38:21 +0000[diff] [blame]77 mov lr, ip
78
79 mov pc, lr
Axel Lin578e6372013-05-21 13:44:10 +0000[diff] [blame]80#endif /* CONFIG_SKIP_LOWLEVEL_INIT */