Patch by Anders Larsen, 09 Jan 2004:
ARM memory layout fixes: the abort-stack is now set up in the
correct RAM area, and the BSS is zeroed out as it should be.
Furthermore, the magic variables 'armboot_end' and 'armboot_end_data'
of the linker scripts are replaced by '__bss_start' and '_end',
resp., which is a further step to eliminate unnecessary differences
between the implementation of the CPU architectures.
diff --git a/cpu/arm720t/start.S b/cpu/arm720t/start.S
index 8ddb0c9..7fe36c6 100644
--- a/cpu/arm720t/start.S
+++ b/cpu/arm720t/start.S
@@ -63,7 +63,7 @@
*
* Startup Code (reset vector)
*
- * do important init only if we don't start from memory!
+ * do important init only if we don't start from RAM!
* relocate armboot to ram
* setup stack
* jump to second stage
@@ -79,16 +79,15 @@
.word _start
/*
- * Note: _armboot_end_data and _armboot_end are defined
- * by the (board-dependent) linker script.
- * _armboot_end_data is the first usable FLASH address after armboot
+ * These are defined in the board-specific linker script.
*/
-.globl _armboot_end_data
-_armboot_end_data:
- .word armboot_end_data
-.globl _armboot_end
-_armboot_end:
- .word armboot_end
+.globl _bss_start
+_bss_start:
+ .word __bss_start
+
+.globl _bss_end
+_bss_end:
+ .word _end
#ifdef CONFIG_USE_IRQ
/* IRQ stack memory (calculated at run-time) */
@@ -131,7 +130,7 @@
beq stack_setup
ldr r2, _armboot_start
- ldr r3, _armboot_end
+ ldr r3, _bss_start
sub r2, r3, r2 /* r2 <- size of armboot */
add r2, r0, r2 /* r2 <- source end address */
@@ -151,6 +150,17 @@
#endif
sub sp, r0, #12 /* leave 3 words for abort-stack */
+clear_bss:
+ ldr r0, _bss_start /* find start of bss segment */
+ add r0, r0, #4 /* start at first byte of bss */
+ ldr r1, _bss_end /* stop here */
+ mov r2, #0x00000000 /* clear */
+
+clbss_l:str r2, [r0] /* clear loop... */
+ add r0, r0, #4
+ cmp r0, r1
+ bne clbss_l
+
ldr pc, _start_armboot
_start_armboot: .word start_armboot
@@ -225,7 +235,7 @@
/*
* before relocating, we have to setup RAM timing
- * because memory timing is board-dependend, you will
+ * because memory timing is board-dependent, you will
* find a memsetup.S in your board directory.
*/
mov ip, lr
@@ -281,9 +291,9 @@
stmia sp, {r0 - r12} @ Calling r0-r12
add r8, sp, #S_PC
- ldr r2, _armboot_end
- add r2, r2, #CONFIG_STACKSIZE
- sub r2, r2, #8
+ ldr r2, _armboot_start
+ sub r2, r2, #(CONFIG_STACKSIZE+CFG_MALLOC_LEN)
+ sub r2, r2, #(CFG_GBL_DATA_SIZE+8) @ set base 2 words into abort stack
ldmia r2, {r2 - r4} @ get pc, cpsr, old_r0
add r0, sp, #S_FRAME_SIZE @ restore sp_SVC
@@ -314,9 +324,9 @@
.endm
.macro get_bad_stack
- ldr r13, _armboot_end @ setup our mode stack
- add r13, r13, #CONFIG_STACKSIZE @ resides at top of normal stack
- sub r13, r13, #8
+ ldr r13, _armboot_start @ setup our mode stack
+ sub r13, r13, #(CONFIG_STACKSIZE+CFG_MALLOC_LEN)
+ sub r13, r13, #(CFG_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack
str lr, [r13] @ save caller lr / spsr
mrs lr, spsr