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Jaehoon Chung757bff42012-10-15 19:10:29 +00001/*
2 * (C) Copyright 2012 SAMSUNG Electronics
3 * Jaehoon Chung <jh80.chung@samsung.com>
4 * Rajeshawari Shinde <rajeshwari.s@samsung.com>
5 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02006 * SPDX-License-Identifier: GPL-2.0+
Jaehoon Chung757bff42012-10-15 19:10:29 +00007 */
8
Alexey Brodkin2a7a2102013-12-26 15:29:07 +04009#include <bouncebuf.h>
Jaehoon Chung757bff42012-10-15 19:10:29 +000010#include <common.h>
11#include <malloc.h>
12#include <mmc.h>
13#include <dwmmc.h>
Jaehoon Chung757bff42012-10-15 19:10:29 +000014#include <asm-generic/errno.h>
15
16#define PAGE_SIZE 4096
17
18static int dwmci_wait_reset(struct dwmci_host *host, u32 value)
19{
20 unsigned long timeout = 1000;
21 u32 ctrl;
22
23 dwmci_writel(host, DWMCI_CTRL, value);
24
25 while (timeout--) {
26 ctrl = dwmci_readl(host, DWMCI_CTRL);
27 if (!(ctrl & DWMCI_RESET_ALL))
28 return 1;
29 }
30 return 0;
31}
32
33static void dwmci_set_idma_desc(struct dwmci_idmac *idmac,
34 u32 desc0, u32 desc1, u32 desc2)
35{
36 struct dwmci_idmac *desc = idmac;
37
38 desc->flags = desc0;
39 desc->cnt = desc1;
40 desc->addr = desc2;
41 desc->next_addr = (unsigned int)desc + sizeof(struct dwmci_idmac);
42}
43
44static void dwmci_prepare_data(struct dwmci_host *host,
Alexey Brodkin2a7a2102013-12-26 15:29:07 +040045 struct mmc_data *data,
46 struct dwmci_idmac *cur_idmac,
47 void *bounce_buffer)
Jaehoon Chung757bff42012-10-15 19:10:29 +000048{
49 unsigned long ctrl;
50 unsigned int i = 0, flags, cnt, blk_cnt;
Alexey Brodkin2a7a2102013-12-26 15:29:07 +040051 ulong data_start, data_end;
Jaehoon Chung757bff42012-10-15 19:10:29 +000052
53
54 blk_cnt = data->blocks;
55
56 dwmci_wait_reset(host, DWMCI_CTRL_FIFO_RESET);
57
58 data_start = (ulong)cur_idmac;
59 dwmci_writel(host, DWMCI_DBADDR, (unsigned int)cur_idmac);
60
Jaehoon Chung757bff42012-10-15 19:10:29 +000061 do {
62 flags = DWMCI_IDMAC_OWN | DWMCI_IDMAC_CH ;
63 flags |= (i == 0) ? DWMCI_IDMAC_FS : 0;
64 if (blk_cnt <= 8) {
65 flags |= DWMCI_IDMAC_LD;
66 cnt = data->blocksize * blk_cnt;
67 } else
68 cnt = data->blocksize * 8;
69
70 dwmci_set_idma_desc(cur_idmac, flags, cnt,
Alexey Brodkin2a7a2102013-12-26 15:29:07 +040071 (u32)bounce_buffer + (i * PAGE_SIZE));
Jaehoon Chung757bff42012-10-15 19:10:29 +000072
Mischa Jonker21bd5762013-07-26 16:18:40 +020073 if (blk_cnt <= 8)
Jaehoon Chung757bff42012-10-15 19:10:29 +000074 break;
75 blk_cnt -= 8;
76 cur_idmac++;
77 i++;
78 } while(1);
79
80 data_end = (ulong)cur_idmac;
81 flush_dcache_range(data_start, data_end + ARCH_DMA_MINALIGN);
82
83 ctrl = dwmci_readl(host, DWMCI_CTRL);
84 ctrl |= DWMCI_IDMAC_EN | DWMCI_DMA_EN;
85 dwmci_writel(host, DWMCI_CTRL, ctrl);
86
87 ctrl = dwmci_readl(host, DWMCI_BMOD);
88 ctrl |= DWMCI_BMOD_IDMAC_FB | DWMCI_BMOD_IDMAC_EN;
89 dwmci_writel(host, DWMCI_BMOD, ctrl);
90
91 dwmci_writel(host, DWMCI_BLKSIZ, data->blocksize);
92 dwmci_writel(host, DWMCI_BYTCNT, data->blocksize * data->blocks);
93}
94
95static int dwmci_set_transfer_mode(struct dwmci_host *host,
96 struct mmc_data *data)
97{
98 unsigned long mode;
99
100 mode = DWMCI_CMD_DATA_EXP;
101 if (data->flags & MMC_DATA_WRITE)
102 mode |= DWMCI_CMD_RW;
103
104 return mode;
105}
106
107static int dwmci_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
108 struct mmc_data *data)
109{
Pantelis Antoniou93bfd612014-03-11 19:34:20 +0200110 struct dwmci_host *host = mmc->priv;
Mischa Jonker2136d222013-07-26 14:08:14 +0200111 ALLOC_CACHE_ALIGN_BUFFER(struct dwmci_idmac, cur_idmac,
Mischa Jonker21bd5762013-07-26 16:18:40 +0200112 data ? DIV_ROUND_UP(data->blocks, 8) : 0);
Jaehoon Chung757bff42012-10-15 19:10:29 +0000113 int flags = 0, i;
114 unsigned int timeout = 100000;
115 u32 retry = 10000;
116 u32 mask, ctrl;
Amar9c50e352013-04-27 11:42:54 +0530117 ulong start = get_timer(0);
Alexey Brodkin2a7a2102013-12-26 15:29:07 +0400118 struct bounce_buffer bbstate;
Jaehoon Chung757bff42012-10-15 19:10:29 +0000119
120 while (dwmci_readl(host, DWMCI_STATUS) & DWMCI_BUSY) {
Amar9c50e352013-04-27 11:42:54 +0530121 if (get_timer(start) > timeout) {
Pavel Machekf33c9302014-09-05 12:49:48 +0200122 printf("%s: Timeout on data busy\n", __func__);
Jaehoon Chung757bff42012-10-15 19:10:29 +0000123 return TIMEOUT;
124 }
Jaehoon Chung757bff42012-10-15 19:10:29 +0000125 }
126
127 dwmci_writel(host, DWMCI_RINTSTS, DWMCI_INTMSK_ALL);
128
Alexey Brodkin2a7a2102013-12-26 15:29:07 +0400129 if (data) {
130 if (data->flags == MMC_DATA_READ) {
131 bounce_buffer_start(&bbstate, (void*)data->dest,
132 data->blocksize *
133 data->blocks, GEN_BB_WRITE);
134 } else {
135 bounce_buffer_start(&bbstate, (void*)data->src,
136 data->blocksize *
137 data->blocks, GEN_BB_READ);
138 }
139 dwmci_prepare_data(host, data, cur_idmac,
140 bbstate.bounce_buffer);
141 }
Jaehoon Chung757bff42012-10-15 19:10:29 +0000142
Jaehoon Chung757bff42012-10-15 19:10:29 +0000143 dwmci_writel(host, DWMCI_CMDARG, cmd->cmdarg);
144
145 if (data)
146 flags = dwmci_set_transfer_mode(host, data);
147
148 if ((cmd->resp_type & MMC_RSP_136) && (cmd->resp_type & MMC_RSP_BUSY))
149 return -1;
150
151 if (cmd->cmdidx == MMC_CMD_STOP_TRANSMISSION)
152 flags |= DWMCI_CMD_ABORT_STOP;
153 else
154 flags |= DWMCI_CMD_PRV_DAT_WAIT;
155
156 if (cmd->resp_type & MMC_RSP_PRESENT) {
157 flags |= DWMCI_CMD_RESP_EXP;
158 if (cmd->resp_type & MMC_RSP_136)
159 flags |= DWMCI_CMD_RESP_LENGTH;
160 }
161
162 if (cmd->resp_type & MMC_RSP_CRC)
163 flags |= DWMCI_CMD_CHECK_CRC;
164
165 flags |= (cmd->cmdidx | DWMCI_CMD_START | DWMCI_CMD_USE_HOLD_REG);
166
167 debug("Sending CMD%d\n",cmd->cmdidx);
168
169 dwmci_writel(host, DWMCI_CMD, flags);
170
171 for (i = 0; i < retry; i++) {
172 mask = dwmci_readl(host, DWMCI_RINTSTS);
173 if (mask & DWMCI_INTMSK_CDONE) {
174 if (!data)
175 dwmci_writel(host, DWMCI_RINTSTS, mask);
176 break;
177 }
178 }
179
Pavel Machekf33c9302014-09-05 12:49:48 +0200180 if (i == retry) {
181 printf("%s: Timeout.\n", __func__);
Jaehoon Chung757bff42012-10-15 19:10:29 +0000182 return TIMEOUT;
Pavel Machekf33c9302014-09-05 12:49:48 +0200183 }
Jaehoon Chung757bff42012-10-15 19:10:29 +0000184
185 if (mask & DWMCI_INTMSK_RTO) {
Pavel Machekf33c9302014-09-05 12:49:48 +0200186 /*
187 * Timeout here is not necessarily fatal. (e)MMC cards
188 * will splat here when they receive CMD55 as they do
189 * not support this command and that is exactly the way
190 * to tell them apart from SD cards. Thus, this output
191 * below shall be debug(). eMMC cards also do not favor
192 * CMD8, please keep that in mind.
193 */
194 debug("%s: Response Timeout.\n", __func__);
Jaehoon Chung757bff42012-10-15 19:10:29 +0000195 return TIMEOUT;
196 } else if (mask & DWMCI_INTMSK_RE) {
Pavel Machekf33c9302014-09-05 12:49:48 +0200197 printf("%s: Response Error.\n", __func__);
Jaehoon Chung757bff42012-10-15 19:10:29 +0000198 return -1;
199 }
200
201
202 if (cmd->resp_type & MMC_RSP_PRESENT) {
203 if (cmd->resp_type & MMC_RSP_136) {
204 cmd->response[0] = dwmci_readl(host, DWMCI_RESP3);
205 cmd->response[1] = dwmci_readl(host, DWMCI_RESP2);
206 cmd->response[2] = dwmci_readl(host, DWMCI_RESP1);
207 cmd->response[3] = dwmci_readl(host, DWMCI_RESP0);
208 } else {
209 cmd->response[0] = dwmci_readl(host, DWMCI_RESP0);
210 }
211 }
212
213 if (data) {
214 do {
215 mask = dwmci_readl(host, DWMCI_RINTSTS);
216 if (mask & (DWMCI_DATA_ERR | DWMCI_DATA_TOUT)) {
Pavel Machekf33c9302014-09-05 12:49:48 +0200217 printf("%s: DATA ERROR!\n", __func__);
Jaehoon Chung757bff42012-10-15 19:10:29 +0000218 return -1;
219 }
220 } while (!(mask & DWMCI_INTMSK_DTO));
221
222 dwmci_writel(host, DWMCI_RINTSTS, mask);
223
224 ctrl = dwmci_readl(host, DWMCI_CTRL);
225 ctrl &= ~(DWMCI_DMA_EN);
226 dwmci_writel(host, DWMCI_CTRL, ctrl);
Alexey Brodkin2a7a2102013-12-26 15:29:07 +0400227
228 bounce_buffer_stop(&bbstate);
Jaehoon Chung757bff42012-10-15 19:10:29 +0000229 }
230
231 udelay(100);
232
233 return 0;
234}
235
236static int dwmci_setup_bus(struct dwmci_host *host, u32 freq)
237{
238 u32 div, status;
239 int timeout = 10000;
240 unsigned long sclk;
241
Amar9c50e352013-04-27 11:42:54 +0530242 if ((freq == host->clock) || (freq == 0))
Jaehoon Chung757bff42012-10-15 19:10:29 +0000243 return 0;
Jaehoon Chung757bff42012-10-15 19:10:29 +0000244 /*
Pavel Machekf33c9302014-09-05 12:49:48 +0200245 * If host->get_mmc_clk isn't defined,
Jaehoon Chung757bff42012-10-15 19:10:29 +0000246 * then assume that host->bus_hz is source clock value.
Pavel Machekf33c9302014-09-05 12:49:48 +0200247 * host->bus_hz should be set by user.
Jaehoon Chung757bff42012-10-15 19:10:29 +0000248 */
Jaehoon Chungb44fe832013-10-06 18:59:31 +0900249 if (host->get_mmc_clk)
Rajeshwari S Shinded3e016c2014-02-05 10:48:15 +0530250 sclk = host->get_mmc_clk(host);
Jaehoon Chung757bff42012-10-15 19:10:29 +0000251 else if (host->bus_hz)
252 sclk = host->bus_hz;
253 else {
Pavel Machekf33c9302014-09-05 12:49:48 +0200254 printf("%s: Didn't get source clock value.\n", __func__);
Jaehoon Chung757bff42012-10-15 19:10:29 +0000255 return -EINVAL;
256 }
257
Chin Liang See6ace1532014-06-10 01:26:52 -0500258 if (sclk == freq)
259 div = 0; /* bypass mode */
260 else
261 div = DIV_ROUND_UP(sclk, 2 * freq);
Jaehoon Chung757bff42012-10-15 19:10:29 +0000262
263 dwmci_writel(host, DWMCI_CLKENA, 0);
264 dwmci_writel(host, DWMCI_CLKSRC, 0);
265
266 dwmci_writel(host, DWMCI_CLKDIV, div);
267 dwmci_writel(host, DWMCI_CMD, DWMCI_CMD_PRV_DAT_WAIT |
268 DWMCI_CMD_UPD_CLK | DWMCI_CMD_START);
269
270 do {
271 status = dwmci_readl(host, DWMCI_CMD);
272 if (timeout-- < 0) {
Pavel Machekf33c9302014-09-05 12:49:48 +0200273 printf("%s: Timeout!\n", __func__);
Jaehoon Chung757bff42012-10-15 19:10:29 +0000274 return -ETIMEDOUT;
275 }
276 } while (status & DWMCI_CMD_START);
277
278 dwmci_writel(host, DWMCI_CLKENA, DWMCI_CLKEN_ENABLE |
279 DWMCI_CLKEN_LOW_PWR);
280
281 dwmci_writel(host, DWMCI_CMD, DWMCI_CMD_PRV_DAT_WAIT |
282 DWMCI_CMD_UPD_CLK | DWMCI_CMD_START);
283
284 timeout = 10000;
285 do {
286 status = dwmci_readl(host, DWMCI_CMD);
287 if (timeout-- < 0) {
Pavel Machekf33c9302014-09-05 12:49:48 +0200288 printf("%s: Timeout!\n", __func__);
Jaehoon Chung757bff42012-10-15 19:10:29 +0000289 return -ETIMEDOUT;
290 }
291 } while (status & DWMCI_CMD_START);
292
293 host->clock = freq;
294
295 return 0;
296}
297
298static void dwmci_set_ios(struct mmc *mmc)
299{
Jaehoon Chung045bdcd2014-05-16 13:59:55 +0900300 struct dwmci_host *host = (struct dwmci_host *)mmc->priv;
301 u32 ctype, regs;
Jaehoon Chung757bff42012-10-15 19:10:29 +0000302
Pavel Machekf33c9302014-09-05 12:49:48 +0200303 debug("Buswidth = %d, clock: %d\n", mmc->bus_width, mmc->clock);
Jaehoon Chung757bff42012-10-15 19:10:29 +0000304
305 dwmci_setup_bus(host, mmc->clock);
306 switch (mmc->bus_width) {
307 case 8:
308 ctype = DWMCI_CTYPE_8BIT;
309 break;
310 case 4:
311 ctype = DWMCI_CTYPE_4BIT;
312 break;
313 default:
314 ctype = DWMCI_CTYPE_1BIT;
315 break;
316 }
317
318 dwmci_writel(host, DWMCI_CTYPE, ctype);
319
Jaehoon Chung045bdcd2014-05-16 13:59:55 +0900320 regs = dwmci_readl(host, DWMCI_UHS_REG);
Andrew Gabbasov2b8a9692014-12-01 06:59:12 -0600321 if (mmc->ddr_mode)
Jaehoon Chung045bdcd2014-05-16 13:59:55 +0900322 regs |= DWMCI_DDR_MODE;
323 else
Jaehoon Chungafc9e2b2015-01-14 17:37:53 +0900324 regs &= ~DWMCI_DDR_MODE;
Jaehoon Chung045bdcd2014-05-16 13:59:55 +0900325
326 dwmci_writel(host, DWMCI_UHS_REG, regs);
327
Jaehoon Chung757bff42012-10-15 19:10:29 +0000328 if (host->clksel)
329 host->clksel(host);
330}
331
332static int dwmci_init(struct mmc *mmc)
333{
Pantelis Antoniou93bfd612014-03-11 19:34:20 +0200334 struct dwmci_host *host = mmc->priv;
Jaehoon Chung757bff42012-10-15 19:10:29 +0000335
Jaehoon Chung18ab6752013-11-29 20:08:57 +0900336 if (host->board_init)
337 host->board_init(host);
Rajeshwari Shinde6f0b7ca2013-10-29 12:53:13 +0530338
Jaehoon Chung757bff42012-10-15 19:10:29 +0000339 dwmci_writel(host, DWMCI_PWREN, 1);
340
341 if (!dwmci_wait_reset(host, DWMCI_RESET_ALL)) {
Pavel Machekf33c9302014-09-05 12:49:48 +0200342 printf("%s[%d] Fail-reset!!\n", __func__, __LINE__);
Jaehoon Chung757bff42012-10-15 19:10:29 +0000343 return -1;
344 }
345
Amar9c50e352013-04-27 11:42:54 +0530346 /* Enumerate at 400KHz */
Pantelis Antoniou93bfd612014-03-11 19:34:20 +0200347 dwmci_setup_bus(host, mmc->cfg->f_min);
Amar9c50e352013-04-27 11:42:54 +0530348
Jaehoon Chung757bff42012-10-15 19:10:29 +0000349 dwmci_writel(host, DWMCI_RINTSTS, 0xFFFFFFFF);
350 dwmci_writel(host, DWMCI_INTMASK, 0);
351
352 dwmci_writel(host, DWMCI_TMOUT, 0xFFFFFFFF);
353
354 dwmci_writel(host, DWMCI_IDINTEN, 0);
355 dwmci_writel(host, DWMCI_BMOD, 1);
356
Alexey Brodkin9108b312013-11-27 17:00:52 +0400357 if (host->fifoth_val) {
358 dwmci_writel(host, DWMCI_FIFOTH, host->fifoth_val);
Amar9c50e352013-04-27 11:42:54 +0530359 }
Jaehoon Chung757bff42012-10-15 19:10:29 +0000360
361 dwmci_writel(host, DWMCI_CLKENA, 0);
362 dwmci_writel(host, DWMCI_CLKSRC, 0);
363
364 return 0;
365}
366
Pantelis Antoniouab769f22014-02-26 19:28:45 +0200367static const struct mmc_ops dwmci_ops = {
368 .send_cmd = dwmci_send_cmd,
369 .set_ios = dwmci_set_ios,
370 .init = dwmci_init,
371};
372
Jaehoon Chung757bff42012-10-15 19:10:29 +0000373int add_dwmci(struct dwmci_host *host, u32 max_clk, u32 min_clk)
374{
Pantelis Antoniou93bfd612014-03-11 19:34:20 +0200375 host->cfg.name = host->name;
376 host->cfg.ops = &dwmci_ops;
377 host->cfg.f_min = min_clk;
378 host->cfg.f_max = max_clk;
Jaehoon Chung757bff42012-10-15 19:10:29 +0000379
Pantelis Antoniou93bfd612014-03-11 19:34:20 +0200380 host->cfg.voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195;
Jaehoon Chung757bff42012-10-15 19:10:29 +0000381
Pantelis Antoniou93bfd612014-03-11 19:34:20 +0200382 host->cfg.host_caps = host->caps;
Jaehoon Chung757bff42012-10-15 19:10:29 +0000383
384 if (host->buswidth == 8) {
Pantelis Antoniou93bfd612014-03-11 19:34:20 +0200385 host->cfg.host_caps |= MMC_MODE_8BIT;
386 host->cfg.host_caps &= ~MMC_MODE_4BIT;
Jaehoon Chung757bff42012-10-15 19:10:29 +0000387 } else {
Pantelis Antoniou93bfd612014-03-11 19:34:20 +0200388 host->cfg.host_caps |= MMC_MODE_4BIT;
389 host->cfg.host_caps &= ~MMC_MODE_8BIT;
Jaehoon Chung757bff42012-10-15 19:10:29 +0000390 }
Pantelis Antoniou93bfd612014-03-11 19:34:20 +0200391 host->cfg.host_caps |= MMC_MODE_HS | MMC_MODE_HS_52MHz | MMC_MODE_HC;
Jaehoon Chung757bff42012-10-15 19:10:29 +0000392
Pantelis Antoniou93bfd612014-03-11 19:34:20 +0200393 host->cfg.b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
Jaehoon Chung757bff42012-10-15 19:10:29 +0000394
Pantelis Antoniou93bfd612014-03-11 19:34:20 +0200395 host->mmc = mmc_create(&host->cfg, host);
396 if (host->mmc == NULL)
397 return -1;
398
399 return 0;
Jaehoon Chung757bff42012-10-15 19:10:29 +0000400}