| commit | 6ace153d130f528b88117b1edcfe017ea1852d67 | [log] [tgz] |
|---|---|---|
| author | Chin Liang See <clsee@altera.com> | Tue Jun 10 01:26:52 2014 -0500 |
| committer | Pantelis Antoniou <panto@antoniou-consulting.com> | Fri Aug 01 19:45:32 2014 +0300 |
| tree | ad1f6527943f089fa6e7f90a7d35fcd78675cbf6 | |
| parent | dae0f5c644c0f76e67306bd49c09d95373b7357a [diff] |
mmc/dw_mmc: Fix clock divider calculation error for bypass mode To fix the clock divider calculation error when the controller clock same as the operating frequency. This is known as bypass mode. In this mode, the divider should be 0. Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: Rajeshwari Shinde <rajeshwari.s@samsung.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> Cc: Mischa Jonker <mjonker@synopsys.com>