blob: 203e965799e96a6dca6f80fb3353cab95d819e4e [file] [log] [blame]
Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Simon Glass1938f4a2013-03-11 06:49:53 +00002/*
3 * Copyright (c) 2011 The Chromium OS Authors.
4 * (C) Copyright 2002-2006
5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
6 *
7 * (C) Copyright 2002
8 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
9 * Marius Groeger <mgroeger@sysgo.de>
Simon Glass1938f4a2013-03-11 06:49:53 +000010 */
11
12#include <common.h>
Simon Glassf0293d32018-11-15 18:43:52 -070013#include <bloblist.h>
Simon Glass52f24232020-05-10 11:40:00 -060014#include <bootstage.h>
Simon Glassd96c2602019-12-28 10:44:58 -070015#include <clock_legacy.h>
Simon Glass24b852a2015-11-08 23:47:45 -070016#include <console.h>
Mario Six5d6c61a2018-08-06 10:23:41 +020017#include <cpu.h>
Simon Glass30c7c432019-11-14 12:57:34 -070018#include <cpu_func.h>
Simon Glassab7cd622014-07-23 06:55:04 -060019#include <dm.h>
Simon Glass4bfd1f52019-08-01 09:46:43 -060020#include <env.h>
Simon Glassf3998fd2019-08-02 09:44:25 -060021#include <env_internal.h>
Simon Glass1938f4a2013-03-11 06:49:53 +000022#include <fdtdec.h>
Simon Glassf828bf22013-04-20 08:42:41 +000023#include <fs.h>
Simon Glassdb41d652019-12-28 10:45:07 -070024#include <hang.h>
Simon Glasse4fef6c2013-03-11 14:30:42 +000025#include <i2c.h>
Simon Glass67c4e9f2019-11-14 12:57:45 -070026#include <init.h>
Simon Glass1938f4a2013-03-11 06:49:53 +000027#include <initcall.h>
Simon Glass3c1ecde2019-08-01 09:46:38 -060028#include <lcd.h>
Simon Glassf7ae49f2020-05-10 11:40:05 -060029#include <log.h>
Simon Glassfb5cf7f2015-02-27 22:06:36 -070030#include <malloc.h>
Joe Hershberger0eb25b62015-03-22 17:08:59 -050031#include <mapmem.h>
Simon Glassa733b062013-04-26 02:53:43 +000032#include <os.h>
Simon Glass1938f4a2013-03-11 06:49:53 +000033#include <post.h>
Simon Glasse47b2d62017-03-31 08:40:38 -060034#include <relocate.h>
Simon Glassb03e0512019-11-14 12:57:24 -070035#include <serial.h>
Simon Glassb0edea32018-11-15 18:44:09 -070036#ifdef CONFIG_SPL
37#include <spl.h>
38#endif
Jeroen Hofsteec5d40012014-06-23 23:20:19 +020039#include <status_led.h>
Mario Six23471ae2018-08-06 10:23:34 +020040#include <sysreset.h>
Simon Glass1057e6c2016-02-24 09:14:50 -070041#include <timer.h>
Simon Glass71c52db2013-06-11 11:14:42 -070042#include <trace.h>
Simon Glass5a541942016-01-18 19:52:21 -070043#include <video.h>
Simon Glasse4fef6c2013-03-11 14:30:42 +000044#include <watchdog.h>
Simon Glass90526e92020-05-10 11:39:56 -060045#include <asm/cache.h>
Simon Glassb885d022017-05-17 08:23:01 -060046#ifdef CONFIG_MACH_TYPE
47#include <asm/mach-types.h>
48#endif
Simon Glass1fbf97d2017-03-31 08:40:39 -060049#if defined(CONFIG_MP) && defined(CONFIG_PPC)
50#include <asm/mp.h>
51#endif
Simon Glass401d1c42020-10-30 21:38:53 -060052#include <asm/global_data.h>
Simon Glass1938f4a2013-03-11 06:49:53 +000053#include <asm/io.h>
54#include <asm/sections.h>
Simon Glassab7cd622014-07-23 06:55:04 -060055#include <dm/root.h>
Simon Glass056285f2017-03-31 08:40:35 -060056#include <linux/errno.h>
Simon Glass1938f4a2013-03-11 06:49:53 +000057
58/*
59 * Pointer to initial global data area
60 *
61 * Here we initialize it if needed.
62 */
63#ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
64#undef XTRN_DECLARE_GLOBAL_DATA_PTR
65#define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
Mario Six16ef1472018-01-15 11:10:02 +010066DECLARE_GLOBAL_DATA_PTR = (gd_t *)(CONFIG_SYS_INIT_GD_ADDR);
Simon Glass1938f4a2013-03-11 06:49:53 +000067#else
68DECLARE_GLOBAL_DATA_PTR;
69#endif
70
71/*
Simon Glass4c509342015-04-28 20:25:03 -060072 * TODO(sjg@chromium.org): IMO this code should be
Simon Glass1938f4a2013-03-11 06:49:53 +000073 * refactored to a single function, something like:
74 *
75 * void led_set_state(enum led_colour_t colour, int on);
76 */
77/************************************************************************
78 * Coloured LED functionality
79 ************************************************************************
80 * May be supplied by boards if desired
81 */
Jeroen Hofsteec5d40012014-06-23 23:20:19 +020082__weak void coloured_LED_init(void) {}
83__weak void red_led_on(void) {}
84__weak void red_led_off(void) {}
85__weak void green_led_on(void) {}
86__weak void green_led_off(void) {}
87__weak void yellow_led_on(void) {}
88__weak void yellow_led_off(void) {}
89__weak void blue_led_on(void) {}
90__weak void blue_led_off(void) {}
Simon Glass1938f4a2013-03-11 06:49:53 +000091
92/*
93 * Why is gd allocated a register? Prior to reloc it might be better to
94 * just pass it around to each function in this file?
95 *
96 * After reloc one could argue that it is hardly used and doesn't need
97 * to be in a register. Or if it is it should perhaps hold pointers to all
98 * global data for all modules, so that post-reloc we can avoid the massive
99 * literal pool we get on ARM. Or perhaps just encourage each module to use
100 * a structure...
101 */
102
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800103#if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000104static int init_func_watchdog_init(void)
105{
Tom Riniea3310e2017-03-14 11:08:10 -0400106# if defined(CONFIG_HW_WATCHDOG) && \
107 (defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
Prasanthi Chellakumar1473f6a2018-10-09 11:46:40 -0700108 defined(CONFIG_SH) || \
Anatolij Gustschin46d7a3b2016-06-13 14:24:23 +0200109 defined(CONFIG_DESIGNWARE_WATCHDOG) || \
Stefan Roese14a380a2015-03-10 08:04:36 +0100110 defined(CONFIG_IMX_WATCHDOG))
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800111 hw_watchdog_init();
Simon Glasse4fef6c2013-03-11 14:30:42 +0000112 puts(" Watchdog enabled\n");
Anatolij Gustschinba169d92016-06-13 14:24:24 +0200113# endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000114 WATCHDOG_RESET();
115
116 return 0;
117}
118
119int init_func_watchdog_reset(void)
120{
121 WATCHDOG_RESET();
122
123 return 0;
124}
125#endif /* CONFIG_WATCHDOG */
126
Jeroen Hofsteedd2a6cd2014-10-08 22:57:22 +0200127__weak void board_add_ram_info(int use_default)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000128{
129 /* please define platform specific board_add_ram_info() */
130}
131
Simon Glass1938f4a2013-03-11 06:49:53 +0000132static int init_baud_rate(void)
133{
Simon Glassbfebc8c2017-08-03 12:22:13 -0600134 gd->baudrate = env_get_ulong("baudrate", 10, CONFIG_BAUDRATE);
Simon Glass1938f4a2013-03-11 06:49:53 +0000135 return 0;
136}
137
138static int display_text_info(void)
139{
Ben Stoltz9b217492015-07-31 09:31:37 -0600140#if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP)
Daniel Schwierzeck9fdee7d2014-11-15 23:46:53 +0100141 ulong bss_start, bss_end, text_base;
Simon Glass1938f4a2013-03-11 06:49:53 +0000142
Simon Glass632efa72013-03-11 07:06:48 +0000143 bss_start = (ulong)&__bss_start;
144 bss_end = (ulong)&__bss_end;
Albert ARIBAUDb60eff32014-02-22 17:53:43 +0100145
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800146#ifdef CONFIG_SYS_TEXT_BASE
Daniel Schwierzeck9fdee7d2014-11-15 23:46:53 +0100147 text_base = CONFIG_SYS_TEXT_BASE;
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800148#else
Daniel Schwierzeck9fdee7d2014-11-15 23:46:53 +0100149 text_base = CONFIG_SYS_MONITOR_BASE;
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800150#endif
Daniel Schwierzeck9fdee7d2014-11-15 23:46:53 +0100151
152 debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n",
Mario Six16ef1472018-01-15 11:10:02 +0100153 text_base, bss_start, bss_end);
Simon Glassa733b062013-04-26 02:53:43 +0000154#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000155
Simon Glass1938f4a2013-03-11 06:49:53 +0000156 return 0;
157}
158
Mario Six23471ae2018-08-06 10:23:34 +0200159#ifdef CONFIG_SYSRESET
160static int print_resetinfo(void)
161{
162 struct udevice *dev;
163 char status[256];
164 int ret;
165
166 ret = uclass_first_device_err(UCLASS_SYSRESET, &dev);
167 if (ret) {
168 debug("%s: No sysreset device found (error: %d)\n",
169 __func__, ret);
170 /* Not all boards have sysreset drivers available during early
171 * boot, so don't fail if one can't be found.
172 */
173 return 0;
174 }
175
176 if (!sysreset_get_status(dev, status, sizeof(status)))
177 printf("%s", status);
178
179 return 0;
180}
181#endif
182
Mario Six5d6c61a2018-08-06 10:23:41 +0200183#if defined(CONFIG_DISPLAY_CPUINFO) && CONFIG_IS_ENABLED(CPU)
184static int print_cpuinfo(void)
185{
186 struct udevice *dev;
187 char desc[512];
188 int ret;
189
Ye Lif5b66af2020-05-03 21:58:50 +0800190 dev = cpu_get_current_dev();
191 if (!dev) {
192 debug("%s: Could not get CPU device\n",
193 __func__);
194 return -ENODEV;
Mario Six5d6c61a2018-08-06 10:23:41 +0200195 }
196
197 ret = cpu_get_desc(dev, desc, sizeof(desc));
198 if (ret) {
199 debug("%s: Could not get CPU description (err = %d)\n",
200 dev->name, ret);
201 return ret;
202 }
203
Bin Mengecfe6632018-10-10 22:06:55 -0700204 printf("CPU: %s\n", desc);
Mario Six5d6c61a2018-08-06 10:23:41 +0200205
206 return 0;
207}
208#endif
209
Simon Glass1938f4a2013-03-11 06:49:53 +0000210static int announce_dram_init(void)
211{
212 puts("DRAM: ");
213 return 0;
214}
215
216static int show_dram_config(void)
217{
York Sunfa39ffe2014-05-02 17:28:05 -0700218 unsigned long long size;
Simon Glass1938f4a2013-03-11 06:49:53 +0000219 int i;
220
221 debug("\nRAM Configuration:\n");
222 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
223 size += gd->bd->bi_dram[i].size;
Bin Meng715f5992015-08-06 01:31:20 -0700224 debug("Bank #%d: %llx ", i,
225 (unsigned long long)(gd->bd->bi_dram[i].start));
Simon Glass1938f4a2013-03-11 06:49:53 +0000226#ifdef DEBUG
227 print_size(gd->bd->bi_dram[i].size, "\n");
228#endif
229 }
230 debug("\nDRAM: ");
Simon Glass1938f4a2013-03-11 06:49:53 +0000231
Simon Glasse4fef6c2013-03-11 14:30:42 +0000232 print_size(size, "");
233 board_add_ram_info(0);
234 putc('\n');
Simon Glass1938f4a2013-03-11 06:49:53 +0000235
236 return 0;
237}
238
Simon Glass76b00ac2017-03-31 08:40:32 -0600239__weak int dram_init_banksize(void)
Simon Glass1938f4a2013-03-11 06:49:53 +0000240{
Stefan Roesef120aa72020-08-12 13:02:39 +0200241 gd->bd->bi_dram[0].start = gd->ram_base;
Simon Glass1938f4a2013-03-11 06:49:53 +0000242 gd->bd->bi_dram[0].size = get_effective_memsize();
Simon Glass76b00ac2017-03-31 08:40:32 -0600243
244 return 0;
Simon Glass1938f4a2013-03-11 06:49:53 +0000245}
246
Simon Glass69153982017-05-12 21:09:56 -0600247#if defined(CONFIG_SYS_I2C)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000248static int init_func_i2c(void)
249{
250 puts("I2C: ");
trem815a76f2013-09-21 18:13:34 +0200251 i2c_init_all();
Simon Glasse4fef6c2013-03-11 14:30:42 +0000252 puts("ready\n");
253 return 0;
254}
255#endif
256
Rajesh Bhagat1fab98f2018-01-17 16:13:08 +0530257#if defined(CONFIG_VID)
258__weak int init_func_vid(void)
259{
260 return 0;
261}
262#endif
263
Simon Glass1938f4a2013-03-11 06:49:53 +0000264static int setup_mon_len(void)
265{
Michal Simeke945f6d2014-05-08 16:08:44 +0200266#if defined(__ARM__) || defined(__MICROBLAZE__)
Albert ARIBAUDb60eff32014-02-22 17:53:43 +0100267 gd->mon_len = (ulong)&__bss_end - (ulong)_start;
Ben Stoltz9b217492015-07-31 09:31:37 -0600268#elif defined(CONFIG_SANDBOX) || defined(CONFIG_EFI_APP)
Simon Glassa733b062013-04-26 02:53:43 +0000269 gd->mon_len = (ulong)&_end - (ulong)_init;
Tom Riniea3310e2017-03-14 11:08:10 -0400270#elif defined(CONFIG_NIOS2) || defined(CONFIG_XTENSA)
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800271 gd->mon_len = CONFIG_SYS_MONITOR_LEN;
Rick Chen068feb92017-12-26 13:55:58 +0800272#elif defined(CONFIG_NDS32) || defined(CONFIG_SH) || defined(CONFIG_RISCV)
Kun-Hua Huang2e88bb22015-08-24 14:52:35 +0800273 gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start);
Simon Glassb0b35952016-05-14 18:49:28 -0600274#elif defined(CONFIG_SYS_MONITOR_BASE)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000275 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
276 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
Simon Glass632efa72013-03-11 07:06:48 +0000277#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000278 return 0;
279}
280
Simon Glassb0edea32018-11-15 18:44:09 -0700281static int setup_spl_handoff(void)
282{
283#if CONFIG_IS_ENABLED(HANDOFF)
284 gd->spl_handoff = bloblist_find(BLOBLISTT_SPL_HANDOFF,
285 sizeof(struct spl_handoff));
286 debug("Found SPL hand-off info %p\n", gd->spl_handoff);
287#endif
288
289 return 0;
290}
291
Simon Glass1938f4a2013-03-11 06:49:53 +0000292__weak int arch_cpu_init(void)
293{
294 return 0;
295}
296
Paul Burton8ebf5062016-09-21 11:18:46 +0100297__weak int mach_cpu_init(void)
298{
299 return 0;
300}
301
Simon Glass1938f4a2013-03-11 06:49:53 +0000302/* Get the top of usable RAM */
303__weak ulong board_get_usable_ram_top(ulong total_size)
304{
Heinrich Schuchardt54280962020-05-09 21:21:14 +0200305#if defined(CONFIG_SYS_SDRAM_BASE) && CONFIG_SYS_SDRAM_BASE > 0
Stephen Warren1e4d11a2014-12-23 10:34:49 -0700306 /*
Simon Glass4c509342015-04-28 20:25:03 -0600307 * Detect whether we have so much RAM that it goes past the end of our
Stephen Warren1e4d11a2014-12-23 10:34:49 -0700308 * 32-bit address space. If so, clip the usable RAM so it doesn't.
309 */
310 if (gd->ram_top < CONFIG_SYS_SDRAM_BASE)
311 /*
312 * Will wrap back to top of 32-bit space when reservations
313 * are made.
314 */
315 return 0;
316#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000317 return gd->ram_top;
318}
319
320static int setup_dest_addr(void)
321{
322 debug("Monitor len: %08lX\n", gd->mon_len);
323 /*
324 * Ram is setup, size stored in gd !!
325 */
326 debug("Ram size: %08lX\n", (ulong)gd->ram_size);
York Sun36cc0de2017-03-06 09:02:28 -0800327#if defined(CONFIG_SYS_MEM_TOP_HIDE)
Simon Glass1938f4a2013-03-11 06:49:53 +0000328 /*
329 * Subtract specified amount of memory to hide so that it won't
330 * get "touched" at all by U-Boot. By fixing up gd->ram_size
331 * the Linux kernel should now get passed the now "corrected"
York Sun36cc0de2017-03-06 09:02:28 -0800332 * memory size and won't touch it either. This should work
333 * for arch/ppc and arch/powerpc. Only Linux board ports in
334 * arch/powerpc with bootwrapper support, that recalculate the
335 * memory size from the SDRAM controller setup will have to
336 * get fixed.
Simon Glass1938f4a2013-03-11 06:49:53 +0000337 */
York Sun36cc0de2017-03-06 09:02:28 -0800338 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
339#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000340#ifdef CONFIG_SYS_SDRAM_BASE
Siva Durga Prasad Paladugu1473b122018-07-16 15:56:10 +0530341 gd->ram_base = CONFIG_SYS_SDRAM_BASE;
Simon Glass1938f4a2013-03-11 06:49:53 +0000342#endif
Siva Durga Prasad Paladugu1473b122018-07-16 15:56:10 +0530343 gd->ram_top = gd->ram_base + get_effective_memsize();
Simon Glass1938f4a2013-03-11 06:49:53 +0000344 gd->ram_top = board_get_usable_ram_top(gd->mon_len);
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000345 gd->relocaddr = gd->ram_top;
Simon Glass1938f4a2013-03-11 06:49:53 +0000346 debug("Ram top: %08lX\n", (ulong)gd->ram_top);
Gabriel Huauec3b4822014-09-03 13:57:54 -0700347#if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
Simon Glasse4fef6c2013-03-11 14:30:42 +0000348 /*
349 * We need to make sure the location we intend to put secondary core
350 * boot code is reserved and not used by any part of u-boot
351 */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000352 if (gd->relocaddr > determine_mp_bootpg(NULL)) {
353 gd->relocaddr = determine_mp_bootpg(NULL);
354 debug("Reserving MP boot page to %08lx\n", gd->relocaddr);
Simon Glasse4fef6c2013-03-11 14:30:42 +0000355 }
356#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000357 return 0;
358}
359
Simon Glass1938f4a2013-03-11 06:49:53 +0000360#ifdef CONFIG_PRAM
361/* reserve protected RAM */
362static int reserve_pram(void)
363{
364 ulong reg;
365
Simon Glassbfebc8c2017-08-03 12:22:13 -0600366 reg = env_get_ulong("pram", 10, CONFIG_PRAM);
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000367 gd->relocaddr -= (reg << 10); /* size is in kB */
Simon Glass1938f4a2013-03-11 06:49:53 +0000368 debug("Reserving %ldk for protected RAM at %08lx\n", reg,
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000369 gd->relocaddr);
Simon Glass1938f4a2013-03-11 06:49:53 +0000370 return 0;
371}
372#endif /* CONFIG_PRAM */
373
374/* Round memory pointer down to next 4 kB limit */
375static int reserve_round_4k(void)
376{
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000377 gd->relocaddr &= ~(4096 - 1);
Simon Glass1938f4a2013-03-11 06:49:53 +0000378 return 0;
379}
380
Ovidiu Panait79926e42020-03-29 20:57:41 +0300381__weak int arch_reserve_mmu(void)
382{
383 return 0;
384}
385
Simon Glass5a541942016-01-18 19:52:21 -0700386static int reserve_video(void)
387{
Simon Glass0f079eb2017-03-31 08:40:30 -0600388#ifdef CONFIG_DM_VIDEO
Simon Glass5a541942016-01-18 19:52:21 -0700389 ulong addr;
390 int ret;
391
392 addr = gd->relocaddr;
393 ret = video_reserve(&addr);
394 if (ret)
395 return ret;
Simon Glass5630d2f2020-09-27 18:46:22 -0600396 debug("Reserving %luk for video at: %08lx\n",
Patrick Delaunay83064c22021-04-09 18:02:06 +0200397 ((unsigned long)gd->relocaddr - addr) >> 10, addr);
Simon Glass5a541942016-01-18 19:52:21 -0700398 gd->relocaddr = addr;
Simon Glass0f079eb2017-03-31 08:40:30 -0600399#elif defined(CONFIG_LCD)
Simon Glass5a541942016-01-18 19:52:21 -0700400# ifdef CONFIG_FB_ADDR
Simon Glass1938f4a2013-03-11 06:49:53 +0000401 gd->fb_base = CONFIG_FB_ADDR;
Simon Glass5a541942016-01-18 19:52:21 -0700402# else
Simon Glass1938f4a2013-03-11 06:49:53 +0000403 /* reserve memory for LCD display (always full pages) */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000404 gd->relocaddr = lcd_setmem(gd->relocaddr);
405 gd->fb_base = gd->relocaddr;
Simon Glass5a541942016-01-18 19:52:21 -0700406# endif /* CONFIG_FB_ADDR */
Simon Glass0f079eb2017-03-31 08:40:30 -0600407#endif
Simon Glass8703ef32016-01-18 19:52:20 -0700408
409 return 0;
410}
Simon Glass8703ef32016-01-18 19:52:20 -0700411
Simon Glass71c52db2013-06-11 11:14:42 -0700412static int reserve_trace(void)
413{
414#ifdef CONFIG_TRACE
415 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
416 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
Heinrich Schuchardt7ea33572019-06-14 21:52:22 +0200417 debug("Reserving %luk for trace data at: %08lx\n",
418 (unsigned long)CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
Simon Glass71c52db2013-06-11 11:14:42 -0700419#endif
420
421 return 0;
422}
423
Simon Glass1938f4a2013-03-11 06:49:53 +0000424static int reserve_uboot(void)
425{
Alexey Brodkinff2b2ba2018-05-25 16:08:14 +0300426 if (!(gd->flags & GD_FLG_SKIP_RELOC)) {
427 /*
428 * reserve memory for U-Boot code, data & bss
429 * round down to next 4 kB limit
430 */
431 gd->relocaddr -= gd->mon_len;
432 gd->relocaddr &= ~(4096 - 1);
433 #if defined(CONFIG_E500) || defined(CONFIG_MIPS)
434 /* round down to next 64 kB limit so that IVPR stays aligned */
435 gd->relocaddr &= ~(65536 - 1);
436 #endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000437
Alexey Brodkinff2b2ba2018-05-25 16:08:14 +0300438 debug("Reserving %ldk for U-Boot at: %08lx\n",
439 gd->mon_len >> 10, gd->relocaddr);
440 }
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000441
442 gd->start_addr_sp = gd->relocaddr;
443
Simon Glass1938f4a2013-03-11 06:49:53 +0000444 return 0;
445}
446
Patrick Delaunay65c141e2020-03-10 10:15:05 +0100447/*
448 * reserve after start_addr_sp the requested size and make the stack pointer
449 * 16-byte aligned, this alignment is needed for cast on the reserved memory
450 * ref = x86_64 ABI: https://reviews.llvm.org/D30049: 16 bytes
451 * = ARMv8 Instruction Set Overview: quad word, 16 bytes
452 */
453static unsigned long reserve_stack_aligned(size_t size)
454{
455 return ALIGN_DOWN(gd->start_addr_sp - size, 16);
456}
457
Vikas Manocha5f7adb52019-08-16 09:57:44 -0700458#ifdef CONFIG_SYS_NONCACHED_MEMORY
459static int reserve_noncached(void)
460{
Stephen Warren5e0404f2019-08-27 11:54:31 -0600461 /*
462 * The value of gd->start_addr_sp must match the value of malloc_start
463 * calculated in boatrd_f.c:initr_malloc(), which is passed to
464 * board_r.c:mem_malloc_init() and then used by
465 * cache.c:noncached_init()
466 *
467 * These calculations must match the code in cache.c:noncached_init()
468 */
469 gd->start_addr_sp = ALIGN(gd->start_addr_sp, MMU_SECTION_SIZE) -
470 MMU_SECTION_SIZE;
471 gd->start_addr_sp -= ALIGN(CONFIG_SYS_NONCACHED_MEMORY,
472 MMU_SECTION_SIZE);
Vikas Manocha5f7adb52019-08-16 09:57:44 -0700473 debug("Reserving %dM for noncached_alloc() at: %08lx\n",
474 CONFIG_SYS_NONCACHED_MEMORY >> 20, gd->start_addr_sp);
475
476 return 0;
477}
478#endif
479
Simon Glass1938f4a2013-03-11 06:49:53 +0000480/* reserve memory for malloc() area */
481static int reserve_malloc(void)
482{
Patrick Delaunay65c141e2020-03-10 10:15:05 +0100483 gd->start_addr_sp = reserve_stack_aligned(TOTAL_MALLOC_LEN);
Simon Glass1938f4a2013-03-11 06:49:53 +0000484 debug("Reserving %dk for malloc() at: %08lx\n",
Mario Six16ef1472018-01-15 11:10:02 +0100485 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
Vikas Manocha5f7adb52019-08-16 09:57:44 -0700486#ifdef CONFIG_SYS_NONCACHED_MEMORY
487 reserve_noncached();
488#endif
489
Simon Glass1938f4a2013-03-11 06:49:53 +0000490 return 0;
491}
492
493/* (permanently) allocate a Board Info struct */
494static int reserve_board(void)
495{
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800496 if (!gd->bd) {
Masahiro Yamadab75d8dc2020-06-26 15:13:33 +0900497 gd->start_addr_sp = reserve_stack_aligned(sizeof(struct bd_info));
498 gd->bd = (struct bd_info *)map_sysmem(gd->start_addr_sp,
499 sizeof(struct bd_info));
500 memset(gd->bd, '\0', sizeof(struct bd_info));
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800501 debug("Reserving %zu Bytes for Board Info at: %08lx\n",
Masahiro Yamadab75d8dc2020-06-26 15:13:33 +0900502 sizeof(struct bd_info), gd->start_addr_sp);
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800503 }
Simon Glass1938f4a2013-03-11 06:49:53 +0000504 return 0;
505}
506
Simon Glass1938f4a2013-03-11 06:49:53 +0000507static int reserve_global_data(void)
508{
Patrick Delaunay65c141e2020-03-10 10:15:05 +0100509 gd->start_addr_sp = reserve_stack_aligned(sizeof(gd_t));
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000510 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
Simon Glass1938f4a2013-03-11 06:49:53 +0000511 debug("Reserving %zu Bytes for Global Data at: %08lx\n",
Mario Six16ef1472018-01-15 11:10:02 +0100512 sizeof(gd_t), gd->start_addr_sp);
Simon Glass1938f4a2013-03-11 06:49:53 +0000513 return 0;
514}
515
516static int reserve_fdt(void)
517{
Ovidiu Panait19b18da2020-11-28 10:43:07 +0200518 if (!IS_ENABLED(CONFIG_OF_EMBED)) {
519 /*
520 * If the device tree is sitting immediately above our image
521 * then we must relocate it. If it is embedded in the data
522 * section, then it will be relocated with other data.
523 */
524 if (gd->fdt_blob) {
525 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob), 32);
Simon Glass1938f4a2013-03-11 06:49:53 +0000526
Ovidiu Panait19b18da2020-11-28 10:43:07 +0200527 gd->start_addr_sp = reserve_stack_aligned(gd->fdt_size);
528 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
529 debug("Reserving %lu Bytes for FDT at: %08lx\n",
530 gd->fdt_size, gd->start_addr_sp);
531 }
Simon Glass1938f4a2013-03-11 06:49:53 +0000532 }
533
534 return 0;
535}
536
Simon Glass25e7dc62017-05-22 05:05:30 -0600537static int reserve_bootstage(void)
538{
539#ifdef CONFIG_BOOTSTAGE
540 int size = bootstage_get_size();
541
Patrick Delaunay65c141e2020-03-10 10:15:05 +0100542 gd->start_addr_sp = reserve_stack_aligned(size);
Simon Glass25e7dc62017-05-22 05:05:30 -0600543 gd->new_bootstage = map_sysmem(gd->start_addr_sp, size);
544 debug("Reserving %#x Bytes for bootstage at: %08lx\n", size,
545 gd->start_addr_sp);
546#endif
547
548 return 0;
549}
550
Patrick Delaunayd6f87712018-03-13 13:57:00 +0100551__weak int arch_reserve_stacks(void)
Andreas Bießmann68145d42015-02-06 23:06:45 +0100552{
553 return 0;
554}
555
Simon Glass1938f4a2013-03-11 06:49:53 +0000556static int reserve_stacks(void)
557{
Andreas Bießmann68145d42015-02-06 23:06:45 +0100558 /* make stack pointer 16-byte aligned */
Patrick Delaunay65c141e2020-03-10 10:15:05 +0100559 gd->start_addr_sp = reserve_stack_aligned(16);
Simon Glass1938f4a2013-03-11 06:49:53 +0000560
561 /*
Simon Glass4c509342015-04-28 20:25:03 -0600562 * let the architecture-specific code tailor gd->start_addr_sp and
Andreas Bießmann68145d42015-02-06 23:06:45 +0100563 * gd->irq_sp
Simon Glass1938f4a2013-03-11 06:49:53 +0000564 */
Andreas Bießmann68145d42015-02-06 23:06:45 +0100565 return arch_reserve_stacks();
Simon Glass1938f4a2013-03-11 06:49:53 +0000566}
567
Simon Glassf0293d32018-11-15 18:43:52 -0700568static int reserve_bloblist(void)
569{
570#ifdef CONFIG_BLOBLIST
Simon Glass4a08fae2020-09-27 18:46:18 -0600571 /* Align to a 4KB boundary for easier reading of addresses */
Simon Glass9fe06462021-01-13 20:29:43 -0700572 gd->start_addr_sp = ALIGN_DOWN(gd->start_addr_sp -
573 CONFIG_BLOBLIST_SIZE_RELOC, 0x1000);
574 gd->new_bloblist = map_sysmem(gd->start_addr_sp,
575 CONFIG_BLOBLIST_SIZE_RELOC);
Simon Glassf0293d32018-11-15 18:43:52 -0700576#endif
577
578 return 0;
579}
580
Simon Glass1938f4a2013-03-11 06:49:53 +0000581static int display_new_sp(void)
582{
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000583 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
Simon Glass1938f4a2013-03-11 06:49:53 +0000584
585 return 0;
586}
587
Ovidiu Panait81e7cb12020-07-24 14:12:15 +0300588__weak int arch_setup_bdinfo(void)
Ovidiu Panaitba743102020-07-24 14:12:14 +0300589{
590 return 0;
591}
592
Ovidiu Panait81e7cb12020-07-24 14:12:15 +0300593int setup_bdinfo(void)
594{
Ovidiu Panaita4aa1882020-07-24 14:12:16 +0300595 struct bd_info *bd = gd->bd;
596
Ovidiu Panait49122242020-07-24 14:12:17 +0300597 if (IS_ENABLED(CONFIG_SYS_HAS_SRAM)) {
598 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
599 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
600 }
601
Ovidiu Panait36716682020-11-28 10:43:06 +0200602#ifdef CONFIG_MACH_TYPE
603 bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
604#endif
605
Ovidiu Panait81e7cb12020-07-24 14:12:15 +0300606 return arch_setup_bdinfo();
607}
608
Simon Glass1938f4a2013-03-11 06:49:53 +0000609#ifdef CONFIG_POST
610static int init_post(void)
611{
612 post_bootmode_init();
613 post_run(NULL, POST_ROM | post_bootmode_get(0));
614
615 return 0;
616}
617#endif
618
Simon Glass1938f4a2013-03-11 06:49:53 +0000619static int reloc_fdt(void)
620{
Ovidiu Panait19b18da2020-11-28 10:43:07 +0200621 if (!IS_ENABLED(CONFIG_OF_EMBED)) {
622 if (gd->flags & GD_FLG_SKIP_RELOC)
623 return 0;
624 if (gd->new_fdt) {
625 memcpy(gd->new_fdt, gd->fdt_blob,
626 fdt_totalsize(gd->fdt_blob));
627 gd->fdt_blob = gd->new_fdt;
628 }
Simon Glass1938f4a2013-03-11 06:49:53 +0000629 }
630
631 return 0;
632}
633
Simon Glass25e7dc62017-05-22 05:05:30 -0600634static int reloc_bootstage(void)
635{
636#ifdef CONFIG_BOOTSTAGE
637 if (gd->flags & GD_FLG_SKIP_RELOC)
638 return 0;
639 if (gd->new_bootstage) {
640 int size = bootstage_get_size();
641
642 debug("Copying bootstage from %p to %p, size %x\n",
643 gd->bootstage, gd->new_bootstage, size);
644 memcpy(gd->new_bootstage, gd->bootstage, size);
645 gd->bootstage = gd->new_bootstage;
Simon Glassac9cd482019-10-21 17:26:50 -0600646 bootstage_relocate();
Simon Glass25e7dc62017-05-22 05:05:30 -0600647 }
648#endif
649
650 return 0;
651}
652
Simon Glassf0293d32018-11-15 18:43:52 -0700653static int reloc_bloblist(void)
654{
655#ifdef CONFIG_BLOBLIST
656 if (gd->flags & GD_FLG_SKIP_RELOC)
657 return 0;
658 if (gd->new_bloblist) {
659 int size = CONFIG_BLOBLIST_SIZE;
660
661 debug("Copying bloblist from %p to %p, size %x\n",
662 gd->bloblist, gd->new_bloblist, size);
Simon Glass9fe06462021-01-13 20:29:43 -0700663 bloblist_reloc(gd->new_bloblist, CONFIG_BLOBLIST_SIZE_RELOC,
664 gd->bloblist, size);
Simon Glassf0293d32018-11-15 18:43:52 -0700665 gd->bloblist = gd->new_bloblist;
666 }
667#endif
668
669 return 0;
670}
671
Simon Glass1938f4a2013-03-11 06:49:53 +0000672static int setup_reloc(void)
673{
Simon Glassf05ad9b2015-08-04 12:33:39 -0600674 if (gd->flags & GD_FLG_SKIP_RELOC) {
675 debug("Skipping relocation due to flag\n");
676 return 0;
677 }
678
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800679#ifdef CONFIG_SYS_TEXT_BASE
Lothar Waßmann53207bf2017-06-08 10:18:25 +0200680#ifdef ARM
681 gd->reloc_off = gd->relocaddr - (unsigned long)__image_copy_start;
682#elif defined(CONFIG_M68K)
angelo@sysam.ite310b932015-02-12 01:40:17 +0100683 /*
684 * On all ColdFire arch cpu, monitor code starts always
685 * just after the default vector table location, so at 0x400
686 */
687 gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400);
Simon Glass001d1882019-04-08 13:20:41 -0600688#elif !defined(CONFIG_SANDBOX)
Lothar Waßmann53207bf2017-06-08 10:18:25 +0200689 gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
angelo@sysam.ite310b932015-02-12 01:40:17 +0100690#endif
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800691#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000692 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
693
694 debug("Relocation Offset is: %08lx\n", gd->reloc_off);
Simon Glassa733b062013-04-26 02:53:43 +0000695 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000696 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
697 gd->start_addr_sp);
Simon Glass1938f4a2013-03-11 06:49:53 +0000698
699 return 0;
700}
701
mario.six@gdsys.cc2a792752017-02-22 16:07:22 +0100702#ifdef CONFIG_OF_BOARD_FIXUP
703static int fix_fdt(void)
704{
705 return board_fix_fdt((void *)gd->fdt_blob);
706}
707#endif
708
Simon Glass1938f4a2013-03-11 06:49:53 +0000709/* ARM calls relocate_code from its crt0.S */
Simon Glass530f27e2017-01-16 07:03:49 -0700710#if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
711 !CONFIG_IS_ENABLED(X86_64)
Simon Glass1938f4a2013-03-11 06:49:53 +0000712
713static int jump_to_copy(void)
714{
Simon Glassf05ad9b2015-08-04 12:33:39 -0600715 if (gd->flags & GD_FLG_SKIP_RELOC)
716 return 0;
Simon Glass48a33802013-03-05 14:39:52 +0000717 /*
718 * x86 is special, but in a nice way. It uses a trampoline which
719 * enables the dcache if possible.
720 *
721 * For now, other archs use relocate_code(), which is implemented
722 * similarly for all archs. When we do generic relocation, hopefully
723 * we can make all archs enable the dcache prior to relocation.
724 */
Alexey Brodkin3fb80162015-02-24 19:40:36 +0300725#if defined(CONFIG_X86) || defined(CONFIG_ARC)
Simon Glass48a33802013-03-05 14:39:52 +0000726 /*
727 * SDRAM and console are now initialised. The final stack can now
728 * be setup in SDRAM. Code execution will continue in Flash, but
729 * with the stack in SDRAM and Global Data in temporary memory
730 * (CPU cache)
731 */
Simon Glassf0c7d9c2015-08-10 20:44:32 -0600732 arch_setup_gd(gd->new_gd);
Simon Glass48a33802013-03-05 14:39:52 +0000733 board_init_f_r_trampoline(gd->start_addr_sp);
734#else
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000735 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
Simon Glass48a33802013-03-05 14:39:52 +0000736#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000737
738 return 0;
739}
740#endif
741
742/* Record the board_init_f() bootstage (after arch_cpu_init()) */
Simon Glassb383d6c2017-05-22 05:05:25 -0600743static int initf_bootstage(void)
Simon Glass1938f4a2013-03-11 06:49:53 +0000744{
Simon Glassbaa7d342017-06-07 10:28:46 -0600745 bool from_spl = IS_ENABLED(CONFIG_SPL_BOOTSTAGE) &&
746 IS_ENABLED(CONFIG_BOOTSTAGE_STASH);
Simon Glassb383d6c2017-05-22 05:05:25 -0600747 int ret;
748
Simon Glass824bb1b2017-05-22 05:05:35 -0600749 ret = bootstage_init(!from_spl);
Simon Glassb383d6c2017-05-22 05:05:25 -0600750 if (ret)
751 return ret;
Simon Glass824bb1b2017-05-22 05:05:35 -0600752 if (from_spl) {
753 const void *stash = map_sysmem(CONFIG_BOOTSTAGE_STASH_ADDR,
754 CONFIG_BOOTSTAGE_STASH_SIZE);
755
756 ret = bootstage_unstash(stash, CONFIG_BOOTSTAGE_STASH_SIZE);
757 if (ret && ret != -ENOENT) {
758 debug("Failed to unstash bootstage: err=%d\n", ret);
759 return ret;
760 }
761 }
Simon Glassb383d6c2017-05-22 05:05:25 -0600762
Simon Glass1938f4a2013-03-11 06:49:53 +0000763 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
764
765 return 0;
766}
767
Simon Glassab7cd622014-07-23 06:55:04 -0600768static int initf_dm(void)
769{
Andy Yanf1896c42017-07-24 17:43:34 +0800770#if defined(CONFIG_DM) && CONFIG_VAL(SYS_MALLOC_F_LEN)
Simon Glassab7cd622014-07-23 06:55:04 -0600771 int ret;
772
Simon Glassb67eefd2020-05-10 11:39:59 -0600773 bootstage_start(BOOTSTAGE_ID_ACCUM_DM_F, "dm_f");
Simon Glassab7cd622014-07-23 06:55:04 -0600774 ret = dm_init_and_scan(true);
Simon Glassb67eefd2020-05-10 11:39:59 -0600775 bootstage_accum(BOOTSTAGE_ID_ACCUM_DM_F);
Simon Glassab7cd622014-07-23 06:55:04 -0600776 if (ret)
777 return ret;
Ovidiu Panait4b9a1212020-11-28 10:43:05 +0200778
779 if (IS_ENABLED(CONFIG_TIMER_EARLY)) {
780 ret = dm_timer_init();
781 if (ret)
782 return ret;
783 }
Simon Glass1057e6c2016-02-24 09:14:50 -0700784#endif
Simon Glassab7cd622014-07-23 06:55:04 -0600785
786 return 0;
787}
788
Simon Glass146251f2015-01-19 22:16:12 -0700789/* Architecture-specific memory reservation */
790__weak int reserve_arch(void)
791{
792 return 0;
793}
794
Simon Glassd4c671c2015-03-05 12:25:16 -0700795__weak int arch_cpu_init_dm(void)
796{
797 return 0;
798}
799
Ovidiu Panait016e4ae2020-01-22 22:28:25 +0200800__weak int checkcpu(void)
801{
802 return 0;
803}
804
Ovidiu Panaitfbf9c152020-02-05 08:54:42 +0200805__weak int clear_bss(void)
806{
807 return 0;
808}
809
Simon Glass4acff452017-01-16 07:03:50 -0700810static const init_fnc_t init_sequence_f[] = {
Simon Glass1938f4a2013-03-11 06:49:53 +0000811 setup_mon_len,
Simon Glassb45122f2015-02-27 22:06:34 -0700812#ifdef CONFIG_OF_CONTROL
Simon Glass08793612015-02-27 22:06:35 -0700813 fdtdec_setup,
Simon Glassb45122f2015-02-27 22:06:34 -0700814#endif
Heinrich Schuchardt7ef8e9b2019-06-02 00:53:24 +0200815#ifdef CONFIG_TRACE_EARLY
Simon Glass71c52db2013-06-11 11:14:42 -0700816 trace_early_init,
Kevin Hilmand2107182014-12-09 15:03:58 -0800817#endif
Simon Glass768e0f52014-11-10 18:00:18 -0700818 initf_malloc,
Simon Glassaf1bc0c2017-12-04 13:48:28 -0700819 log_init,
Simon Glass5ac44a52017-05-22 05:05:31 -0600820 initf_bootstage, /* uses its own timer, so does not need DM */
Simon Glassf0293d32018-11-15 18:43:52 -0700821#ifdef CONFIG_BLOBLIST
822 bloblist_init,
823#endif
Simon Glassb0edea32018-11-15 18:44:09 -0700824 setup_spl_handoff,
Ovidiu Panait8e8d45e2020-11-28 10:43:04 +0200825#if defined(CONFIG_CONSOLE_RECORD_INIT_F)
826 console_record_init,
827#endif
Simon Glass671549e2017-03-28 10:27:18 -0600828#if defined(CONFIG_HAVE_FSP)
829 arch_fsp_init,
Bin Menga52a068e2015-08-20 06:40:18 -0700830#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000831 arch_cpu_init, /* basic arch cpu dependent setup */
Paul Burton8ebf5062016-09-21 11:18:46 +0100832 mach_cpu_init, /* SoC/machine dependent CPU setup */
Simon Glass3ea09532014-09-03 17:36:59 -0600833 initf_dm,
Simon Glassd4c671c2015-03-05 12:25:16 -0700834 arch_cpu_init_dm,
Simon Glass1938f4a2013-03-11 06:49:53 +0000835#if defined(CONFIG_BOARD_EARLY_INIT_F)
836 board_early_init_f,
837#endif
Simon Glass727e94a2017-03-28 10:27:26 -0600838#if defined(CONFIG_PPC) || defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K)
Simon Glassc252c062017-03-28 10:27:19 -0600839 /* get CPU and bus clocks according to the environment variable */
Simon Glasse4fef6c2013-03-11 14:30:42 +0000840 get_clocks, /* get CPU and bus clocks (etc.) */
Simon Glass1793e782017-03-28 10:27:23 -0600841#endif
Angelo Dureghello0ce45282017-05-10 23:58:06 +0200842#if !defined(CONFIG_M68K)
Simon Glass1938f4a2013-03-11 06:49:53 +0000843 timer_init, /* initialize timer */
Angelo Dureghello0ce45282017-05-10 23:58:06 +0200844#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000845#if defined(CONFIG_BOARD_POSTCLK_INIT)
846 board_postclk_init,
847#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000848 env_init, /* initialize environment */
849 init_baud_rate, /* initialze baudrate settings */
850 serial_init, /* serial communications setup */
851 console_init_f, /* stage 1 init of console */
852 display_options, /* say that we are here */
853 display_text_info, /* show debugging info if required */
Simon Glasse4fef6c2013-03-11 14:30:42 +0000854 checkcpu,
Mario Six23471ae2018-08-06 10:23:34 +0200855#if defined(CONFIG_SYSRESET)
856 print_resetinfo,
857#endif
Simon Glasscc664002017-01-23 13:31:25 -0700858#if defined(CONFIG_DISPLAY_CPUINFO)
Simon Glass1938f4a2013-03-11 06:49:53 +0000859 print_cpuinfo, /* display cpu info (and speed) */
Simon Glasscc664002017-01-23 13:31:25 -0700860#endif
Cooper Jr., Franklinaf9e6ad2017-06-16 17:25:12 -0500861#if defined(CONFIG_DTB_RESELECT)
862 embedded_dtb_select,
863#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000864#if defined(CONFIG_DISPLAY_BOARDINFO)
Masahiro Yamada0365ffc2015-01-14 17:07:05 +0900865 show_board_info,
Simon Glass1938f4a2013-03-11 06:49:53 +0000866#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000867 INIT_FUNC_WATCHDOG_INIT
868#if defined(CONFIG_MISC_INIT_F)
869 misc_init_f,
870#endif
871 INIT_FUNC_WATCHDOG_RESET
Simon Glass69153982017-05-12 21:09:56 -0600872#if defined(CONFIG_SYS_I2C)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000873 init_func_i2c,
874#endif
Rajesh Bhagat1fab98f2018-01-17 16:13:08 +0530875#if defined(CONFIG_VID) && !defined(CONFIG_SPL)
876 init_func_vid,
877#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000878 announce_dram_init,
Simon Glass1938f4a2013-03-11 06:49:53 +0000879 dram_init, /* configure available RAM banks */
Simon Glasse4fef6c2013-03-11 14:30:42 +0000880#ifdef CONFIG_POST
881 post_init_f,
882#endif
883 INIT_FUNC_WATCHDOG_RESET
884#if defined(CONFIG_SYS_DRAM_TEST)
885 testdram,
886#endif /* CONFIG_SYS_DRAM_TEST */
887 INIT_FUNC_WATCHDOG_RESET
888
Simon Glass1938f4a2013-03-11 06:49:53 +0000889#ifdef CONFIG_POST
890 init_post,
891#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000892 INIT_FUNC_WATCHDOG_RESET
Simon Glass1938f4a2013-03-11 06:49:53 +0000893 /*
894 * Now that we have DRAM mapped and working, we can
895 * relocate the code and continue running from DRAM.
896 *
897 * Reserve memory at end of RAM for (top down in that order):
898 * - area that won't get touched by U-Boot and Linux (optional)
899 * - kernel log buffer
900 * - protected RAM
901 * - LCD framebuffer
902 * - monitor code
903 * - board info struct
904 */
905 setup_dest_addr,
Pragnesh Patel313981c2020-08-13 10:12:26 +0530906#ifdef CONFIG_OF_BOARD_FIXUP
907 fix_fdt,
908#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000909#ifdef CONFIG_PRAM
910 reserve_pram,
911#endif
912 reserve_round_4k,
Ovidiu Panait79926e42020-03-29 20:57:41 +0300913 arch_reserve_mmu,
Simon Glass5a541942016-01-18 19:52:21 -0700914 reserve_video,
Simon Glass8703ef32016-01-18 19:52:20 -0700915 reserve_trace,
Simon Glass1938f4a2013-03-11 06:49:53 +0000916 reserve_uboot,
917 reserve_malloc,
918 reserve_board,
Simon Glass1938f4a2013-03-11 06:49:53 +0000919 reserve_global_data,
920 reserve_fdt,
Simon Glass25e7dc62017-05-22 05:05:30 -0600921 reserve_bootstage,
Simon Glassf0293d32018-11-15 18:43:52 -0700922 reserve_bloblist,
Simon Glass146251f2015-01-19 22:16:12 -0700923 reserve_arch,
Simon Glass1938f4a2013-03-11 06:49:53 +0000924 reserve_stacks,
Simon Glass76b00ac2017-03-31 08:40:32 -0600925 dram_init_banksize,
Simon Glass1938f4a2013-03-11 06:49:53 +0000926 show_dram_config,
Simon Glasse4fef6c2013-03-11 14:30:42 +0000927 INIT_FUNC_WATCHDOG_RESET
Ovidiu Panait15328852020-07-24 14:12:20 +0300928 setup_bdinfo,
Simon Glass1938f4a2013-03-11 06:49:53 +0000929 display_new_sp,
Simon Glasse4fef6c2013-03-11 14:30:42 +0000930 INIT_FUNC_WATCHDOG_RESET
Simon Glass1938f4a2013-03-11 06:49:53 +0000931 reloc_fdt,
Simon Glass25e7dc62017-05-22 05:05:30 -0600932 reloc_bootstage,
Simon Glassf0293d32018-11-15 18:43:52 -0700933 reloc_bloblist,
Simon Glass1938f4a2013-03-11 06:49:53 +0000934 setup_reloc,
Alexey Brodkin3fb80162015-02-24 19:40:36 +0300935#if defined(CONFIG_X86) || defined(CONFIG_ARC)
Simon Glass313aef32015-01-01 16:18:09 -0700936 copy_uboot_to_ram,
Simon Glass313aef32015-01-01 16:18:09 -0700937 do_elf_reloc_fixups,
938#endif
Chris Zankelde5e5ce2016-08-10 18:36:43 +0300939 clear_bss,
Simon Glass530f27e2017-01-16 07:03:49 -0700940#if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
941 !CONFIG_IS_ENABLED(X86_64)
Simon Glass1938f4a2013-03-11 06:49:53 +0000942 jump_to_copy,
943#endif
944 NULL,
945};
946
947void board_init_f(ulong boot_flags)
948{
Simon Glass1938f4a2013-03-11 06:49:53 +0000949 gd->flags = boot_flags;
Alexey Brodkin9aed5a22013-11-27 22:32:40 +0400950 gd->have_console = 0;
Simon Glass1938f4a2013-03-11 06:49:53 +0000951
952 if (initcall_run_list(init_sequence_f))
953 hang();
954
Ben Stoltz9b217492015-07-31 09:31:37 -0600955#if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
Alexey Brodkin264d2982015-12-16 19:24:10 +0300956 !defined(CONFIG_EFI_APP) && !CONFIG_IS_ENABLED(X86_64) && \
957 !defined(CONFIG_ARC)
Simon Glass1938f4a2013-03-11 06:49:53 +0000958 /* NOTREACHED - jump_to_copy() does not return */
959 hang();
960#endif
961}
962
Alexey Brodkin3fb80162015-02-24 19:40:36 +0300963#if defined(CONFIG_X86) || defined(CONFIG_ARC)
Simon Glass48a33802013-03-05 14:39:52 +0000964/*
965 * For now this code is only used on x86.
966 *
967 * init_sequence_f_r is the list of init functions which are run when
968 * U-Boot is executing from Flash with a semi-limited 'C' environment.
969 * The following limitations must be considered when implementing an
970 * '_f_r' function:
971 * - 'static' variables are read-only
972 * - Global Data (gd->xxx) is read/write
973 *
974 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
975 * supported). It _should_, if possible, copy global data to RAM and
976 * initialise the CPU caches (to speed up the relocation process)
977 *
978 * NOTE: At present only x86 uses this route, but it is intended that
979 * all archs will move to this when generic relocation is implemented.
980 */
Simon Glass4acff452017-01-16 07:03:50 -0700981static const init_fnc_t init_sequence_f_r[] = {
Simon Glass530f27e2017-01-16 07:03:49 -0700982#if !CONFIG_IS_ENABLED(X86_64)
Simon Glass48a33802013-03-05 14:39:52 +0000983 init_cache_f_r,
Simon Glass530f27e2017-01-16 07:03:49 -0700984#endif
Simon Glass48a33802013-03-05 14:39:52 +0000985
986 NULL,
987};
988
989void board_init_f_r(void)
990{
991 if (initcall_run_list(init_sequence_f_r))
992 hang();
993
994 /*
Simon Glasse4d6ab02016-03-11 22:06:51 -0700995 * The pre-relocation drivers may be using memory that has now gone
996 * away. Mark serial as unavailable - this will fall back to the debug
997 * UART if available.
Simon Glassaf1bc0c2017-12-04 13:48:28 -0700998 *
999 * Do the same with log drivers since the memory may not be available.
Simon Glasse4d6ab02016-03-11 22:06:51 -07001000 */
Simon Glassaf1bc0c2017-12-04 13:48:28 -07001001 gd->flags &= ~(GD_FLG_SERIAL_READY | GD_FLG_LOG_READY);
Simon Glass5ee94b42017-09-05 19:49:45 -06001002#ifdef CONFIG_TIMER
1003 gd->timer = NULL;
1004#endif
Simon Glasse4d6ab02016-03-11 22:06:51 -07001005
1006 /*
Simon Glass48a33802013-03-05 14:39:52 +00001007 * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
1008 * Transfer execution from Flash to RAM by calculating the address
1009 * of the in-RAM copy of board_init_r() and calling it
1010 */
Alexey Brodkin7bf9f202015-02-25 17:59:02 +03001011 (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr);
Simon Glass48a33802013-03-05 14:39:52 +00001012
1013 /* NOTREACHED - board_init_r() does not return */
1014 hang();
1015}
Alexey Brodkin5bcd19a2015-03-24 11:12:47 +03001016#endif /* CONFIG_X86 */