blob: 78cb072abf7a0ca2d88a9f72b3eedcb0ca1e5509 [file] [log] [blame]
Stefan Roeseae9996c2015-11-18 11:06:09 +01001CONFIG_ARM=y
2CONFIG_ARCH_SOCFPGA=y
Tom Rinia09fea12019-11-18 20:02:10 -05003CONFIG_ENV_SIZE=0x4000
4CONFIG_ENV_OFFSET=0xE0000
Stefan Roeseae9996c2015-11-18 11:06:09 +01005CONFIG_TARGET_SOCFPGA_SR1500=y
Tom Rini344a0e42019-05-26 14:45:25 -04006CONFIG_SYS_BOOTCOUNT_ADDR=0xfffffff8
Tom Rinia09fea12019-11-18 20:02:10 -05007CONFIG_ENV_SECT_SIZE=0x10000
Tom Rini665c35a2019-09-23 11:47:37 -04008CONFIG_SPL_TEXT_BASE=0xFFFF0000
Tom Rinifa2c1462018-02-10 16:54:38 -05009CONFIG_DISTRO_DEFAULTS=y
Simon Glassc2ae7d82016-09-12 23:18:22 -060010CONFIG_FIT=y
Tom Rinifa2c1462018-02-10 16:54:38 -050011# CONFIG_USE_BOOTCOMMAND is not set
Simon Glassef26d602016-10-17 20:12:37 -060012CONFIG_SYS_CONSOLE_IS_IN_ENV=y
Simon Glass84f2a5d2016-10-17 20:12:59 -060013CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
Simon Glass3505bc52016-10-17 20:12:58 -060014CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y
Simon Glassf3f3eff2016-10-17 20:13:00 -060015CONFIG_SYS_CONSOLE_INFO_QUIET=y
Tom Rini2681e782017-05-01 11:41:11 -040016CONFIG_DEFAULT_FDT_FILE="socfpga_cyclone5_sr1500.dtb"
Simon Glassc2ae7d82016-09-12 23:18:22 -060017CONFIG_VERSION_VARIABLE=y
Lokesh Vutla84351792016-10-11 21:33:46 -040018# CONFIG_DISPLAY_BOARDINFO is not set
Mario Six78eba692018-03-28 14:38:17 +020019CONFIG_DISPLAY_BOARDINFO_LATE=y
Simon Glassa5d67542017-01-23 13:31:20 -070020CONFIG_BOARD_EARLY_INIT_F=y
Marek Vasut55500432018-04-07 16:05:27 +020021CONFIG_SPL_SPI_LOAD=y
Hannes Schmelzer1ee774d2019-08-22 15:41:46 +020022CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
Tom Rini89cb2b52016-04-24 17:29:26 -040023CONFIG_CMD_ASKENV=y
24CONFIG_CMD_GREPENV=y
Tom Rini78d1e1d2016-04-22 16:41:25 -040025CONFIG_CMD_MEMTEST=y
Stefan Roeseae9996c2015-11-18 11:06:09 +010026# CONFIG_CMD_FLASH is not set
Tom Rini88663122017-08-14 19:58:53 -040027CONFIG_CMD_GPIO=y
28CONFIG_CMD_I2C=y
Tom Rini89cb2b52016-04-24 17:29:26 -040029CONFIG_CMD_MMC=y
Tom Rini78d1e1d2016-04-22 16:41:25 -040030CONFIG_CMD_SPI=y
Tom Rini89cb2b52016-04-24 17:29:26 -040031CONFIG_CMD_CACHE=y
Tom Rini78d1e1d2016-04-22 16:41:25 -040032CONFIG_CMD_TIME=y
Tom Rini89cb2b52016-04-24 17:29:26 -040033CONFIG_CMD_EXT4_WRITE=y
Tom Rini43ede0b2017-10-22 17:55:07 -040034CONFIG_MTDIDS_DEFAULT="nor0=ff705000.spi.0"
35CONFIG_MTDPARTS_DEFAULT="mtdparts=ff705000.spi.0:1m(u-boot),256k(env1),256k(env2),14848k(boot),16m(rootfs),-@1536k(UBI)0"
Heiko Schocher8f2fe0c2016-09-21 07:58:19 +020036CONFIG_CMD_UBI=y
Tom Rini37dc72f2018-04-28 10:45:55 -040037# CONFIG_ISO_PARTITION is not set
38# CONFIG_EFI_PARTITION is not set
Tom Rini8c5cad02018-09-03 15:26:12 -040039CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_sr1500"
Tom Rini5dc4dfd2017-08-28 07:16:32 -040040CONFIG_ENV_IS_IN_SPI_FLASH=y
Tom Rinicb6617a2019-11-10 11:28:03 -050041CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
Tom Rinia09fea12019-11-18 20:02:10 -050042CONFIG_ENV_OFFSET_REDUND=0xF0000
Tom Rini8d8ee472019-11-12 22:46:36 -050043CONFIG_SYS_RELOC_GD_ENV_ADDR=y
Simon Glass4edb9452016-02-22 22:55:40 -070044CONFIG_SPL_DM_SEQ_ALIAS=y
Lukasz Majewskid1ec9462018-02-09 23:50:57 +010045CONFIG_BOOTCOUNT_LIMIT=y
Tom Riniaca5cd22016-09-08 16:11:59 -040046CONFIG_DM_GPIO=y
Stefan Roeseae9996c2015-11-18 11:06:09 +010047CONFIG_DWAPB_GPIO=y
Dinh Nguyen28789422018-04-04 17:18:21 -050048CONFIG_DM_I2C=y
Stefan Roese4d5e9b32016-04-28 09:47:18 +020049CONFIG_SYS_I2C_DW=y
Simon Glass4edb9452016-02-22 22:55:40 -070050CONFIG_DM_MMC=y
Masahiro Yamada55ed3b42017-01-10 13:32:04 +090051CONFIG_MMC_DW=y
Adam Ford9c5b0092018-07-07 22:18:22 -050052CONFIG_MTD_DEVICE=y
Patrick Delaunay14453fb2019-02-27 15:20:36 +010053CONFIG_SF_DEFAULT_SPEED=100000000
Stefan Roese93d9fc22016-03-03 16:57:39 +010054CONFIG_SPI_FLASH_STMICRO=y
Simon Glass4edb9452016-02-22 22:55:40 -070055# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
Frieder Schrempf832ce202019-10-23 07:41:20 +000056CONFIG_SPI_FLASH_MTD=y
Mario Sixa8ca5c82018-04-27 14:52:21 +020057CONFIG_PHY_MARVELL=y
Stefan Roeseae9996c2015-11-18 11:06:09 +010058CONFIG_DM_ETH=y
Tom Rini19893742017-08-07 22:00:34 -040059CONFIG_PHY_GIGE=y
Stefan Roeseae9996c2015-11-18 11:06:09 +010060CONFIG_ETH_DESIGNWARE=y
Adam Fordd7869b212018-07-20 23:03:57 -050061CONFIG_MII=y
Dinh Nguyena8c2dcf2018-04-04 17:18:25 -050062CONFIG_DM_RESET=y
Adam Fordf1b1f772018-04-15 13:51:26 -040063CONFIG_SPI=y
Stefan Roese93d9fc22016-03-03 16:57:39 +010064CONFIG_CADENCE_QSPI=y
Simon Goldschmidte2636072019-10-05 22:10:11 +020065# CONFIG_SPL_WDT is not set