| Stefan Roese | ae9996c | 2015-11-18 11:06:09 +0100 | [diff] [blame] | 1 | CONFIG_ARM=y |
| 2 | CONFIG_ARCH_SOCFPGA=y | ||||
| Stefan Roese | ae9996c | 2015-11-18 11:06:09 +0100 | [diff] [blame] | 3 | CONFIG_TARGET_SOCFPGA_SR1500=y |
| Tom Rini | 344a0e4 | 2019-05-26 14:45:25 -0400 | [diff] [blame] | 4 | CONFIG_SYS_BOOTCOUNT_ADDR=0xfffffff8 |
| Tom Rini | 665c35a | 2019-09-23 11:47:37 -0400 | [diff] [blame] | 5 | CONFIG_SPL_TEXT_BASE=0xFFFF0000 |
| Tom Rini | fa2c146 | 2018-02-10 16:54:38 -0500 | [diff] [blame] | 6 | CONFIG_DISTRO_DEFAULTS=y |
| Simon Glass | c2ae7d8 | 2016-09-12 23:18:22 -0600 | [diff] [blame] | 7 | CONFIG_FIT=y |
| Tom Rini | fa2c146 | 2018-02-10 16:54:38 -0500 | [diff] [blame] | 8 | # CONFIG_USE_BOOTCOMMAND is not set |
| Simon Glass | ef26d60 | 2016-10-17 20:12:37 -0600 | [diff] [blame] | 9 | CONFIG_SYS_CONSOLE_IS_IN_ENV=y |
| Simon Glass | 84f2a5d | 2016-10-17 20:12:59 -0600 | [diff] [blame] | 10 | CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y |
| Simon Glass | 3505bc5 | 2016-10-17 20:12:58 -0600 | [diff] [blame] | 11 | CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y |
| Simon Glass | f3f3eff | 2016-10-17 20:13:00 -0600 | [diff] [blame] | 12 | CONFIG_SYS_CONSOLE_INFO_QUIET=y |
| Tom Rini | 2681e78 | 2017-05-01 11:41:11 -0400 | [diff] [blame] | 13 | CONFIG_DEFAULT_FDT_FILE="socfpga_cyclone5_sr1500.dtb" |
| Simon Glass | c2ae7d8 | 2016-09-12 23:18:22 -0600 | [diff] [blame] | 14 | CONFIG_VERSION_VARIABLE=y |
| Lokesh Vutla | 8435179 | 2016-10-11 21:33:46 -0400 | [diff] [blame] | 15 | # CONFIG_DISPLAY_BOARDINFO is not set |
| Mario Six | 78eba69 | 2018-03-28 14:38:17 +0200 | [diff] [blame] | 16 | CONFIG_DISPLAY_BOARDINFO_LATE=y |
| Simon Glass | a5d6754 | 2017-01-23 13:31:20 -0700 | [diff] [blame] | 17 | CONFIG_BOARD_EARLY_INIT_F=y |
| Marek Vasut | 5550043 | 2018-04-07 16:05:27 +0200 | [diff] [blame] | 18 | CONFIG_SPL_SPI_LOAD=y |
| Hannes Schmelzer | 1ee774d | 2019-08-22 15:41:46 +0200 | [diff] [blame] | 19 | CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 |
| Tom Rini | 89cb2b5 | 2016-04-24 17:29:26 -0400 | [diff] [blame] | 20 | CONFIG_CMD_ASKENV=y |
| 21 | CONFIG_CMD_GREPENV=y | ||||
| Tom Rini | 78d1e1d | 2016-04-22 16:41:25 -0400 | [diff] [blame] | 22 | CONFIG_CMD_MEMTEST=y |
| Stefan Roese | ae9996c | 2015-11-18 11:06:09 +0100 | [diff] [blame] | 23 | # CONFIG_CMD_FLASH is not set |
| Tom Rini | 8866312 | 2017-08-14 19:58:53 -0400 | [diff] [blame] | 24 | CONFIG_CMD_GPIO=y |
| 25 | CONFIG_CMD_I2C=y | ||||
| Tom Rini | 89cb2b5 | 2016-04-24 17:29:26 -0400 | [diff] [blame] | 26 | CONFIG_CMD_MMC=y |
| Tom Rini | 78d1e1d | 2016-04-22 16:41:25 -0400 | [diff] [blame] | 27 | CONFIG_CMD_SF=y |
| 28 | CONFIG_CMD_SPI=y | ||||
| Tom Rini | 89cb2b5 | 2016-04-24 17:29:26 -0400 | [diff] [blame] | 29 | CONFIG_CMD_CACHE=y |
| Tom Rini | 78d1e1d | 2016-04-22 16:41:25 -0400 | [diff] [blame] | 30 | CONFIG_CMD_TIME=y |
| Tom Rini | 89cb2b5 | 2016-04-24 17:29:26 -0400 | [diff] [blame] | 31 | CONFIG_CMD_EXT4_WRITE=y |
| Tom Rini | 43ede0b | 2017-10-22 17:55:07 -0400 | [diff] [blame] | 32 | CONFIG_MTDIDS_DEFAULT="nor0=ff705000.spi.0" |
| 33 | CONFIG_MTDPARTS_DEFAULT="mtdparts=ff705000.spi.0:1m(u-boot),256k(env1),256k(env2),14848k(boot),16m(rootfs),-@1536k(UBI)0" | ||||
| Heiko Schocher | 8f2fe0c | 2016-09-21 07:58:19 +0200 | [diff] [blame] | 34 | CONFIG_CMD_UBI=y |
| Tom Rini | 37dc72f | 2018-04-28 10:45:55 -0400 | [diff] [blame] | 35 | # CONFIG_ISO_PARTITION is not set |
| 36 | # CONFIG_EFI_PARTITION is not set | ||||
| Tom Rini | 8c5cad0 | 2018-09-03 15:26:12 -0400 | [diff] [blame] | 37 | CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_sr1500" |
| Tom Rini | 5dc4dfd | 2017-08-28 07:16:32 -0400 | [diff] [blame] | 38 | CONFIG_ENV_IS_IN_SPI_FLASH=y |
| Simon Glass | 4edb945 | 2016-02-22 22:55:40 -0700 | [diff] [blame] | 39 | CONFIG_SPL_DM_SEQ_ALIAS=y |
| Lukasz Majewski | d1ec946 | 2018-02-09 23:50:57 +0100 | [diff] [blame] | 40 | CONFIG_BOOTCOUNT_LIMIT=y |
| Tom Rini | aca5cd2 | 2016-09-08 16:11:59 -0400 | [diff] [blame] | 41 | CONFIG_DM_GPIO=y |
| Stefan Roese | ae9996c | 2015-11-18 11:06:09 +0100 | [diff] [blame] | 42 | CONFIG_DWAPB_GPIO=y |
| Dinh Nguyen | 2878942 | 2018-04-04 17:18:21 -0500 | [diff] [blame] | 43 | CONFIG_DM_I2C=y |
| Stefan Roese | 4d5e9b3 | 2016-04-28 09:47:18 +0200 | [diff] [blame] | 44 | CONFIG_SYS_I2C_DW=y |
| Simon Glass | 4edb945 | 2016-02-22 22:55:40 -0700 | [diff] [blame] | 45 | CONFIG_DM_MMC=y |
| Masahiro Yamada | 55ed3b4 | 2017-01-10 13:32:04 +0900 | [diff] [blame] | 46 | CONFIG_MMC_DW=y |
| Adam Ford | 9c5b009 | 2018-07-07 22:18:22 -0500 | [diff] [blame] | 47 | CONFIG_MTD_DEVICE=y |
| Stefan Roese | ae9996c | 2015-11-18 11:06:09 +0100 | [diff] [blame] | 48 | CONFIG_SPI_FLASH=y |
| Patrick Delaunay | 14453fb | 2019-02-27 15:20:36 +0100 | [diff] [blame] | 49 | CONFIG_SF_DEFAULT_SPEED=100000000 |
| Stefan Roese | 93d9fc2 | 2016-03-03 16:57:39 +0100 | [diff] [blame] | 50 | CONFIG_SPI_FLASH_STMICRO=y |
| Simon Glass | 4edb945 | 2016-02-22 22:55:40 -0700 | [diff] [blame] | 51 | # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set |
| Frieder Schrempf | 832ce20 | 2019-10-23 07:41:20 +0000 | [diff] [blame^] | 52 | CONFIG_SPI_FLASH_MTD=y |
| Mario Six | a8ca5c8 | 2018-04-27 14:52:21 +0200 | [diff] [blame] | 53 | CONFIG_PHY_MARVELL=y |
| Stefan Roese | ae9996c | 2015-11-18 11:06:09 +0100 | [diff] [blame] | 54 | CONFIG_DM_ETH=y |
| Tom Rini | 1989374 | 2017-08-07 22:00:34 -0400 | [diff] [blame] | 55 | CONFIG_PHY_GIGE=y |
| Stefan Roese | ae9996c | 2015-11-18 11:06:09 +0100 | [diff] [blame] | 56 | CONFIG_ETH_DESIGNWARE=y |
| Adam Ford | d7869b21 | 2018-07-20 23:03:57 -0500 | [diff] [blame] | 57 | CONFIG_MII=y |
| Dinh Nguyen | a8c2dcf | 2018-04-04 17:18:25 -0500 | [diff] [blame] | 58 | CONFIG_DM_RESET=y |
| Adam Ford | f1b1f77 | 2018-04-15 13:51:26 -0400 | [diff] [blame] | 59 | CONFIG_SPI=y |
| Stefan Roese | 93d9fc2 | 2016-03-03 16:57:39 +0100 | [diff] [blame] | 60 | CONFIG_CADENCE_QSPI=y |
| Simon Goldschmidt | e263607 | 2019-10-05 22:10:11 +0200 | [diff] [blame] | 61 | # CONFIG_SPL_WDT is not set |