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wdenkfe8c2802002-11-03 00:38:21 +00001/*
2 * ML2.h: ML2 specific config options
3 *
4 * Copyright 2002 Mind NV
5 *
6 * http://www.mind.be/
7 *
8 * Author : Peter De Schrijver (p2@mind.be)
9 *
10 * Derived from : other configuration header files in this tree
11 *
12 * This software may be used and distributed according to the terms of
13 * the GNU General Public License (GPL) version 2, incorporated herein by
14 * reference. Drivers based on or derived from this code fall under the GPL
15 * and must retain the authorship, copyright and this license notice. This
16 * file is not a complete program and may only be used when the entire
17 * program is licensed under the GPL.
18 *
19 */
20
21#ifndef __CONFIG_H
22#define __CONFIG_H
23
24/*
25 * High Level Configuration Options
26 * (easy to change)
27 */
28
29#define CONFIG_405 1 /* This is a PPC405 CPU */
30#define CONFIG_4xx 1 /* ...member of PPC4xx family */
31#define CONFIG_ML2 1 /* ...on a ML2 board */
32
Wolfgang Denk2ae18242010-10-06 09:05:45 +020033#define CONFIG_SYS_TEXT_BASE 0x18000000
Wolfgang Denk2ced53e2010-11-28 21:18:58 +010034#define CONFIG_SYS_LDSCRIPT "board/ml2/u-boot.lds"
wdenkfe8c2802002-11-03 00:38:21 +000035
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +020036#define CONFIG_ENV_IS_IN_FLASH 1
wdenkfe8c2802002-11-03 00:38:21 +000037
Jean-Christophe PLAGNIOL-VILLARD9314cee2008-09-10 22:47:59 +020038#ifdef CONFIG_ENV_IS_IN_NVRAM
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +020039#undef CONFIG_ENV_IS_IN_FLASH
wdenkfe8c2802002-11-03 00:38:21 +000040#else
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +020041#ifdef CONFIG_ENV_IS_IN_FLASH
Jean-Christophe PLAGNIOL-VILLARD9314cee2008-09-10 22:47:59 +020042#undef CONFIG_ENV_IS_IN_NVRAM
wdenkfe8c2802002-11-03 00:38:21 +000043#endif
44#endif
45
46#define CONFIG_BAUDRATE 9600
47#define CONFIG_BOOTDELAY 3 /* autoboot after 3 seconds */
48
49#if 1
50#define CONFIG_BOOTCOMMAND "bootm" /* autoboot command */
51#else
52#define CONFIG_BOOTCOMMAND "bootp" /* autoboot command */
53#endif
54
55#define CONFIG_PREBOOT "fsload 0x00100000 /boot/image"
56
wdenkfe8c2802002-11-03 00:38:21 +000057#if 0
58#define CONFIG_BOOTARGS "root=/dev/nfs " \
59 "ip=192.168.2.176:192.168.2.190:192.168.2.79:255.255.255.0 " \
60 "nfsroot=192.168.2.190:/home/stefan/cpci405/target_ftest4"
61#else
62#define CONFIG_BOOTARGS "root=/dev/mtdblock2 " \
63 "console=ttyS0 console=tty"
64
65#endif
66
67#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020068#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
wdenkfe8c2802002-11-03 00:38:21 +000069
70
Jon Loeliger8353e132007-07-08 14:14:17 -050071/*
Jon Loeliger659e2f62007-07-10 09:10:49 -050072 * BOOTP options
73 */
74#define CONFIG_BOOTP_BOOTFILESIZE
75#define CONFIG_BOOTP_BOOTPATH
76#define CONFIG_BOOTP_GATEWAY
77#define CONFIG_BOOTP_HOSTNAME
78
79
80/*
Jon Loeliger8353e132007-07-08 14:14:17 -050081 * Command line configuration.
82 */
83#include <config_cmd_default.h>
wdenkfe8c2802002-11-03 00:38:21 +000084
Jon Loeliger8353e132007-07-08 14:14:17 -050085#define CONFIG_CMD_IRQ
86#define CONFIG_CMD_KGDB
87#define CONFIG_CMD_BEDBUG
88#define CONFIG_CMD_ELF
89#define CONFIG_CMD_JFFS2
90
91#undef CONFIG_CMD_NET
Wolfgang Denkee8028b2010-11-21 20:55:42 +010092#undef CONFIG_CMD_NFS
Jon Loeliger8353e132007-07-08 14:14:17 -050093#undef CONFIG_CMD_RTC
94#undef CONFIG_CMD_PCI
95#undef CONFIG_CMD_I2C
96
wdenkfe8c2802002-11-03 00:38:21 +000097
98#undef CONFIG_WATCHDOG /* watchdog disabled */
99
100#define CONFIG_SYS_CLK_FREQ 50000000
101
102#define CONFIG_SPD_EEPROM 1 /* use SPD EEPROM for setup */
103
104/*
Wolfgang Denkee8028b2010-11-21 20:55:42 +0100105 * I2C
106 */
107#define CONFIG_HARD_I2C /* I2C with hardware support */
108#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
109#define CONFIG_SYS_I2C_SLAVE 0x7F
110#define CONFIG_SYS_I2C_SPEED 400000
111
112/*
wdenkfe8c2802002-11-03 00:38:21 +0000113 * Miscellaneous configurable options
114 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200115#define CONFIG_SYS_LONGHELP /* undef to save memory */
116#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
Jon Loeliger8353e132007-07-08 14:14:17 -0500117#if defined(CONFIG_CMD_KGDB)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200118#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
wdenkfe8c2802002-11-03 00:38:21 +0000119#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200120#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
wdenkfe8c2802002-11-03 00:38:21 +0000121#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200122#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
123#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
124#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
wdenkfe8c2802002-11-03 00:38:21 +0000125
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200126#define CONFIG_SYS_MEMTEST_START 0x0400000 /* memtest works on */
127#define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
wdenkfe8c2802002-11-03 00:38:21 +0000128
129/*
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200130 * If CONFIG_SYS_EXT_SERIAL_CLOCK, then the UART divisor is 1.
131 * If CONFIG_SYS_405_UART_ERRATA_59, then UART divisor is 31.
132 * Otherwise, UART divisor is determined by CPU Clock and CONFIG_SYS_BASE_BAUD value.
wdenkfe8c2802002-11-03 00:38:21 +0000133 * The Linux BASE_BAUD define should match this configuration.
134 * baseBaud = cpuClock/(uartDivisor*16)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200135 * If CONFIG_SYS_405_UART_ERRATA_59 and 200MHz CPU clock,
wdenkfe8c2802002-11-03 00:38:21 +0000136 * set Linux BASE_BAUD to 403200.
137 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200138#undef CONFIG_SYS_EXT_SERIAL_CLOCK /* external serial clock */
139#undef CONFIG_SYS_405_UART_ERRATA_59 /* 405GP/CR Rev. D silicon */
wdenkfe8c2802002-11-03 00:38:21 +0000140
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200141#define CONFIG_SYS_BASE_BAUD (3125000*16)
142#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_BASE_BAUD
143#define CONFIG_SYS_DUART_CHAN 0
144#define CONFIG_SYS_NS16550_COM1 0xa0001003
145#define CONFIG_SYS_NS16550_COM2 0xa0011003
146#define CONFIG_SYS_NS16550_REG_SIZE -4
147#define CONFIG_SYS_NS16550 1
148#define CONFIG_SYS_INIT_CHAN1 1
149#define CONFIG_SYS_INIT_CHAN2 1
wdenkfe8c2802002-11-03 00:38:21 +0000150
151/* The following table includes the supported baudrates */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200152#define CONFIG_SYS_BAUDRATE_TABLE \
wdenkfe8c2802002-11-03 00:38:21 +0000153 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
154
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200155#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
156#define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */
wdenkfe8c2802002-11-03 00:38:21 +0000157
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200158#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
wdenkfe8c2802002-11-03 00:38:21 +0000159
160
wdenkfe8c2802002-11-03 00:38:21 +0000161/*-----------------------------------------------------------------------
162 * Start addresses for the final memory configuration
163 * (Set up by the startup code)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200164 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
wdenkfe8c2802002-11-03 00:38:21 +0000165 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200166#define CONFIG_SYS_SDRAM_BASE 0x00000000
167#define CONFIG_SYS_FLASH_BASE 0x18000000
168#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
169#define CONFIG_SYS_MONITOR_LEN (192 * 1024) /* Reserve 196 kB for Monitor */
170#define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Reserve 128 kB for malloc() */
wdenkfe8c2802002-11-03 00:38:21 +0000171
172/*
173 * For booting Linux, the board info and command line data
174 * have to be in the first 8 MB of memory, since this is
175 * the maximum mapped by the Linux kernel during initialization.
176 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200177#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
wdenkfe8c2802002-11-03 00:38:21 +0000178/*-----------------------------------------------------------------------
179 * FLASH organization
180 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200181#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
182#define CONFIG_SYS_MAX_FLASH_SECT 256 /* max number of sectors on one chip */
wdenkfe8c2802002-11-03 00:38:21 +0000183
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200184#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
185#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
wdenkfe8c2802002-11-03 00:38:21 +0000186
187/* BEG ENVIRONNEMENT FLASH */
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +0200188#ifdef CONFIG_ENV_IS_IN_FLASH
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200189#define CONFIG_ENV_OFFSET 0x00050000 /* Offset of Environment Sector */
190#define CONFIG_ENV_SIZE 0x10000 /* Total Size of Environment Sector */
191#define CONFIG_ENV_SECT_SIZE 0x10000 /* see README - env sector total size */
wdenkfe8c2802002-11-03 00:38:21 +0000192#endif
193/* END ENVIRONNEMENT FLASH */
194/*-----------------------------------------------------------------------
195 * NVRAM organization
196 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200197#define CONFIG_SYS_NVRAM_BASE_ADDR 0xf0000000 /* NVRAM base address */
198#define CONFIG_SYS_NVRAM_SIZE 0x1ff8 /* NVRAM size */
wdenkfe8c2802002-11-03 00:38:21 +0000199
Jean-Christophe PLAGNIOL-VILLARD9314cee2008-09-10 22:47:59 +0200200#ifdef CONFIG_ENV_IS_IN_NVRAM
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200201#define CONFIG_ENV_SIZE 0x1000 /* Size of Environment vars */
202#define CONFIG_ENV_ADDR \
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200203 (CONFIG_SYS_NVRAM_BASE_ADDR+CONFIG_SYS_NVRAM_SIZE-CONFIG_ENV_SIZE) /* Env */
wdenkfe8c2802002-11-03 00:38:21 +0000204#endif
wdenkfe8c2802002-11-03 00:38:21 +0000205
206/*
207 * Init Memory Controller:
208 *
209 * BR0/1 and OR0/1 (FLASH)
210 */
211
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200212#define FLASH_BASE0_PRELIM CONFIG_SYS_FLASH_BASE /* FLASH bank #0 */
wdenkfe8c2802002-11-03 00:38:21 +0000213#define FLASH_BASE1_PRELIM 0 /* FLASH bank #1 */
214
215
216/* Configuration Port location */
217#define CONFIG_PORT_ADDR 0xF0000500
218
219/*-----------------------------------------------------------------------
220 * Definitions for initial stack pointer and data area (in DPRAM)
221 */
222
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200223#define CONFIG_SYS_INIT_RAM_ADDR 0x800000 /* inside of SDRAM */
Wolfgang Denk553f0982010-10-26 13:32:32 +0200224#define CONFIG_SYS_INIT_RAM_SIZE 0x2000 /* Size of used area in RAM */
Wolfgang Denk25ddd1f2010-10-26 14:34:52 +0200225#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200226#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
wdenkfe8c2802002-11-03 00:38:21 +0000227
228/*-----------------------------------------------------------------------
229 * Definitions for Serial Presence Detect EEPROM address
230 * (to get SDRAM settings)
231 */
232#define SPD_EEPROM_ADDRESS 0x50
233
Jon Loeliger8353e132007-07-08 14:14:17 -0500234#if defined(CONFIG_CMD_KGDB)
wdenkfe8c2802002-11-03 00:38:21 +0000235#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
236#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
237#endif
238
Wolfgang Denk700a0c62005-08-08 01:03:24 +0200239/*
240 * JFFS2 partitions
241 *
242 */
243/* No command line, one static partition, whole device */
Stefan Roese68d7d652009-03-19 13:30:36 +0100244#undef CONFIG_CMD_MTDPARTS
Wolfgang Denk700a0c62005-08-08 01:03:24 +0200245#define CONFIG_JFFS2_DEV "nor0"
246#define CONFIG_JFFS2_PART_SIZE 0xFFFFFFFF
247#define CONFIG_JFFS2_PART_OFFSET 0x00080000
wdenkfe8c2802002-11-03 00:38:21 +0000248
Wolfgang Denk700a0c62005-08-08 01:03:24 +0200249/* mtdparts command line support */
250/* Note: fake mtd_id used, no linux mtd map file */
251/*
Stefan Roese68d7d652009-03-19 13:30:36 +0100252#define CONFIG_CMD_MTDPARTS
Wolfgang Denk700a0c62005-08-08 01:03:24 +0200253#define MTDIDS_DEFAULT "nor0=ml2-0"
254#define MTDPARTS_DEFAULT "mtdparts=ml2-0:-@512k(jffs2)"
255*/
256
wdenkfe8c2802002-11-03 00:38:21 +0000257#endif /* __CONFIG_H */