blob: 8d6bb37f5c483c9522afb19e76ebe30444d61adf [file] [log] [blame]
Simon Glass457df232019-12-06 21:41:40 -07001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * (C) Copyright 2009
4 * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com.
5 * Copyright 2019 Google Inc
6 */
7
8#include <common.h>
9#include <dm.h>
10#include "designware_i2c.h"
11
12/* BayTrail HCNT/LCNT/SDA hold time */
13static struct dw_scl_sda_cfg byt_config = {
14 .ss_hcnt = 0x200,
15 .fs_hcnt = 0x55,
16 .ss_lcnt = 0x200,
17 .fs_lcnt = 0x99,
18 .sda_hold = 0x6,
19};
20
21static int designware_i2c_pci_probe(struct udevice *dev)
22{
23 struct dw_i2c *priv = dev_get_priv(dev);
24
25 /* Save base address from PCI BAR */
26 priv->regs = (struct i2c_regs *)
27 dm_pci_map_bar(dev, PCI_BASE_ADDRESS_0, PCI_REGION_MEM);
28 if (IS_ENABLED(CONFIG_INTEL_BAYTRAIL))
29 /* Use BayTrail specific timing values */
30 priv->scl_sda_cfg = &byt_config;
31
32 return designware_i2c_probe(dev);
33}
34
35static int designware_i2c_pci_bind(struct udevice *dev)
36{
Simon Glass457df232019-12-06 21:41:40 -070037 char name[20];
38
39 /*
40 * Create a unique device name for PCI type devices
41 * ToDo:
42 * Setting req_seq in the driver is probably not recommended.
43 * But without a DT alias the number is not configured. And
44 * using this driver is impossible for PCIe I2C devices.
45 * This can be removed, once a better (correct) way for this
46 * is found and implemented.
Simon Glass8d72d5b2019-12-06 21:41:41 -070047 *
48 * TODO(sjg@chromium.org): Perhaps if uclasses had platdata this would
49 * be possible. We cannot use static data in drivers since they may be
50 * used in SPL or before relocation.
Simon Glass457df232019-12-06 21:41:40 -070051 */
Simon Glass8d72d5b2019-12-06 21:41:41 -070052 dev->req_seq = gd->arch.dw_i2c_num_cards++;
53 sprintf(name, "i2c_designware#%u", dev->req_seq);
Simon Glass457df232019-12-06 21:41:40 -070054 device_set_name(dev, name);
55
56 return 0;
57}
58
59U_BOOT_DRIVER(i2c_designware_pci) = {
60 .name = "i2c_designware_pci",
61 .id = UCLASS_I2C,
62 .bind = designware_i2c_pci_bind,
63 .probe = designware_i2c_pci_probe,
64 .priv_auto_alloc_size = sizeof(struct dw_i2c),
65 .remove = designware_i2c_remove,
66 .flags = DM_FLAG_OS_PREPARE,
67 .ops = &designware_i2c_ops,
68};
69
70static struct pci_device_id designware_pci_supported[] = {
71 /* Intel BayTrail has 7 I2C controller located on the PCI bus */
72 { PCI_VDEVICE(INTEL, 0x0f41) },
73 { PCI_VDEVICE(INTEL, 0x0f42) },
74 { PCI_VDEVICE(INTEL, 0x0f43) },
75 { PCI_VDEVICE(INTEL, 0x0f44) },
76 { PCI_VDEVICE(INTEL, 0x0f45) },
77 { PCI_VDEVICE(INTEL, 0x0f46) },
78 { PCI_VDEVICE(INTEL, 0x0f47) },
79 {},
80};
81
82U_BOOT_PCI_DEVICE(i2c_designware_pci, designware_pci_supported);