blob: e8fc6f2a907c6586d33d83e6ba92571c76749bbf [file] [log] [blame]
Simon Glass457df232019-12-06 21:41:40 -07001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * (C) Copyright 2009
4 * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com.
5 * Copyright 2019 Google Inc
6 */
7
8#include <common.h>
9#include <dm.h>
10#include "designware_i2c.h"
11
12/* BayTrail HCNT/LCNT/SDA hold time */
13static struct dw_scl_sda_cfg byt_config = {
14 .ss_hcnt = 0x200,
15 .fs_hcnt = 0x55,
16 .ss_lcnt = 0x200,
17 .fs_lcnt = 0x99,
18 .sda_hold = 0x6,
19};
20
21static int designware_i2c_pci_probe(struct udevice *dev)
22{
23 struct dw_i2c *priv = dev_get_priv(dev);
24
25 /* Save base address from PCI BAR */
26 priv->regs = (struct i2c_regs *)
27 dm_pci_map_bar(dev, PCI_BASE_ADDRESS_0, PCI_REGION_MEM);
28 if (IS_ENABLED(CONFIG_INTEL_BAYTRAIL))
29 /* Use BayTrail specific timing values */
30 priv->scl_sda_cfg = &byt_config;
31
32 return designware_i2c_probe(dev);
33}
34
35static int designware_i2c_pci_bind(struct udevice *dev)
36{
37 static int num_cards;
38 char name[20];
39
40 /*
41 * Create a unique device name for PCI type devices
42 * ToDo:
43 * Setting req_seq in the driver is probably not recommended.
44 * But without a DT alias the number is not configured. And
45 * using this driver is impossible for PCIe I2C devices.
46 * This can be removed, once a better (correct) way for this
47 * is found and implemented.
48 */
49 dev->req_seq = num_cards;
50 sprintf(name, "i2c_designware#%u", num_cards++);
51 device_set_name(dev, name);
52
53 return 0;
54}
55
56U_BOOT_DRIVER(i2c_designware_pci) = {
57 .name = "i2c_designware_pci",
58 .id = UCLASS_I2C,
59 .bind = designware_i2c_pci_bind,
60 .probe = designware_i2c_pci_probe,
61 .priv_auto_alloc_size = sizeof(struct dw_i2c),
62 .remove = designware_i2c_remove,
63 .flags = DM_FLAG_OS_PREPARE,
64 .ops = &designware_i2c_ops,
65};
66
67static struct pci_device_id designware_pci_supported[] = {
68 /* Intel BayTrail has 7 I2C controller located on the PCI bus */
69 { PCI_VDEVICE(INTEL, 0x0f41) },
70 { PCI_VDEVICE(INTEL, 0x0f42) },
71 { PCI_VDEVICE(INTEL, 0x0f43) },
72 { PCI_VDEVICE(INTEL, 0x0f44) },
73 { PCI_VDEVICE(INTEL, 0x0f45) },
74 { PCI_VDEVICE(INTEL, 0x0f46) },
75 { PCI_VDEVICE(INTEL, 0x0f47) },
76 {},
77};
78
79U_BOOT_PCI_DEVICE(i2c_designware_pci, designware_pci_supported);