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Fabio Estevam860b32e2011-05-13 03:15:11 +00001/*
2 * Copyright (C) 2011 Freescale Semiconductor, Inc.
3 *
Fabio Estevamc4c596f2011-09-22 08:07:20 +00004 * Configuration settings for the MX53SMD Freescale board.
Fabio Estevam860b32e2011-05-13 03:15:11 +00005 *
Wolfgang Denk3765b3e2013-10-07 13:07:26 +02006 * SPDX-License-Identifier: GPL-2.0+
Fabio Estevam860b32e2011-05-13 03:15:11 +00007 */
8
9#ifndef __CONFIG_H
10#define __CONFIG_H
11
12#define CONFIG_MX53
13
Fabio Estevam860b32e2011-05-13 03:15:11 +000014#define CONFIG_DISPLAY_CPUINFO
15#define CONFIG_DISPLAY_BOARDINFO
16
Fabio Estevamc4c596f2011-09-22 08:07:20 +000017#define CONFIG_MACH_TYPE MACH_TYPE_MX53_SMD
18
Fabio Estevam860b32e2011-05-13 03:15:11 +000019#include <asm/arch/imx-regs.h>
20
21#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
Fabio Estevam860b32e2011-05-13 03:15:11 +000022#define CONFIG_SETUP_MEMORY_TAGS
23#define CONFIG_INITRD_TAG
Fabio Estevamfd622f22013-04-24 14:44:26 +000024#define CONFIG_REVISION_TAG
Fabio Estevam860b32e2011-05-13 03:15:11 +000025
Fabio Estevam5a416df2014-04-22 15:34:57 -030026#define CONFIG_SYS_GENERIC_BOARD
27
Fabio Estevam860b32e2011-05-13 03:15:11 +000028/* Size of malloc() pool */
29#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
30
31#define CONFIG_BOARD_EARLY_INIT_F
32#define CONFIG_MXC_GPIO
33
34#define CONFIG_MXC_UART
Stefano Babic40f6fff2011-11-22 15:22:39 +010035#define CONFIG_MXC_UART_BASE UART1_BASE
Fabio Estevam860b32e2011-05-13 03:15:11 +000036
37/* I2C Configs */
38#define CONFIG_CMD_I2C
tremb089d032013-09-21 18:13:36 +020039#define CONFIG_SYS_I2C
40#define CONFIG_SYS_I2C_MXC
Fabio Estevam860b32e2011-05-13 03:15:11 +000041
42/* MMC Configs */
43#define CONFIG_FSL_ESDHC
44#define CONFIG_SYS_FSL_ESDHC_ADDR 0
45#define CONFIG_SYS_FSL_ESDHC_NUM 1
46
47#define CONFIG_MMC
48#define CONFIG_CMD_MMC
49#define CONFIG_GENERIC_MMC
50#define CONFIG_CMD_FAT
51#define CONFIG_DOS_PARTITION
52
53/* Eth Configs */
54#define CONFIG_HAS_ETH1
Fabio Estevam860b32e2011-05-13 03:15:11 +000055#define CONFIG_MII
Fabio Estevam860b32e2011-05-13 03:15:11 +000056
57#define CONFIG_FEC_MXC
58#define IMX_FEC_BASE FEC_BASE_ADDR
59#define CONFIG_FEC_MXC_PHYADDR 0x1F
60
61#define CONFIG_CMD_PING
62#define CONFIG_CMD_DHCP
63#define CONFIG_CMD_MII
64#define CONFIG_CMD_NET
65
66/* allow to overwrite serial and ethaddr */
67#define CONFIG_ENV_OVERWRITE
68#define CONFIG_CONS_INDEX 1
69#define CONFIG_BAUDRATE 115200
Fabio Estevam860b32e2011-05-13 03:15:11 +000070
71/* Command definition */
72#include <config_cmd_default.h>
73
74#undef CONFIG_CMD_IMLS
75
76#define CONFIG_BOOTDELAY 3
77
Wolfgang Grandegger28b119e2011-10-17 08:21:56 +000078#define CONFIG_ETHPRIME "FEC0"
Fabio Estevam860b32e2011-05-13 03:15:11 +000079
80#define CONFIG_LOADADDR 0x70800000 /* loadaddr env var */
81#define CONFIG_SYS_TEXT_BASE 0x77800000
82
83#define CONFIG_EXTRA_ENV_SETTINGS \
84 "script=boot.scr\0" \
85 "uimage=uImage\0" \
86 "mmcdev=0\0" \
87 "mmcpart=2\0" \
88 "mmcroot=/dev/mmcblk0p3 rw\0" \
89 "mmcrootfstype=ext3 rootwait\0" \
90 "mmcargs=setenv bootargs console=ttymxc0,${baudrate} " \
91 "root=${mmcroot} " \
92 "rootfstype=${mmcrootfstype}\0" \
93 "loadbootscript=" \
94 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
95 "bootscript=echo Running bootscript from mmc ...; " \
96 "source\0" \
97 "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
98 "mmcboot=echo Booting from mmc ...; " \
99 "run mmcargs; " \
100 "bootm\0" \
101 "netargs=setenv bootargs console=ttymxc0,${baudrate} " \
102 "root=/dev/nfs " \
103 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
104 "netboot=echo Booting from net ...; " \
105 "run netargs; " \
106 "dhcp ${uimage}; bootm\0" \
107
108#define CONFIG_BOOTCOMMAND \
Andrew Bradford66968112012-10-01 05:06:52 +0000109 "mmc dev ${mmcdev}; if mmc rescan; then " \
Fabio Estevam860b32e2011-05-13 03:15:11 +0000110 "if run loadbootscript; then " \
111 "run bootscript; " \
112 "else " \
113 "if run loaduimage; then " \
114 "run mmcboot; " \
115 "else run netboot; " \
116 "fi; " \
117 "fi; " \
118 "else run netboot; fi"
119#define CONFIG_ARP_TIMEOUT 200UL
120
121/* Miscellaneous configurable options */
122#define CONFIG_SYS_LONGHELP /* undef to save memory */
123#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
Fabio Estevam860b32e2011-05-13 03:15:11 +0000124#define CONFIG_AUTO_COMPLETE
125#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
126
127/* Print Buffer Size */
128#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
129#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
130#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
131
132#define CONFIG_SYS_MEMTEST_START 0x70000000
Fabio Estevam869aed72012-02-09 14:25:10 +0000133#define CONFIG_SYS_MEMTEST_END 0x70010000
Fabio Estevam860b32e2011-05-13 03:15:11 +0000134
135#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
136
Fabio Estevam860b32e2011-05-13 03:15:11 +0000137#define CONFIG_CMDLINE_EDITING
138
Fabio Estevam860b32e2011-05-13 03:15:11 +0000139/* Physical Memory Map */
140#define CONFIG_NR_DRAM_BANKS 2
141#define PHYS_SDRAM_1 CSD0_BASE_ADDR
142#define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024)
143#define PHYS_SDRAM_2 CSD1_BASE_ADDR
144#define PHYS_SDRAM_2_SIZE (512 * 1024 * 1024)
145#define PHYS_SDRAM_SIZE (PHYS_SDRAM_1_SIZE + PHYS_SDRAM_2_SIZE)
146
147#define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
148#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
149#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
150
151#define CONFIG_SYS_INIT_SP_OFFSET \
152 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
153#define CONFIG_SYS_INIT_SP_ADDR \
154 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
155
156/* FLASH and environment organization */
157#define CONFIG_SYS_NO_FLASH
158
159#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
160#define CONFIG_ENV_SIZE (8 * 1024)
161#define CONFIG_ENV_IS_IN_MMC
162#define CONFIG_SYS_MMC_ENV_DEV 0
163
164#define CONFIG_OF_LIBFDT
Fabio Estevam860b32e2011-05-13 03:15:11 +0000165
166#endif /* __CONFIG_H */