| Dinh Nguyen | 7775440 | 2012-10-04 06:46:02 +0000 | [diff] [blame] | 1 | # |
| 2 | # (C) Copyright 2000-2003 |
| 3 | # Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
| 4 | # |
| 5 | # Copyright (C) 2012 Altera Corporation <www.altera.com> |
| 6 | # |
| Wolfgang Denk | 1a45966 | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 7 | # SPDX-License-Identifier: GPL-2.0+ |
| Dinh Nguyen | 7775440 | 2012-10-04 06:46:02 +0000 | [diff] [blame] | 8 | # |
| 9 | |
| Ley Foon Tan | 4ddd541 | 2017-04-26 02:44:35 +0800 | [diff] [blame] | 10 | obj-y += misc.o timer.o reset_manager.o clock_manager.o \ |
| Dinh Nguyen | e5ad7d9 | 2015-12-02 13:31:32 -0600 | [diff] [blame] | 11 | fpga_manager.o board.o |
| 12 | |
| Ley Foon Tan | 827e6a7 | 2017-04-26 02:44:38 +0800 | [diff] [blame^] | 13 | obj-$(CONFIG_TARGET_SOCFPGA_ARRIA10) += reset_manager_arria10.o |
| 14 | |
| Dinh Nguyen | bd48c06 | 2015-08-01 03:42:10 +0200 | [diff] [blame] | 15 | obj-$(CONFIG_SPL_BUILD) += spl.o freeze_controller.o |
| Marek Vasut | ca62d2e | 2015-08-02 21:12:09 +0200 | [diff] [blame] | 16 | |
| 17 | # QTS-generated config file wrappers |
| Ley Foon Tan | de77811 | 2017-04-26 02:44:33 +0800 | [diff] [blame] | 18 | obj-$(CONFIG_TARGET_SOCFPGA_GEN5) += scan_manager.o wrap_pll_config.o \ |
| Ley Foon Tan | 4ddd541 | 2017-04-26 02:44:35 +0800 | [diff] [blame] | 19 | clock_manager_gen5.o reset_manager_gen5.o \ |
| Ley Foon Tan | d1c559a | 2017-04-26 02:44:36 +0800 | [diff] [blame] | 20 | misc_gen5.o system_manager_gen5.o |
| Marek Vasut | ca62d2e | 2015-08-02 21:12:09 +0200 | [diff] [blame] | 21 | obj-$(CONFIG_SPL_BUILD) += wrap_iocsr_config.o wrap_pinmux_config.o \ |
| 22 | wrap_sdram_config.o |
| 23 | CFLAGS_wrap_iocsr_config.o += -I$(srctree)/board/$(BOARDDIR) |
| 24 | CFLAGS_wrap_pinmux_config.o += -I$(srctree)/board/$(BOARDDIR) |
| 25 | CFLAGS_wrap_pll_config.o += -I$(srctree)/board/$(BOARDDIR) |
| 26 | CFLAGS_wrap_sdram_config.o += -I$(srctree)/board/$(BOARDDIR) |