Heiko Schocher | c0dcece | 2013-08-19 16:39:01 +0200 | [diff] [blame] | 1 | /* |
| 2 | * board.h |
| 3 | * |
| 4 | * (C) Copyright 2013 Siemens Schweiz AG |
| 5 | * (C) Heiko Schocher, DENX Software Engineering, hs@denx.de. |
| 6 | * |
| 7 | * Based on: |
| 8 | * TI AM335x boards information header |
| 9 | * u-boot:/board/ti/am335x/board.h |
| 10 | * |
| 11 | * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/ |
| 12 | * |
| 13 | * SPDX-License-Identifier: GPL-2.0+ |
| 14 | */ |
| 15 | |
| 16 | #ifndef _BOARD_H_ |
| 17 | #define _BOARD_H_ |
| 18 | |
| 19 | #define PARGS3(x) settings.ddr3.x-ddr3_default.x, \ |
| 20 | settings.ddr3.x, ddr3_default.x |
| 21 | #define PRINTARGS(y) printf("%x, %8x, %8x : "#y"\n", PARGS3(y)) |
| 22 | #define MAGIC_CHIP 0x50494843 |
| 23 | |
| 24 | /* Automatic generated definition */ |
Egli, Samuel | 823b2c4 | 2014-04-24 17:57:53 +0200 | [diff] [blame] | 25 | /* Wed, 16 Apr 2014 16:50:41 +0200 */ |
| 26 | /* From file: draco/ddr3-data-universal-default@303MHz-i0-ES3.txt */ |
Heiko Schocher | c0dcece | 2013-08-19 16:39:01 +0200 | [diff] [blame] | 27 | struct ddr3_data { |
| 28 | unsigned int magic; /* 0x33524444 */ |
Egli, Samuel | 823b2c4 | 2014-04-24 17:57:53 +0200 | [diff] [blame] | 29 | unsigned int version; /* 0x56312e35 */ |
| 30 | unsigned short int ddr3_sratio; /* 0x0080 */ |
| 31 | unsigned short int iclkout; /* 0x0000 */ |
Heiko Schocher | c0dcece | 2013-08-19 16:39:01 +0200 | [diff] [blame] | 32 | unsigned short int dt0rdsratio0; /* 0x003A */ |
Egli, Samuel | 823b2c4 | 2014-04-24 17:57:53 +0200 | [diff] [blame] | 33 | unsigned short int dt0wdsratio0; /* 0x003F */ |
| 34 | unsigned short int dt0fwsratio0; /* 0x009F */ |
| 35 | unsigned short int dt0wrsratio0; /* 0x0079 */ |
Heiko Schocher | c0dcece | 2013-08-19 16:39:01 +0200 | [diff] [blame] | 36 | unsigned int sdram_tim1; /* 0x0888A39B */ |
| 37 | unsigned int sdram_tim2; /* 0x26247FDA */ |
| 38 | unsigned int sdram_tim3; /* 0x501F821F */ |
Samuel Egli | 56eb3da | 2013-11-04 14:05:03 +0100 | [diff] [blame] | 39 | unsigned int emif_ddr_phy_ctlr_1; /* 0x00100206 */ |
Egli, Samuel | 823b2c4 | 2014-04-24 17:57:53 +0200 | [diff] [blame] | 40 | unsigned int sdram_config; /* 0x61A44A32 */ |
| 41 | unsigned int ref_ctrl; /* 0x0000093B */ |
| 42 | unsigned int ioctr_val; /* 0x0000014A */ |
| 43 | char manu_name[32]; /* "default@303MHz \0" */ |
| 44 | char manu_marking[32]; /* "default \0" */ |
Heiko Schocher | c0dcece | 2013-08-19 16:39:01 +0200 | [diff] [blame] | 45 | }; |
| 46 | |
| 47 | struct chip_data { |
| 48 | unsigned int magic; |
| 49 | char sdevname[16]; |
| 50 | char shwver[7]; |
| 51 | }; |
| 52 | |
Egli, Samuel | 820969f | 2014-05-05 16:50:43 +0200 | [diff] [blame^] | 53 | struct draco_baseboard_id { |
Heiko Schocher | c0dcece | 2013-08-19 16:39:01 +0200 | [diff] [blame] | 54 | struct ddr3_data ddr3; |
| 55 | struct chip_data chip; |
| 56 | }; |
| 57 | |
| 58 | /* |
| 59 | * We have three pin mux functions that must exist. We must be able to enable |
| 60 | * uart0, for initial output and i2c0 to read the main EEPROM. We then have a |
| 61 | * main pinmux function that can be overridden to enable all other pinmux that |
| 62 | * is required on the board. |
| 63 | */ |
| 64 | void enable_uart0_pin_mux(void); |
| 65 | void enable_uart1_pin_mux(void); |
| 66 | void enable_uart2_pin_mux(void); |
| 67 | void enable_uart3_pin_mux(void); |
| 68 | void enable_uart4_pin_mux(void); |
| 69 | void enable_uart5_pin_mux(void); |
| 70 | void enable_i2c0_pin_mux(void); |
| 71 | void enable_board_pin_mux(void); |
| 72 | #endif |