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Feng Kan96e5fc02008-07-08 22:48:07 -07001/*
2 * Configuration for AMCC 460SX Ref (redwood)
3 *
4 * (C) Copyright 2008
5 * Feng Kan, Applied Micro Circuits Corp., fkan@amcc.com
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25#ifndef __CONFIG_H
26#define __CONFIG_H
27
28/*-----------------------------------------------------------------------
29 * High Level Configuration Options
30 *----------------------------------------------------------------------*/
31#define CONFIG_4xx 1 /* ... PPC4xx family */
32#define CONFIG_440 1 /* ... PPC460 family */
33#define CONFIG_460SX 1 /* ... PPC460 family */
34#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */
35
36/*-----------------------------------------------------------------------
37 * Include common defines/options for all AMCC boards
38 *----------------------------------------------------------------------*/
39#define CONFIG_HOSTNAME redwood
40
41#include "amcc-common.h"
42
43#define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */
44
45/*-----------------------------------------------------------------------
46 * Base addresses -- Note these are effective addresses where the
47 * actual resources get mapped (not physical addresses)
48 *----------------------------------------------------------------------*/
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020049#define CONFIG_SYS_FLASH_BASE 0xfff00000 /* start of FLASH */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020050#define CONFIG_SYS_ISRAM_BASE 0x90000000 /* internal SRAM */
Feng Kan96e5fc02008-07-08 22:48:07 -070051
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020052#define CONFIG_SYS_PCI_BASE 0xd0000000 /* internal PCI regs */
Feng Kan96e5fc02008-07-08 22:48:07 -070053
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020054#define CONFIG_SYS_PCIE_MEMBASE 0x90000000 /* mapped PCIe memory */
55#define CONFIG_SYS_PCIE0_MEMBASE 0x90000000 /* mapped PCIe memory */
56#define CONFIG_SYS_PCIE1_MEMBASE 0xa0000000 /* mapped PCIe memory */
57#define CONFIG_SYS_PCIE_MEMSIZE 0x01000000
Feng Kan96e5fc02008-07-08 22:48:07 -070058
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020059#define CONFIG_SYS_PCIE0_XCFGBASE 0xb0000000
60#define CONFIG_SYS_PCIE1_XCFGBASE 0xb2000000
61#define CONFIG_SYS_PCIE2_XCFGBASE 0xb4000000
62#define CONFIG_SYS_PCIE0_CFGBASE 0xb6000000
63#define CONFIG_SYS_PCIE1_CFGBASE 0xb8000000
64#define CONFIG_SYS_PCIE2_CFGBASE 0xba000000
Feng Kan96e5fc02008-07-08 22:48:07 -070065
66/* PCIe mapped UTL registers */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020067#define CONFIG_SYS_PCIE0_REGBASE 0xd0000000
68#define CONFIG_SYS_PCIE1_REGBASE 0xd0010000
69#define CONFIG_SYS_PCIE2_REGBASE 0xd0020000
Feng Kan96e5fc02008-07-08 22:48:07 -070070
71/* System RAM mapped to PCI space */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020072#define CONFIG_PCI_SYS_MEM_BUS CONFIG_SYS_SDRAM_BASE
73#define CONFIG_PCI_SYS_MEM_PHYS CONFIG_SYS_SDRAM_BASE
Feng Kan96e5fc02008-07-08 22:48:07 -070074#define CONFIG_PCI_SYS_MEM_SIZE (1024 * 1024 * 1024)
75
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020076#define CONFIG_SYS_FPGA_BASE 0xe2000000 /* epld */
77#define CONFIG_SYS_OPER_FLASH 0xe7000000 /* SRAM - OPER Flash */
Feng Kan96e5fc02008-07-08 22:48:07 -070078
Stefan Roese550650d2010-09-20 16:05:31 +020079/*
80 * Serial Port
81 */
82#define CONFIG_CONS_INDEX 1 /* Use UART0 */
83
Feng Kan96e5fc02008-07-08 22:48:07 -070084/*-----------------------------------------------------------------------
85 * Initial RAM & stack pointer (placed in internal SRAM)
86 *----------------------------------------------------------------------*/
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020087#define CONFIG_SYS_TEMP_STACK_OCM 1
88#define CONFIG_SYS_OCM_DATA_ADDR CONFIG_SYS_ISRAM_BASE
89#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_ISRAM_BASE /* Initial RAM address */
90#define CONFIG_SYS_INIT_RAM_END 0x2000 /* End of used area in RAM */
91#define CONFIG_SYS_GBL_DATA_SIZE 128 /* num bytes initial data */
Feng Kan96e5fc02008-07-08 22:48:07 -070092
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020093#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
Michael Zaidman800eb092010-09-20 08:51:53 +020094#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
Feng Kan96e5fc02008-07-08 22:48:07 -070095
96/*-----------------------------------------------------------------------
97 * DDR SDRAM
98 *----------------------------------------------------------------------*/
99#define CONFIG_SPD_EEPROM 1 /* Use SPD EEPROM for setup */
100#define CONFIG_DDR_ECC 1 /* with ECC support */
101
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200102#define CONFIG_SYS_SPD_MAX_DIMMS 2
Feng Kan96e5fc02008-07-08 22:48:07 -0700103
104/* SPD i2c spd addresses */
105#define SPD_EEPROM_ADDRESS {IIC0_DIMM0_ADDR, IIC0_DIMM1_ADDR}
Heiko Schocher8f2b4572008-08-19 09:57:41 +0200106#define IIC0_DIMM0_ADDR 0x53
107#define IIC0_DIMM1_ADDR 0x52
Feng Kan96e5fc02008-07-08 22:48:07 -0700108
109/*-----------------------------------------------------------------------
110 * I2C
111 *----------------------------------------------------------------------*/
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200112#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed */
Feng Kan96e5fc02008-07-08 22:48:07 -0700113
114#define IIC0_BOOTPROM_ADDR 0x50
115#define IIC0_ALT_BOOTPROM_ADDR 0x54
116
117/* Don't probe these addrs */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200118#define CONFIG_SYS_I2C_NOPROBES {0x50, 0x52, 0x53, 0x54}
Feng Kan96e5fc02008-07-08 22:48:07 -0700119
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200120#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* Bytes of address */
Feng Kan96e5fc02008-07-08 22:48:07 -0700121
122/*-----------------------------------------------------------------------
123 * Environment
124 *----------------------------------------------------------------------*/
Jean-Christophe PLAGNIOL-VILLARD9314cee2008-09-10 22:47:59 +0200125#undef CONFIG_ENV_IS_IN_NVRAM /* ... not in NVRAM */
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +0200126#define CONFIG_ENV_IS_IN_FLASH 1 /* Environment uses flash */
Jean-Christophe PLAGNIOL-VILLARDbb1f8b42008-09-05 09:19:30 +0200127#undef CONFIG_ENV_IS_IN_EEPROM /* ... not in EEPROM */
Feng Kan96e5fc02008-07-08 22:48:07 -0700128
129#define CONFIG_PREBOOT "echo;" \
130 "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
131 "echo"
132
133#undef CONFIG_BOOTARGS
134
135#define CONFIG_EXTRA_ENV_SETTINGS \
Heiko Schocher8f2b4572008-08-19 09:57:41 +0200136 CONFIG_AMCC_DEF_ENV \
137 CONFIG_AMCC_DEF_ENV_POWERPC \
138 CONFIG_AMCC_DEF_ENV_NOR_UPD \
139 CONFIG_AMCC_DEF_ENV_NAND_UPD \
140 "kernel_addr=fc000000\0" \
141 "fdt_addr=fc1e0000\0" \
142 "ramdisk_addr=fc200000\0" \
Feng Kan96e5fc02008-07-08 22:48:07 -0700143 ""
144
145/*----------------------------------------------------------------------------+
146| Commands in addition to amcc-common.h
147+----------------------------------------------------------------------------*/
148#define CONFIG_CMD_SDRAM
149
150#define CONFIG_BOOTCOMMAND "run flash_self"
151
152#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
153
154#define CONFIG_IBM_EMAC4_V4 1
Heiko Schocher8f2b4572008-08-19 09:57:41 +0200155#define CONFIG_PHY_RESET 1 /* reset phy upon startup */
Feng Kan96e5fc02008-07-08 22:48:07 -0700156#define CONFIG_PHY_RESET_DELAY 1000
157#define CONFIG_M88E1141_PHY 1 /* Enable phy */
158#define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */
159
160#define CONFIG_HAS_ETH0
161#define CONFIG_HAS_ETH1
162#define CONFIG_PHY_ADDR 0 /* PHY address, See schematics */
163#define CONFIG_PHY1_ADDR 1 /* PHY address, See schematics */
164
165#undef CONFIG_WATCHDOG /* watchdog disabled */
166
167/*-----------------------------------------------------------------------
168 * FLASH related
169 *----------------------------------------------------------------------*/
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200170#define CONFIG_SYS_FLASH_CFI /* The flash is CFI compatible */
Heiko Schocher8f2b4572008-08-19 09:57:41 +0200171#define CONFIG_FLASH_CFI_DRIVER /* Use common CFI driver */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200172#define CONFIG_SYS_FLASH_CFI_AMD_RESET 1 /* Use AMD (Spansion) reset cmd */
Feng Kan96e5fc02008-07-08 22:48:07 -0700173
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200174#define CONFIG_SYS_MAX_FLASH_BANKS 3 /* number of banks */
175#define CONFIG_SYS_MAX_FLASH_SECT 256 /* sectors per device */
Feng Kan96e5fc02008-07-08 22:48:07 -0700176
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200177#undef CONFIG_SYS_FLASH_CHECKSUM
178#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
179#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
Feng Kan96e5fc02008-07-08 22:48:07 -0700180
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +0200181#ifdef CONFIG_ENV_IS_IN_FLASH
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200182#define CONFIG_ENV_SECT_SIZE 0x10000 /* size of one complete sector */
183#define CONFIG_ENV_ADDR 0xfffa0000
184#define CONFIG_ENV_SIZE 0x10000 /* Size of Environment vars */
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +0200185#endif /* CONFIG_ENV_IS_IN_FLASH */
Feng Kan96e5fc02008-07-08 22:48:07 -0700186
187/*---------------------------------------------------------------------------*/
188
189#endif /* __CONFIG_H */