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wdenk149dded2003-09-10 18:20:28 +00001/*
2 * URB OHCI HCD (Host Controller Driver) for USB on the S3C2400.
3 *
4 * (C) Copyright 2003
Detlev Zundel792a09e2009-05-13 10:54:10 +02005 * Gary Jennejohn, DENX Software Engineering <garyj@denx.de>
wdenk149dded2003-09-10 18:20:28 +00006 *
wdenk9d46ea42005-03-14 23:56:42 +00007 * Note: Much of this code has been derived from Linux 2.4
8 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
9 * (C) Copyright 2000-2002 David Brownell
10 *
wdenk149dded2003-09-10 18:20:28 +000011 * See file CREDITS for list of people who contributed to this
12 * project.
13 *
14 * This program is free software; you can redistribute it and/or
15 * modify it under the terms of the GNU General Public License as
16 * published by the Free Software Foundation; either version 2 of
17 * the License, or (at your option) any later version.
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, write to the Free Software
26 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
27 * MA 02111-1307 USA
28 *
wdenk149dded2003-09-10 18:20:28 +000029 */
30/*
31 * IMPORTANT NOTES
Mike Frysingerc7d703f2009-01-01 18:27:27 -050032 * 1 - this driver is intended for use with USB Mass Storage Devices
wdenk149dded2003-09-10 18:20:28 +000033 * (BBB) ONLY. There is NO support for Interrupt or Isochronous pipes!
34 */
35
36#include <common.h>
wdenka2663ea2003-12-07 18:32:37 +000037/* #include <pci.h> no PCI on the S3C24X0 */
wdenk149dded2003-09-10 18:20:28 +000038
39#ifdef CONFIG_USB_OHCI
40
wdenka2663ea2003-12-07 18:32:37 +000041#if defined(CONFIG_S3C2400)
wdenk149dded2003-09-10 18:20:28 +000042#include <s3c2400.h>
wdenka2663ea2003-12-07 18:32:37 +000043#elif defined(CONFIG_S3C2410)
44#include <s3c2410.h>
45#endif
46
wdenk149dded2003-09-10 18:20:28 +000047#include <malloc.h>
48#include <usb.h>
49#include "usb_ohci.h"
50
51#define OHCI_USE_NPS /* force NoPowerSwitching mode */
52#undef OHCI_VERBOSE_DEBUG /* not always helpful */
53
54
55/* For initializing controller (mask in an HCFS mode too) */
56#define OHCI_CONTROL_INIT \
57 (OHCI_CTRL_CBSR & 0x3) | OHCI_CTRL_IE | OHCI_CTRL_PLE
58
Wolfgang Denkd00ce092008-04-25 12:44:08 +020059#define readl(a) (*((volatile u32 *)(a)))
60#define writel(a, b) (*((volatile u32 *)(b)) = ((volatile u32)a))
wdenk149dded2003-09-10 18:20:28 +000061
62#define min_t(type,x,y) ({ type __x = (x); type __y = (y); __x < __y ? __x: __y; })
63
64#undef DEBUG
65#ifdef DEBUG
66#define dbg(format, arg...) printf("DEBUG: " format "\n", ## arg)
67#else
68#define dbg(format, arg...) do {} while(0)
69#endif /* DEBUG */
70#define err(format, arg...) printf("ERROR: " format "\n", ## arg)
71#undef SHOW_INFO
72#ifdef SHOW_INFO
73#define info(format, arg...) printf("INFO: " format "\n", ## arg)
74#else
75#define info(format, arg...) do {} while(0)
76#endif
77
78#define m16_swap(x) swap_16(x)
79#define m32_swap(x) swap_32(x)
80
81/* global ohci_t */
82static ohci_t gohci;
83/* this must be aligned to a 256 byte boundary */
84struct ohci_hcca ghcca[1];
85/* a pointer to the aligned storage */
86struct ohci_hcca *phcca;
87/* this allocates EDs for all possible endpoints */
88struct ohci_device ohci_dev;
89/* urb_priv */
90urb_priv_t urb_priv;
dzu8a42eac2003-09-29 21:55:54 +000091/* RHSC flag */
92int got_rhsc;
93/* device which was disconnected */
94struct usb_device *devgone;
Wolfgang Denk9c998aa2005-07-21 11:57:57 +020095/* flag guarding URB transation */
96int urb_finished = 0;
wdenk149dded2003-09-10 18:20:28 +000097
98/*-------------------------------------------------------------------------*/
99
100/* AMD-756 (D2 rev) reports corrupt register contents in some cases.
101 * The erratum (#4) description is incorrect. AMD's workaround waits
102 * till some bits (mostly reserved) are clear; ok for all revs.
103 */
104#define OHCI_QUIRK_AMD756 0xabcd
105#define read_roothub(hc, register, mask) ({ \
106 u32 temp = readl (&hc->regs->roothub.register); \
107 if (hc->flags & OHCI_QUIRK_AMD756) \
108 while (temp & mask) \
109 temp = readl (&hc->regs->roothub.register); \
110 temp; })
111
112static u32 roothub_a (struct ohci *hc)
113 { return read_roothub (hc, a, 0xfc0fe000); }
114static inline u32 roothub_b (struct ohci *hc)
115 { return readl (&hc->regs->roothub.b); }
116static inline u32 roothub_status (struct ohci *hc)
117 { return readl (&hc->regs->roothub.status); }
118static u32 roothub_portstatus (struct ohci *hc, int i)
119 { return read_roothub (hc, portstatus [i], 0xffe0fce0); }
120
121
122/* forward declaration */
123static int hc_interrupt (void);
124static void
125td_submit_job (struct usb_device * dev, unsigned long pipe, void * buffer,
126 int transfer_len, struct devrequest * setup, urb_priv_t * urb, int interval);
127
128/*-------------------------------------------------------------------------*
129 * URB support functions
130 *-------------------------------------------------------------------------*/
131
132/* free HCD-private data associated with this URB */
133
134static void urb_free_priv (urb_priv_t * urb)
135{
136 int i;
137 int last;
138 struct td * td;
139
140 last = urb->length - 1;
141 if (last >= 0) {
142 for (i = 0; i <= last; i++) {
143 td = urb->td[i];
144 if (td) {
145 td->usb_dev = NULL;
146 urb->td[i] = NULL;
147 }
148 }
149 }
150}
151
152/*-------------------------------------------------------------------------*/
153
154#ifdef DEBUG
155static int sohci_get_current_frame_number (struct usb_device * dev);
156
157/* debug| print the main components of an URB
158 * small: 0) header + data packets 1) just header */
159
160static void pkt_print (struct usb_device * dev, unsigned long pipe, void * buffer,
161 int transfer_len, struct devrequest * setup, char * str, int small)
162{
163 urb_priv_t * purb = &urb_priv;
164
165 dbg("%s URB:[%4x] dev:%2d,ep:%2d-%c,type:%s,len:%d/%d stat:%#lx",
166 str,
wdenk42d1f032003-10-15 23:53:47 +0000167 sohci_get_current_frame_number (dev),
168 usb_pipedevice (pipe),
169 usb_pipeendpoint (pipe),
170 usb_pipeout (pipe)? 'O': 'I',
171 usb_pipetype (pipe) < 2? (usb_pipeint (pipe)? "INTR": "ISOC"):
172 (usb_pipecontrol (pipe)? "CTRL": "BULK"),
173 purb->actual_length,
174 transfer_len, dev->status);
wdenk149dded2003-09-10 18:20:28 +0000175#ifdef OHCI_VERBOSE_DEBUG
176 if (!small) {
177 int i, len;
178
179 if (usb_pipecontrol (pipe)) {
180 printf (__FILE__ ": cmd(8):");
181 for (i = 0; i < 8 ; i++)
182 printf (" %02x", ((__u8 *) setup) [i]);
183 printf ("\n");
184 }
185 if (transfer_len > 0 && buffer) {
186 printf (__FILE__ ": data(%d/%d):",
187 purb->actual_length,
188 transfer_len);
189 len = usb_pipeout (pipe)?
190 transfer_len: purb->actual_length;
191 for (i = 0; i < 16 && i < len; i++)
192 printf (" %02x", ((__u8 *) buffer) [i]);
193 printf ("%s\n", i < len? "...": "");
194 }
195 }
196#endif
197}
198
199/* just for debugging; prints non-empty branches of the int ed tree inclusive iso eds*/
200void ep_print_int_eds (ohci_t *ohci, char * str) {
201 int i, j;
202 __u32 * ed_p;
203 for (i= 0; i < 32; i++) {
204 j = 5;
205 ed_p = &(ohci->hcca->int_table [i]);
206 if (*ed_p == 0)
207 continue;
208 printf (__FILE__ ": %s branch int %2d(%2x):", str, i, i);
209 while (*ed_p != 0 && j--) {
210 ed_t *ed = (ed_t *)m32_swap(ed_p);
211 printf (" ed: %4x;", ed->hwINFO);
212 ed_p = &ed->hwNextED;
213 }
214 printf ("\n");
215 }
216}
217
218static void ohci_dump_intr_mask (char *label, __u32 mask)
219{
220 dbg ("%s: 0x%08x%s%s%s%s%s%s%s%s%s",
221 label,
222 mask,
223 (mask & OHCI_INTR_MIE) ? " MIE" : "",
224 (mask & OHCI_INTR_OC) ? " OC" : "",
225 (mask & OHCI_INTR_RHSC) ? " RHSC" : "",
226 (mask & OHCI_INTR_FNO) ? " FNO" : "",
227 (mask & OHCI_INTR_UE) ? " UE" : "",
228 (mask & OHCI_INTR_RD) ? " RD" : "",
229 (mask & OHCI_INTR_SF) ? " SF" : "",
230 (mask & OHCI_INTR_WDH) ? " WDH" : "",
231 (mask & OHCI_INTR_SO) ? " SO" : ""
232 );
233}
234
235static void maybe_print_eds (char *label, __u32 value)
236{
237 ed_t *edp = (ed_t *)value;
238
239 if (value) {
240 dbg ("%s %08x", label, value);
241 dbg ("%08x", edp->hwINFO);
242 dbg ("%08x", edp->hwTailP);
243 dbg ("%08x", edp->hwHeadP);
244 dbg ("%08x", edp->hwNextED);
245 }
246}
247
248static char * hcfs2string (int state)
249{
250 switch (state) {
251 case OHCI_USB_RESET: return "reset";
252 case OHCI_USB_RESUME: return "resume";
253 case OHCI_USB_OPER: return "operational";
254 case OHCI_USB_SUSPEND: return "suspend";
255 }
256 return "?";
257}
258
259/* dump control and status registers */
260static void ohci_dump_status (ohci_t *controller)
261{
262 struct ohci_regs *regs = controller->regs;
263 __u32 temp;
264
265 temp = readl (&regs->revision) & 0xff;
266 if (temp != 0x10)
267 dbg ("spec %d.%d", (temp >> 4), (temp & 0x0f));
268
269 temp = readl (&regs->control);
270 dbg ("control: 0x%08x%s%s%s HCFS=%s%s%s%s%s CBSR=%d", temp,
271 (temp & OHCI_CTRL_RWE) ? " RWE" : "",
272 (temp & OHCI_CTRL_RWC) ? " RWC" : "",
273 (temp & OHCI_CTRL_IR) ? " IR" : "",
274 hcfs2string (temp & OHCI_CTRL_HCFS),
275 (temp & OHCI_CTRL_BLE) ? " BLE" : "",
276 (temp & OHCI_CTRL_CLE) ? " CLE" : "",
277 (temp & OHCI_CTRL_IE) ? " IE" : "",
278 (temp & OHCI_CTRL_PLE) ? " PLE" : "",
279 temp & OHCI_CTRL_CBSR
280 );
281
282 temp = readl (&regs->cmdstatus);
283 dbg ("cmdstatus: 0x%08x SOC=%d%s%s%s%s", temp,
284 (temp & OHCI_SOC) >> 16,
285 (temp & OHCI_OCR) ? " OCR" : "",
286 (temp & OHCI_BLF) ? " BLF" : "",
287 (temp & OHCI_CLF) ? " CLF" : "",
288 (temp & OHCI_HCR) ? " HCR" : ""
289 );
290
291 ohci_dump_intr_mask ("intrstatus", readl (&regs->intrstatus));
292 ohci_dump_intr_mask ("intrenable", readl (&regs->intrenable));
293
294 maybe_print_eds ("ed_periodcurrent", readl (&regs->ed_periodcurrent));
295
296 maybe_print_eds ("ed_controlhead", readl (&regs->ed_controlhead));
297 maybe_print_eds ("ed_controlcurrent", readl (&regs->ed_controlcurrent));
298
299 maybe_print_eds ("ed_bulkhead", readl (&regs->ed_bulkhead));
300 maybe_print_eds ("ed_bulkcurrent", readl (&regs->ed_bulkcurrent));
301
302 maybe_print_eds ("donehead", readl (&regs->donehead));
303}
304
305static void ohci_dump_roothub (ohci_t *controller, int verbose)
306{
307 __u32 temp, ndp, i;
308
309 temp = roothub_a (controller);
310 ndp = (temp & RH_A_NDP);
311
312 if (verbose) {
313 dbg ("roothub.a: %08x POTPGT=%d%s%s%s%s%s NDP=%d", temp,
314 ((temp & RH_A_POTPGT) >> 24) & 0xff,
315 (temp & RH_A_NOCP) ? " NOCP" : "",
316 (temp & RH_A_OCPM) ? " OCPM" : "",
317 (temp & RH_A_DT) ? " DT" : "",
318 (temp & RH_A_NPS) ? " NPS" : "",
319 (temp & RH_A_PSM) ? " PSM" : "",
320 ndp
321 );
322 temp = roothub_b (controller);
323 dbg ("roothub.b: %08x PPCM=%04x DR=%04x",
324 temp,
325 (temp & RH_B_PPCM) >> 16,
326 (temp & RH_B_DR)
327 );
328 temp = roothub_status (controller);
329 dbg ("roothub.status: %08x%s%s%s%s%s%s",
330 temp,
331 (temp & RH_HS_CRWE) ? " CRWE" : "",
332 (temp & RH_HS_OCIC) ? " OCIC" : "",
333 (temp & RH_HS_LPSC) ? " LPSC" : "",
334 (temp & RH_HS_DRWE) ? " DRWE" : "",
335 (temp & RH_HS_OCI) ? " OCI" : "",
336 (temp & RH_HS_LPS) ? " LPS" : ""
337 );
338 }
339
340 for (i = 0; i < ndp; i++) {
341 temp = roothub_portstatus (controller, i);
342 dbg ("roothub.portstatus [%d] = 0x%08x%s%s%s%s%s%s%s%s%s%s%s%s",
343 i,
344 temp,
345 (temp & RH_PS_PRSC) ? " PRSC" : "",
346 (temp & RH_PS_OCIC) ? " OCIC" : "",
347 (temp & RH_PS_PSSC) ? " PSSC" : "",
348 (temp & RH_PS_PESC) ? " PESC" : "",
349 (temp & RH_PS_CSC) ? " CSC" : "",
350
351 (temp & RH_PS_LSDA) ? " LSDA" : "",
352 (temp & RH_PS_PPS) ? " PPS" : "",
353 (temp & RH_PS_PRS) ? " PRS" : "",
354 (temp & RH_PS_POCI) ? " POCI" : "",
355 (temp & RH_PS_PSS) ? " PSS" : "",
356
357 (temp & RH_PS_PES) ? " PES" : "",
358 (temp & RH_PS_CCS) ? " CCS" : ""
359 );
360 }
361}
362
363static void ohci_dump (ohci_t *controller, int verbose)
364{
365 dbg ("OHCI controller usb-%s state", controller->slot_name);
366
367 /* dumps some of the state we know about */
368 ohci_dump_status (controller);
369 if (verbose)
370 ep_print_int_eds (controller, "hcca");
371 dbg ("hcca frame #%04x", controller->hcca->frame_no);
372 ohci_dump_roothub (controller, 1);
373}
374
375
376#endif /* DEBUG */
377
378/*-------------------------------------------------------------------------*
379 * Interface functions (URB)
380 *-------------------------------------------------------------------------*/
381
382/* get a transfer request */
383
384int sohci_submit_job(struct usb_device *dev, unsigned long pipe, void *buffer,
385 int transfer_len, struct devrequest *setup, int interval)
386{
387 ohci_t *ohci;
388 ed_t * ed;
389 urb_priv_t *purb_priv;
390 int i, size = 0;
391
392 ohci = &gohci;
393
394 /* when controller's hung, permit only roothub cleanup attempts
395 * such as powering down ports */
396 if (ohci->disabled) {
397 err("sohci_submit_job: EPIPE");
398 return -1;
399 }
400
Wolfgang Denk9c998aa2005-07-21 11:57:57 +0200401 /* if we have an unfinished URB from previous transaction let's
402 * fail and scream as quickly as possible so as not to corrupt
403 * further communication */
404 if (!urb_finished) {
405 err("sohci_submit_job: URB NOT FINISHED");
406 return -1;
407 }
408 /* we're about to begin a new transaction here so mark the URB unfinished */
409 urb_finished = 0;
410
wdenk149dded2003-09-10 18:20:28 +0000411 /* every endpoint has a ed, locate and fill it */
412 if (!(ed = ep_add_ed (dev, pipe))) {
413 err("sohci_submit_job: ENOMEM");
414 return -1;
415 }
416
417 /* for the private part of the URB we need the number of TDs (size) */
418 switch (usb_pipetype (pipe)) {
419 case PIPE_BULK: /* one TD for every 4096 Byte */
420 size = (transfer_len - 1) / 4096 + 1;
421 break;
422 case PIPE_CONTROL: /* 1 TD for setup, 1 for ACK and 1 for every 4096 B */
423 size = (transfer_len == 0)? 2:
424 (transfer_len - 1) / 4096 + 3;
425 break;
426 }
427
428 if (size >= (N_URB_TD - 1)) {
429 err("need %d TDs, only have %d", size, N_URB_TD);
430 return -1;
431 }
432 purb_priv = &urb_priv;
433 purb_priv->pipe = pipe;
434
435 /* fill the private part of the URB */
436 purb_priv->length = size;
437 purb_priv->ed = ed;
438 purb_priv->actual_length = 0;
439
440 /* allocate the TDs */
441 /* note that td[0] was allocated in ep_add_ed */
442 for (i = 0; i < size; i++) {
443 purb_priv->td[i] = td_alloc (dev);
444 if (!purb_priv->td[i]) {
445 purb_priv->length = i;
446 urb_free_priv (purb_priv);
447 err("sohci_submit_job: ENOMEM");
448 return -1;
449 }
450 }
451
452 if (ed->state == ED_NEW || (ed->state & ED_DEL)) {
453 urb_free_priv (purb_priv);
454 err("sohci_submit_job: EINVAL");
455 return -1;
456 }
457
458 /* link the ed into a chain if is not already */
459 if (ed->state != ED_OPER)
460 ep_link (ohci, ed);
461
462 /* fill the TDs and link it to the ed */
463 td_submit_job(dev, pipe, buffer, transfer_len, setup, purb_priv, interval);
464
465 return 0;
466}
467
468/*-------------------------------------------------------------------------*/
469
470#ifdef DEBUG
471/* tell us the current USB frame number */
472
473static int sohci_get_current_frame_number (struct usb_device *usb_dev)
474{
475 ohci_t *ohci = &gohci;
476
477 return m16_swap (ohci->hcca->frame_no);
478}
479#endif
480
481/*-------------------------------------------------------------------------*
482 * ED handling functions
483 *-------------------------------------------------------------------------*/
484
485/* link an ed into one of the HC chains */
486
487static int ep_link (ohci_t *ohci, ed_t *edi)
488{
489 volatile ed_t *ed = edi;
490
491 ed->state = ED_OPER;
492
493 switch (ed->type) {
494 case PIPE_CONTROL:
495 ed->hwNextED = 0;
496 if (ohci->ed_controltail == NULL) {
497 writel (ed, &ohci->regs->ed_controlhead);
498 } else {
Jean-Christophe PLAGNIOL-VILLARD6bf4c682007-11-18 18:36:11 +0100499 ohci->ed_controltail->hwNextED = (__u32)m32_swap (ed);
wdenk149dded2003-09-10 18:20:28 +0000500 }
501 ed->ed_prev = ohci->ed_controltail;
502 if (!ohci->ed_controltail && !ohci->ed_rm_list[0] &&
503 !ohci->ed_rm_list[1] && !ohci->sleeping) {
504 ohci->hc_control |= OHCI_CTRL_CLE;
505 writel (ohci->hc_control, &ohci->regs->control);
506 }
507 ohci->ed_controltail = edi;
508 break;
509
510 case PIPE_BULK:
511 ed->hwNextED = 0;
512 if (ohci->ed_bulktail == NULL) {
513 writel (ed, &ohci->regs->ed_bulkhead);
514 } else {
Jean-Christophe PLAGNIOL-VILLARD6bf4c682007-11-18 18:36:11 +0100515 ohci->ed_bulktail->hwNextED = (__u32)m32_swap (ed);
wdenk149dded2003-09-10 18:20:28 +0000516 }
517 ed->ed_prev = ohci->ed_bulktail;
518 if (!ohci->ed_bulktail && !ohci->ed_rm_list[0] &&
519 !ohci->ed_rm_list[1] && !ohci->sleeping) {
520 ohci->hc_control |= OHCI_CTRL_BLE;
521 writel (ohci->hc_control, &ohci->regs->control);
522 }
523 ohci->ed_bulktail = edi;
524 break;
525 }
526 return 0;
527}
528
529/*-------------------------------------------------------------------------*/
530
531/* unlink an ed from one of the HC chains.
532 * just the link to the ed is unlinked.
533 * the link from the ed still points to another operational ed or 0
534 * so the HC can eventually finish the processing of the unlinked ed */
535
536static int ep_unlink (ohci_t *ohci, ed_t *ed)
537{
538 ed->hwINFO |= m32_swap (OHCI_ED_SKIP);
539
540 switch (ed->type) {
541 case PIPE_CONTROL:
542 if (ed->ed_prev == NULL) {
543 if (!ed->hwNextED) {
544 ohci->hc_control &= ~OHCI_CTRL_CLE;
545 writel (ohci->hc_control, &ohci->regs->control);
546 }
547 writel (m32_swap (*((__u32 *)&ed->hwNextED)), &ohci->regs->ed_controlhead);
548 } else {
549 ed->ed_prev->hwNextED = ed->hwNextED;
550 }
551 if (ohci->ed_controltail == ed) {
552 ohci->ed_controltail = ed->ed_prev;
553 } else {
554 ((ed_t *)m32_swap (*((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
555 }
556 break;
557
558 case PIPE_BULK:
559 if (ed->ed_prev == NULL) {
560 if (!ed->hwNextED) {
561 ohci->hc_control &= ~OHCI_CTRL_BLE;
562 writel (ohci->hc_control, &ohci->regs->control);
563 }
564 writel (m32_swap (*((__u32 *)&ed->hwNextED)), &ohci->regs->ed_bulkhead);
565 } else {
566 ed->ed_prev->hwNextED = ed->hwNextED;
567 }
568 if (ohci->ed_bulktail == ed) {
569 ohci->ed_bulktail = ed->ed_prev;
570 } else {
571 ((ed_t *)m32_swap (*((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
572 }
573 break;
574 }
575 ed->state = ED_UNLINK;
576 return 0;
577}
578
579
580/*-------------------------------------------------------------------------*/
581
582/* add/reinit an endpoint; this should be done once at the usb_set_configuration command,
583 * but the USB stack is a little bit stateless so we do it at every transaction
584 * if the state of the ed is ED_NEW then a dummy td is added and the state is changed to ED_UNLINK
585 * in all other cases the state is left unchanged
586 * the ed info fields are setted anyway even though most of them should not change */
587
588static ed_t * ep_add_ed (struct usb_device *usb_dev, unsigned long pipe)
589{
590 td_t *td;
591 ed_t *ed_ret;
592 volatile ed_t *ed;
593
594 ed = ed_ret = &ohci_dev.ed[(usb_pipeendpoint (pipe) << 1) |
595 (usb_pipecontrol (pipe)? 0: usb_pipeout (pipe))];
596
597 if ((ed->state & ED_DEL) || (ed->state & ED_URB_DEL)) {
598 err("ep_add_ed: pending delete");
599 /* pending delete request */
600 return NULL;
601 }
602
603 if (ed->state == ED_NEW) {
604 ed->hwINFO = m32_swap (OHCI_ED_SKIP); /* skip ed */
wdenk42d1f032003-10-15 23:53:47 +0000605 /* dummy td; end of td list for ed */
wdenk149dded2003-09-10 18:20:28 +0000606 td = td_alloc (usb_dev);
Jean-Christophe PLAGNIOL-VILLARD6bf4c682007-11-18 18:36:11 +0100607 ed->hwTailP = (__u32)m32_swap (td);
wdenk149dded2003-09-10 18:20:28 +0000608 ed->hwHeadP = ed->hwTailP;
609 ed->state = ED_UNLINK;
610 ed->type = usb_pipetype (pipe);
611 ohci_dev.ed_cnt++;
612 }
613
614 ed->hwINFO = m32_swap (usb_pipedevice (pipe)
615 | usb_pipeendpoint (pipe) << 7
616 | (usb_pipeisoc (pipe)? 0x8000: 0)
617 | (usb_pipecontrol (pipe)? 0: (usb_pipeout (pipe)? 0x800: 0x1000))
618 | usb_pipeslow (pipe) << 13
619 | usb_maxpacket (usb_dev, pipe) << 16);
620
621 return ed_ret;
622}
623
624/*-------------------------------------------------------------------------*
625 * TD handling functions
626 *-------------------------------------------------------------------------*/
627
628/* enqueue next TD for this URB (OHCI spec 5.2.8.2) */
629
630static void td_fill (ohci_t *ohci, unsigned int info,
631 void *data, int len,
632 struct usb_device *dev, int index, urb_priv_t *urb_priv)
633{
634 volatile td_t *td, *td_pt;
635#ifdef OHCI_FILL_TRACE
636 int i;
637#endif
638
639 if (index > urb_priv->length) {
640 err("index > length");
641 return;
642 }
643 /* use this td as the next dummy */
644 td_pt = urb_priv->td [index];
645 td_pt->hwNextTD = 0;
646
647 /* fill the old dummy TD */
648 td = urb_priv->td [index] = (td_t *)(m32_swap (urb_priv->ed->hwTailP) & ~0xf);
649
650 td->ed = urb_priv->ed;
651 td->next_dl_td = NULL;
652 td->index = index;
653 td->data = (__u32)data;
654#ifdef OHCI_FILL_TRACE
Remy Bohmer9dbc3662008-10-10 10:23:22 +0200655 if (usb_pipebulk(urb_priv->pipe) && usb_pipeout(urb_priv->pipe)) {
wdenk149dded2003-09-10 18:20:28 +0000656 for (i = 0; i < len; i++)
657 printf("td->data[%d] %#2x ",i, ((unsigned char *)td->data)[i]);
658 printf("\n");
659 }
660#endif
661 if (!len)
662 data = 0;
663
Jean-Christophe PLAGNIOL-VILLARD6bf4c682007-11-18 18:36:11 +0100664 td->hwINFO = (__u32)m32_swap (info);
665 td->hwCBP = (__u32)m32_swap (data);
wdenk149dded2003-09-10 18:20:28 +0000666 if (data)
Jean-Christophe PLAGNIOL-VILLARD6bf4c682007-11-18 18:36:11 +0100667 td->hwBE = (__u32)m32_swap (data + len - 1);
wdenk149dded2003-09-10 18:20:28 +0000668 else
669 td->hwBE = 0;
Jean-Christophe PLAGNIOL-VILLARD6bf4c682007-11-18 18:36:11 +0100670 td->hwNextTD = (__u32)m32_swap (td_pt);
wdenk149dded2003-09-10 18:20:28 +0000671
672 /* append to queue */
673 td->ed->hwTailP = td->hwNextTD;
674}
675
676/*-------------------------------------------------------------------------*/
677
678/* prepare all TDs of a transfer */
679
680static void td_submit_job (struct usb_device *dev, unsigned long pipe, void *buffer,
681 int transfer_len, struct devrequest *setup, urb_priv_t *urb, int interval)
682{
683 ohci_t *ohci = &gohci;
684 int data_len = transfer_len;
685 void *data;
686 int cnt = 0;
687 __u32 info = 0;
wdenk42d1f032003-10-15 23:53:47 +0000688 unsigned int toggle = 0;
wdenk149dded2003-09-10 18:20:28 +0000689
690 /* OHCI handles the DATA-toggles itself, we just use the USB-toggle bits for reseting */
wdenk42d1f032003-10-15 23:53:47 +0000691 if(usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe))) {
692 toggle = TD_T_TOGGLE;
wdenk149dded2003-09-10 18:20:28 +0000693 } else {
wdenk42d1f032003-10-15 23:53:47 +0000694 toggle = TD_T_DATA0;
wdenk149dded2003-09-10 18:20:28 +0000695 usb_settoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe), 1);
696 }
697 urb->td_cnt = 0;
698 if (data_len)
699 data = buffer;
700 else
701 data = 0;
702
703 switch (usb_pipetype (pipe)) {
704 case PIPE_BULK:
705 info = usb_pipeout (pipe)?
706 TD_CC | TD_DP_OUT : TD_CC | TD_DP_IN ;
707 while(data_len > 4096) {
708 td_fill (ohci, info | (cnt? TD_T_TOGGLE:toggle), data, 4096, dev, cnt, urb);
709 data += 4096; data_len -= 4096; cnt++;
710 }
711 info = usb_pipeout (pipe)?
712 TD_CC | TD_DP_OUT : TD_CC | TD_R | TD_DP_IN ;
713 td_fill (ohci, info | (cnt? TD_T_TOGGLE:toggle), data, data_len, dev, cnt, urb);
714 cnt++;
715
716 if (!ohci->sleeping)
717 writel (OHCI_BLF, &ohci->regs->cmdstatus); /* start bulk list */
718 break;
719
720 case PIPE_CONTROL:
721 info = TD_CC | TD_DP_SETUP | TD_T_DATA0;
722 td_fill (ohci, info, setup, 8, dev, cnt++, urb);
723 if (data_len > 0) {
724 info = usb_pipeout (pipe)?
725 TD_CC | TD_R | TD_DP_OUT | TD_T_DATA1 : TD_CC | TD_R | TD_DP_IN | TD_T_DATA1;
726 /* NOTE: mishandles transfers >8K, some >4K */
727 td_fill (ohci, info, data, data_len, dev, cnt++, urb);
728 }
729 info = usb_pipeout (pipe)?
730 TD_CC | TD_DP_IN | TD_T_DATA1: TD_CC | TD_DP_OUT | TD_T_DATA1;
731 td_fill (ohci, info, data, 0, dev, cnt++, urb);
732 if (!ohci->sleeping)
733 writel (OHCI_CLF, &ohci->regs->cmdstatus); /* start Control list */
734 break;
735 }
736 if (urb->length != cnt)
737 dbg("TD LENGTH %d != CNT %d", urb->length, cnt);
738}
739
740/*-------------------------------------------------------------------------*
741 * Done List handling functions
742 *-------------------------------------------------------------------------*/
743
744
745/* calculate the transfer length and update the urb */
746
747static void dl_transfer_length(td_t * td)
748{
749 __u32 tdINFO, tdBE, tdCBP;
wdenk42d1f032003-10-15 23:53:47 +0000750 urb_priv_t *lurb_priv = &urb_priv;
wdenk149dded2003-09-10 18:20:28 +0000751
752 tdINFO = m32_swap (td->hwINFO);
wdenk42d1f032003-10-15 23:53:47 +0000753 tdBE = m32_swap (td->hwBE);
754 tdCBP = m32_swap (td->hwCBP);
wdenk149dded2003-09-10 18:20:28 +0000755
756
Remy Bohmer9dbc3662008-10-10 10:23:22 +0200757 if (!(usb_pipecontrol(lurb_priv->pipe) &&
wdenk149dded2003-09-10 18:20:28 +0000758 ((td->index == 0) || (td->index == lurb_priv->length - 1)))) {
759 if (tdBE != 0) {
760 if (td->hwCBP == 0)
761 lurb_priv->actual_length += tdBE - td->data + 1;
762 else
763 lurb_priv->actual_length += tdCBP - td->data;
764 }
765 }
766}
767
768/*-------------------------------------------------------------------------*/
769
770/* replies to the request have to be on a FIFO basis so
771 * we reverse the reversed done-list */
772
773static td_t * dl_reverse_done_list (ohci_t *ohci)
774{
775 __u32 td_list_hc;
776 td_t *td_rev = NULL;
777 td_t *td_list = NULL;
wdenk42d1f032003-10-15 23:53:47 +0000778 urb_priv_t *lurb_priv = NULL;
wdenk149dded2003-09-10 18:20:28 +0000779
780 td_list_hc = m32_swap (ohci->hcca->done_head) & 0xfffffff0;
781 ohci->hcca->done_head = 0;
782
783 while (td_list_hc) {
784 td_list = (td_t *)td_list_hc;
785
786 if (TD_CC_GET (m32_swap (td_list->hwINFO))) {
787 lurb_priv = &urb_priv;
788 dbg(" USB-error/status: %x : %p",
789 TD_CC_GET (m32_swap (td_list->hwINFO)), td_list);
790 if (td_list->ed->hwHeadP & m32_swap (0x1)) {
791 if (lurb_priv && ((td_list->index + 1) < lurb_priv->length)) {
792 td_list->ed->hwHeadP =
793 (lurb_priv->td[lurb_priv->length - 1]->hwNextTD & m32_swap (0xfffffff0)) |
794 (td_list->ed->hwHeadP & m32_swap (0x2));
795 lurb_priv->td_cnt += lurb_priv->length - td_list->index - 1;
796 } else
797 td_list->ed->hwHeadP &= m32_swap (0xfffffff2);
798 }
799 }
800
801 td_list->next_dl_td = td_rev;
802 td_rev = td_list;
803 td_list_hc = m32_swap (td_list->hwNextTD) & 0xfffffff0;
804 }
Wolfgang Denk9c998aa2005-07-21 11:57:57 +0200805
wdenk149dded2003-09-10 18:20:28 +0000806 return td_list;
807}
808
809/*-------------------------------------------------------------------------*/
810
811/* td done list */
812static int dl_done_list (ohci_t *ohci, td_t *td_list)
813{
wdenk42d1f032003-10-15 23:53:47 +0000814 td_t *td_list_next = NULL;
wdenk149dded2003-09-10 18:20:28 +0000815 ed_t *ed;
816 int cc = 0;
817 int stat = 0;
818 /* urb_t *urb; */
819 urb_priv_t *lurb_priv;
wdenk42d1f032003-10-15 23:53:47 +0000820 __u32 tdINFO, edHeadP, edTailP;
wdenk149dded2003-09-10 18:20:28 +0000821
wdenk42d1f032003-10-15 23:53:47 +0000822 while (td_list) {
823 td_list_next = td_list->next_dl_td;
wdenk149dded2003-09-10 18:20:28 +0000824
wdenk42d1f032003-10-15 23:53:47 +0000825 lurb_priv = &urb_priv;
826 tdINFO = m32_swap (td_list->hwINFO);
wdenk149dded2003-09-10 18:20:28 +0000827
wdenk42d1f032003-10-15 23:53:47 +0000828 ed = td_list->ed;
wdenk149dded2003-09-10 18:20:28 +0000829
wdenk42d1f032003-10-15 23:53:47 +0000830 dl_transfer_length(td_list);
wdenk149dded2003-09-10 18:20:28 +0000831
wdenk42d1f032003-10-15 23:53:47 +0000832 /* error code of transfer */
833 cc = TD_CC_GET (tdINFO);
wdenk149dded2003-09-10 18:20:28 +0000834 if (cc != 0) {
835 dbg("ConditionCode %#x", cc);
836 stat = cc_to_error[cc];
837 }
838
Wolfgang Denk9c998aa2005-07-21 11:57:57 +0200839 /* see if this done list makes for all TD's of current URB,
840 * and mark the URB finished if so */
841 if (++(lurb_priv->td_cnt) == lurb_priv->length) {
842 if ((ed->state & (ED_OPER | ED_UNLINK)))
843 urb_finished = 1;
844 else
845 dbg("dl_done_list: strange.., ED state %x, ed->state\n");
846 } else
847 dbg("dl_done_list: processing TD %x, len %x\n", lurb_priv->td_cnt,
848 lurb_priv->length);
849
wdenk42d1f032003-10-15 23:53:47 +0000850 if (ed->state != ED_NEW) {
851 edHeadP = m32_swap (ed->hwHeadP) & 0xfffffff0;
852 edTailP = m32_swap (ed->hwTailP);
wdenk149dded2003-09-10 18:20:28 +0000853
854 /* unlink eds if they are not busy */
wdenk42d1f032003-10-15 23:53:47 +0000855 if ((edHeadP == edTailP) && (ed->state == ED_OPER))
856 ep_unlink (ohci, ed);
857 }
wdenk149dded2003-09-10 18:20:28 +0000858
wdenk42d1f032003-10-15 23:53:47 +0000859 td_list = td_list_next;
860 }
wdenk149dded2003-09-10 18:20:28 +0000861 return stat;
862}
863
864/*-------------------------------------------------------------------------*
865 * Virtual Root Hub
866 *-------------------------------------------------------------------------*/
867
868/* Device descriptor */
869static __u8 root_hub_dev_des[] =
870{
871 0x12, /* __u8 bLength; */
872 0x01, /* __u8 bDescriptorType; Device */
873 0x10, /* __u16 bcdUSB; v1.1 */
874 0x01,
875 0x09, /* __u8 bDeviceClass; HUB_CLASSCODE */
876 0x00, /* __u8 bDeviceSubClass; */
877 0x00, /* __u8 bDeviceProtocol; */
878 0x08, /* __u8 bMaxPacketSize0; 8 Bytes */
879 0x00, /* __u16 idVendor; */
880 0x00,
881 0x00, /* __u16 idProduct; */
wdenk42d1f032003-10-15 23:53:47 +0000882 0x00,
wdenk149dded2003-09-10 18:20:28 +0000883 0x00, /* __u16 bcdDevice; */
wdenk42d1f032003-10-15 23:53:47 +0000884 0x00,
wdenk149dded2003-09-10 18:20:28 +0000885 0x00, /* __u8 iManufacturer; */
886 0x01, /* __u8 iProduct; */
887 0x00, /* __u8 iSerialNumber; */
888 0x01 /* __u8 bNumConfigurations; */
889};
890
891
892/* Configuration descriptor */
893static __u8 root_hub_config_des[] =
894{
895 0x09, /* __u8 bLength; */
896 0x02, /* __u8 bDescriptorType; Configuration */
897 0x19, /* __u16 wTotalLength; */
898 0x00,
899 0x01, /* __u8 bNumInterfaces; */
900 0x01, /* __u8 bConfigurationValue; */
901 0x00, /* __u8 iConfiguration; */
902 0x40, /* __u8 bmAttributes;
wdenk42d1f032003-10-15 23:53:47 +0000903 Bit 7: Bus-powered, 6: Self-powered, 5 Remote-wakwup, 4..0: resvd */
wdenk149dded2003-09-10 18:20:28 +0000904 0x00, /* __u8 MaxPower; */
905
906 /* interface */
907 0x09, /* __u8 if_bLength; */
908 0x04, /* __u8 if_bDescriptorType; Interface */
909 0x00, /* __u8 if_bInterfaceNumber; */
910 0x00, /* __u8 if_bAlternateSetting; */
911 0x01, /* __u8 if_bNumEndpoints; */
912 0x09, /* __u8 if_bInterfaceClass; HUB_CLASSCODE */
913 0x00, /* __u8 if_bInterfaceSubClass; */
914 0x00, /* __u8 if_bInterfaceProtocol; */
915 0x00, /* __u8 if_iInterface; */
916
917 /* endpoint */
918 0x07, /* __u8 ep_bLength; */
919 0x05, /* __u8 ep_bDescriptorType; Endpoint */
920 0x81, /* __u8 ep_bEndpointAddress; IN Endpoint 1 */
wdenk42d1f032003-10-15 23:53:47 +0000921 0x03, /* __u8 ep_bmAttributes; Interrupt */
922 0x02, /* __u16 ep_wMaxPacketSize; ((MAX_ROOT_PORTS + 1) / 8 */
923 0x00,
wdenk149dded2003-09-10 18:20:28 +0000924 0xff /* __u8 ep_bInterval; 255 ms */
925};
926
927static unsigned char root_hub_str_index0[] =
928{
929 0x04, /* __u8 bLength; */
930 0x03, /* __u8 bDescriptorType; String-descriptor */
931 0x09, /* __u8 lang ID */
932 0x04, /* __u8 lang ID */
933};
934
935static unsigned char root_hub_str_index1[] =
936{
937 28, /* __u8 bLength; */
938 0x03, /* __u8 bDescriptorType; String-descriptor */
939 'O', /* __u8 Unicode */
940 0, /* __u8 Unicode */
941 'H', /* __u8 Unicode */
942 0, /* __u8 Unicode */
943 'C', /* __u8 Unicode */
944 0, /* __u8 Unicode */
945 'I', /* __u8 Unicode */
946 0, /* __u8 Unicode */
947 ' ', /* __u8 Unicode */
948 0, /* __u8 Unicode */
949 'R', /* __u8 Unicode */
950 0, /* __u8 Unicode */
951 'o', /* __u8 Unicode */
952 0, /* __u8 Unicode */
953 'o', /* __u8 Unicode */
954 0, /* __u8 Unicode */
955 't', /* __u8 Unicode */
956 0, /* __u8 Unicode */
957 ' ', /* __u8 Unicode */
958 0, /* __u8 Unicode */
959 'H', /* __u8 Unicode */
960 0, /* __u8 Unicode */
961 'u', /* __u8 Unicode */
962 0, /* __u8 Unicode */
963 'b', /* __u8 Unicode */
964 0, /* __u8 Unicode */
965};
966
967/* Hub class-specific descriptor is constructed dynamically */
968
969
970/*-------------------------------------------------------------------------*/
971
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200972#define OK(x) len = (x); break
wdenk149dded2003-09-10 18:20:28 +0000973#ifdef DEBUG
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200974#define WR_RH_STAT(x) {info("WR:status %#8x", (x));writel((x), &gohci.regs->roothub.status);}
975#define WR_RH_PORTSTAT(x) {info("WR:portstatus[%d] %#8x", wIndex-1, (x));writel((x), &gohci.regs->roothub.portstatus[wIndex-1]);}
wdenk149dded2003-09-10 18:20:28 +0000976#else
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200977#define WR_RH_STAT(x) writel((x), &gohci.regs->roothub.status)
978#define WR_RH_PORTSTAT(x) writel((x), &gohci.regs->roothub.portstatus[wIndex-1])
wdenk149dded2003-09-10 18:20:28 +0000979#endif
980#define RD_RH_STAT roothub_status(&gohci)
981#define RD_RH_PORTSTAT roothub_portstatus(&gohci,wIndex-1)
982
983/* request to virtual root hub */
984
dzu8a42eac2003-09-29 21:55:54 +0000985int rh_check_port_status(ohci_t *controller)
986{
987 __u32 temp, ndp, i;
988 int res;
989
990 res = -1;
991 temp = roothub_a (controller);
992 ndp = (temp & RH_A_NDP);
993 for (i = 0; i < ndp; i++) {
994 temp = roothub_portstatus (controller, i);
995 /* check for a device disconnect */
996 if (((temp & (RH_PS_PESC | RH_PS_CSC)) ==
997 (RH_PS_PESC | RH_PS_CSC)) &&
998 ((temp & RH_PS_CCS) == 0)) {
999 res = i;
1000 break;
1001 }
1002 }
1003 return res;
1004}
1005
1006static int ohci_submit_rh_msg(struct usb_device *dev, unsigned long pipe,
1007 void *buffer, int transfer_len, struct devrequest *cmd)
wdenk149dded2003-09-10 18:20:28 +00001008{
1009 void * data = buffer;
1010 int leni = transfer_len;
1011 int len = 0;
1012 int stat = 0;
1013 __u32 datab[4];
1014 __u8 *data_buf = (__u8 *)datab;
wdenk42d1f032003-10-15 23:53:47 +00001015 __u16 bmRType_bReq;
wdenk149dded2003-09-10 18:20:28 +00001016 __u16 wValue;
1017 __u16 wIndex;
1018 __u16 wLength;
1019
1020#ifdef DEBUG
1021urb_priv.actual_length = 0;
1022pkt_print(dev, pipe, buffer, transfer_len, cmd, "SUB(rh)", usb_pipein(pipe));
1023#else
1024 wait_ms(1);
1025#endif
Remy Bohmer9dbc3662008-10-10 10:23:22 +02001026 if (usb_pipeint(pipe)) {
wdenk149dded2003-09-10 18:20:28 +00001027 info("Root-Hub submit IRQ: NOT implemented");
1028 return 0;
1029 }
1030
1031 bmRType_bReq = cmd->requesttype | (cmd->request << 8);
1032 wValue = m16_swap (cmd->value);
1033 wIndex = m16_swap (cmd->index);
1034 wLength = m16_swap (cmd->length);
1035
1036 info("Root-Hub: adr: %2x cmd(%1x): %08x %04x %04x %04x",
1037 dev->devnum, 8, bmRType_bReq, wValue, wIndex, wLength);
1038
1039 switch (bmRType_bReq) {
1040 /* Request Destination:
1041 without flags: Device,
1042 RH_INTERFACE: interface,
1043 RH_ENDPOINT: endpoint,
1044 RH_CLASS means HUB here,
1045 RH_OTHER | RH_CLASS almost ever means HUB_PORT here
1046 */
1047
1048 case RH_GET_STATUS:
1049 *(__u16 *) data_buf = m16_swap (1); OK (2);
1050 case RH_GET_STATUS | RH_INTERFACE:
1051 *(__u16 *) data_buf = m16_swap (0); OK (2);
1052 case RH_GET_STATUS | RH_ENDPOINT:
1053 *(__u16 *) data_buf = m16_swap (0); OK (2);
1054 case RH_GET_STATUS | RH_CLASS:
1055 *(__u32 *) data_buf = m32_swap (
1056 RD_RH_STAT & ~(RH_HS_CRWE | RH_HS_DRWE));
1057 OK (4);
1058 case RH_GET_STATUS | RH_OTHER | RH_CLASS:
1059 *(__u32 *) data_buf = m32_swap (RD_RH_PORTSTAT); OK (4);
1060
1061 case RH_CLEAR_FEATURE | RH_ENDPOINT:
1062 switch (wValue) {
1063 case (RH_ENDPOINT_STALL): OK (0);
1064 }
1065 break;
1066
1067 case RH_CLEAR_FEATURE | RH_CLASS:
1068 switch (wValue) {
1069 case RH_C_HUB_LOCAL_POWER:
1070 OK(0);
1071 case (RH_C_HUB_OVER_CURRENT):
1072 WR_RH_STAT(RH_HS_OCIC); OK (0);
1073 }
1074 break;
1075
1076 case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS:
1077 switch (wValue) {
1078 case (RH_PORT_ENABLE):
1079 WR_RH_PORTSTAT (RH_PS_CCS ); OK (0);
1080 case (RH_PORT_SUSPEND):
1081 WR_RH_PORTSTAT (RH_PS_POCI); OK (0);
1082 case (RH_PORT_POWER):
1083 WR_RH_PORTSTAT (RH_PS_LSDA); OK (0);
1084 case (RH_C_PORT_CONNECTION):
1085 WR_RH_PORTSTAT (RH_PS_CSC ); OK (0);
1086 case (RH_C_PORT_ENABLE):
1087 WR_RH_PORTSTAT (RH_PS_PESC); OK (0);
1088 case (RH_C_PORT_SUSPEND):
1089 WR_RH_PORTSTAT (RH_PS_PSSC); OK (0);
1090 case (RH_C_PORT_OVER_CURRENT):
1091 WR_RH_PORTSTAT (RH_PS_OCIC); OK (0);
1092 case (RH_C_PORT_RESET):
1093 WR_RH_PORTSTAT (RH_PS_PRSC); OK (0);
1094 }
1095 break;
1096
1097 case RH_SET_FEATURE | RH_OTHER | RH_CLASS:
1098 switch (wValue) {
1099 case (RH_PORT_SUSPEND):
1100 WR_RH_PORTSTAT (RH_PS_PSS ); OK (0);
1101 case (RH_PORT_RESET): /* BUG IN HUP CODE *********/
1102 if (RD_RH_PORTSTAT & RH_PS_CCS)
1103 WR_RH_PORTSTAT (RH_PS_PRS);
1104 OK (0);
1105 case (RH_PORT_POWER):
1106 WR_RH_PORTSTAT (RH_PS_PPS ); OK (0);
1107 case (RH_PORT_ENABLE): /* BUG IN HUP CODE *********/
1108 if (RD_RH_PORTSTAT & RH_PS_CCS)
1109 WR_RH_PORTSTAT (RH_PS_PES );
1110 OK (0);
1111 }
1112 break;
1113
1114 case RH_SET_ADDRESS: gohci.rh.devnum = wValue; OK(0);
1115
1116 case RH_GET_DESCRIPTOR:
1117 switch ((wValue & 0xff00) >> 8) {
1118 case (0x01): /* device descriptor */
1119 len = min_t(unsigned int,
1120 leni,
1121 min_t(unsigned int,
1122 sizeof (root_hub_dev_des),
1123 wLength));
1124 data_buf = root_hub_dev_des; OK(len);
1125 case (0x02): /* configuration descriptor */
1126 len = min_t(unsigned int,
1127 leni,
1128 min_t(unsigned int,
1129 sizeof (root_hub_config_des),
1130 wLength));
1131 data_buf = root_hub_config_des; OK(len);
1132 case (0x03): /* string descriptors */
1133 if(wValue==0x0300) {
1134 len = min_t(unsigned int,
1135 leni,
1136 min_t(unsigned int,
1137 sizeof (root_hub_str_index0),
1138 wLength));
1139 data_buf = root_hub_str_index0;
1140 OK(len);
1141 }
1142 if(wValue==0x0301) {
1143 len = min_t(unsigned int,
1144 leni,
1145 min_t(unsigned int,
1146 sizeof (root_hub_str_index1),
1147 wLength));
1148 data_buf = root_hub_str_index1;
1149 OK(len);
1150 }
1151 default:
1152 stat = USB_ST_STALLED;
1153 }
1154 break;
1155
1156 case RH_GET_DESCRIPTOR | RH_CLASS:
1157 {
1158 __u32 temp = roothub_a (&gohci);
1159
1160 data_buf [0] = 9; /* min length; */
1161 data_buf [1] = 0x29;
1162 data_buf [2] = temp & RH_A_NDP;
1163 data_buf [3] = 0;
Wolfgang Denk53677ef2008-05-20 16:00:29 +02001164 if (temp & RH_A_PSM) /* per-port power switching? */
wdenk149dded2003-09-10 18:20:28 +00001165 data_buf [3] |= 0x1;
1166 if (temp & RH_A_NOCP) /* no overcurrent reporting? */
1167 data_buf [3] |= 0x10;
1168 else if (temp & RH_A_OCPM) /* per-port overcurrent reporting? */
1169 data_buf [3] |= 0x8;
1170
1171 /* corresponds to data_buf[4-7] */
1172 datab [1] = 0;
1173 data_buf [5] = (temp & RH_A_POTPGT) >> 24;
1174 temp = roothub_b (&gohci);
1175 data_buf [7] = temp & RH_B_DR;
1176 if (data_buf [2] < 7) {
1177 data_buf [8] = 0xff;
1178 } else {
1179 data_buf [0] += 2;
1180 data_buf [8] = (temp & RH_B_DR) >> 8;
1181 data_buf [10] = data_buf [9] = 0xff;
1182 }
1183
1184 len = min_t(unsigned int, leni,
1185 min_t(unsigned int, data_buf [0], wLength));
1186 OK (len);
1187 }
1188
Wolfgang Denk53677ef2008-05-20 16:00:29 +02001189 case RH_GET_CONFIGURATION: *(__u8 *) data_buf = 0x01; OK (1);
wdenk149dded2003-09-10 18:20:28 +00001190
Wolfgang Denk53677ef2008-05-20 16:00:29 +02001191 case RH_SET_CONFIGURATION: WR_RH_STAT (0x10000); OK (0);
wdenk149dded2003-09-10 18:20:28 +00001192
1193 default:
1194 dbg ("unsupported root hub command");
1195 stat = USB_ST_STALLED;
1196 }
1197
1198#ifdef DEBUG
1199 ohci_dump_roothub (&gohci, 1);
1200#else
1201 wait_ms(1);
1202#endif
1203
1204 len = min_t(int, len, leni);
1205 if (data != data_buf)
1206 memcpy (data, data_buf, len);
wdenk42d1f032003-10-15 23:53:47 +00001207 dev->act_len = len;
wdenk149dded2003-09-10 18:20:28 +00001208 dev->status = stat;
1209
1210#ifdef DEBUG
1211 if (transfer_len)
1212 urb_priv.actual_length = transfer_len;
1213 pkt_print(dev, pipe, buffer, transfer_len, cmd, "RET(rh)", 0/*usb_pipein(pipe)*/);
1214#else
1215 wait_ms(1);
1216#endif
1217
1218 return stat;
1219}
1220
1221/*-------------------------------------------------------------------------*/
1222
1223/* common code for handling submit messages - used for all but root hub */
1224/* accesses. */
1225int submit_common_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1226 int transfer_len, struct devrequest *setup, int interval)
1227{
1228 int stat = 0;
1229 int maxsize = usb_maxpacket(dev, pipe);
1230 int timeout;
1231
dzu8a42eac2003-09-29 21:55:54 +00001232 /* device pulled? Shortcut the action. */
1233 if (devgone == dev) {
1234 dev->status = USB_ST_CRC_ERR;
1235 return 0;
1236 }
1237
wdenk149dded2003-09-10 18:20:28 +00001238#ifdef DEBUG
1239 urb_priv.actual_length = 0;
1240 pkt_print(dev, pipe, buffer, transfer_len, setup, "SUB", usb_pipein(pipe));
1241#else
1242 wait_ms(1);
1243#endif
1244 if (!maxsize) {
1245 err("submit_common_message: pipesize for pipe %lx is zero",
1246 pipe);
1247 return -1;
1248 }
1249
1250 if (sohci_submit_job(dev, pipe, buffer, transfer_len, setup, interval) < 0) {
1251 err("sohci_submit_job failed");
1252 return -1;
1253 }
1254
1255 wait_ms(10);
1256 /* ohci_dump_status(&gohci); */
wdenk42d1f032003-10-15 23:53:47 +00001257
wdenka43278a2003-09-11 19:48:06 +00001258 /* allow more time for a BULK device to react - some are slow */
wdenkb0639ca2003-09-17 22:48:07 +00001259#define BULK_TO 5000 /* timeout in milliseconds */
Remy Bohmer9dbc3662008-10-10 10:23:22 +02001260 if (usb_pipebulk(pipe))
wdenka43278a2003-09-11 19:48:06 +00001261 timeout = BULK_TO;
1262 else
1263 timeout = 100;
1264
wdenk149dded2003-09-10 18:20:28 +00001265 /* wait for it to complete */
wdenk149dded2003-09-10 18:20:28 +00001266 for (;;) {
1267 /* check whether the controller is done */
1268 stat = hc_interrupt();
Wolfgang Denk9c998aa2005-07-21 11:57:57 +02001269
wdenk149dded2003-09-10 18:20:28 +00001270 if (stat < 0) {
dzu8a42eac2003-09-29 21:55:54 +00001271 stat = USB_ST_CRC_ERR;
wdenk149dded2003-09-10 18:20:28 +00001272 break;
1273 }
Wolfgang Denk9c998aa2005-07-21 11:57:57 +02001274
1275 /* NOTE: since we are not interrupt driven in U-Boot and always
1276 * handle only one URB at a time, we cannot assume the
1277 * transaction finished on the first successful return from
1278 * hc_interrupt().. unless the flag for current URB is set,
1279 * meaning that all TD's to/from device got actually
1280 * transferred and processed. If the current URB is not
1281 * finished we need to re-iterate this loop so as
1282 * hc_interrupt() gets called again as there needs to be some
1283 * more TD's to process still */
1284 if ((stat >= 0) && (stat != 0xff) && (urb_finished)) {
wdenk149dded2003-09-10 18:20:28 +00001285 /* 0xff is returned for an SF-interrupt */
1286 break;
1287 }
Wolfgang Denk9c998aa2005-07-21 11:57:57 +02001288
wdenk149dded2003-09-10 18:20:28 +00001289 if (--timeout) {
1290 wait_ms(1);
Wolfgang Denk9c998aa2005-07-21 11:57:57 +02001291 if (!urb_finished)
1292 dbg("\%");
Wolfgang Denk095b8a32005-08-02 17:06:17 +02001293
wdenk149dded2003-09-10 18:20:28 +00001294 } else {
dzu8a42eac2003-09-29 21:55:54 +00001295 err("CTL:TIMEOUT ");
Wolfgang Denk9c998aa2005-07-21 11:57:57 +02001296 dbg("submit_common_msg: TO status %x\n", stat);
dzu8a42eac2003-09-29 21:55:54 +00001297 stat = USB_ST_CRC_ERR;
Wolfgang Denk9c998aa2005-07-21 11:57:57 +02001298 urb_finished = 1;
wdenk149dded2003-09-10 18:20:28 +00001299 break;
1300 }
1301 }
Wolfgang Denk9c998aa2005-07-21 11:57:57 +02001302
1303#if 0
dzu8a42eac2003-09-29 21:55:54 +00001304 /* we got an Root Hub Status Change interrupt */
1305 if (got_rhsc) {
1306#ifdef DEBUG
1307 ohci_dump_roothub (&gohci, 1);
1308#endif
1309 got_rhsc = 0;
1310 /* abuse timeout */
1311 timeout = rh_check_port_status(&gohci);
1312 if (timeout >= 0) {
1313#if 0 /* this does nothing useful, but leave it here in case that changes */
1314 /* the called routine adds 1 to the passed value */
1315 usb_hub_port_connect_change(gohci.rh.dev, timeout - 1);
1316#endif
1317 /*
1318 * XXX
1319 * This is potentially dangerous because it assumes
1320 * that only one device is ever plugged in!
1321 */
1322 devgone = dev;
1323 }
1324 }
Wolfgang Denk9c998aa2005-07-21 11:57:57 +02001325#endif
dzu8a42eac2003-09-29 21:55:54 +00001326
wdenk149dded2003-09-10 18:20:28 +00001327 dev->status = stat;
wdenk42d1f032003-10-15 23:53:47 +00001328 dev->act_len = transfer_len;
wdenk149dded2003-09-10 18:20:28 +00001329
1330#ifdef DEBUG
1331 pkt_print(dev, pipe, buffer, transfer_len, setup, "RET(ctlr)", usb_pipein(pipe));
1332#else
1333 wait_ms(1);
1334#endif
1335
1336 /* free TDs in urb_priv */
1337 urb_free_priv (&urb_priv);
1338 return 0;
1339}
1340
1341/* submit routines called from usb.c */
1342int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1343 int transfer_len)
1344{
1345 info("submit_bulk_msg");
1346 return submit_common_msg(dev, pipe, buffer, transfer_len, NULL, 0);
1347}
1348
1349int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1350 int transfer_len, struct devrequest *setup)
1351{
1352 int maxsize = usb_maxpacket(dev, pipe);
1353
1354 info("submit_control_msg");
1355#ifdef DEBUG
1356 urb_priv.actual_length = 0;
1357 pkt_print(dev, pipe, buffer, transfer_len, setup, "SUB", usb_pipein(pipe));
1358#else
1359 wait_ms(1);
1360#endif
1361 if (!maxsize) {
1362 err("submit_control_message: pipesize for pipe %lx is zero",
1363 pipe);
1364 return -1;
1365 }
dzu8a42eac2003-09-29 21:55:54 +00001366 if (((pipe >> 8) & 0x7f) == gohci.rh.devnum) {
1367 gohci.rh.dev = dev;
wdenk149dded2003-09-10 18:20:28 +00001368 /* root hub - redirect */
1369 return ohci_submit_rh_msg(dev, pipe, buffer, transfer_len,
1370 setup);
dzu8a42eac2003-09-29 21:55:54 +00001371 }
wdenk149dded2003-09-10 18:20:28 +00001372
1373 return submit_common_msg(dev, pipe, buffer, transfer_len, setup, 0);
1374}
1375
1376int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1377 int transfer_len, int interval)
1378{
1379 info("submit_int_msg");
1380 return -1;
1381}
1382
1383/*-------------------------------------------------------------------------*
1384 * HC functions
1385 *-------------------------------------------------------------------------*/
1386
1387/* reset the HC and BUS */
1388
1389static int hc_reset (ohci_t *ohci)
1390{
1391 int timeout = 30;
1392 int smm_timeout = 50; /* 0,5 sec */
1393
1394 if (readl (&ohci->regs->control) & OHCI_CTRL_IR) { /* SMM owns the HC */
1395 writel (OHCI_OCR, &ohci->regs->cmdstatus); /* request ownership */
1396 info("USB HC TakeOver from SMM");
1397 while (readl (&ohci->regs->control) & OHCI_CTRL_IR) {
1398 wait_ms (10);
1399 if (--smm_timeout == 0) {
1400 err("USB HC TakeOver failed!");
1401 return -1;
1402 }
1403 }
1404 }
1405
1406 /* Disable HC interrupts */
1407 writel (OHCI_INTR_MIE, &ohci->regs->intrdisable);
1408
1409 dbg("USB HC reset_hc usb-%s: ctrl = 0x%X ;",
1410 ohci->slot_name,
1411 readl (&ohci->regs->control));
1412
wdenk42d1f032003-10-15 23:53:47 +00001413 /* Reset USB (needed by some controllers) */
wdenk149dded2003-09-10 18:20:28 +00001414 writel (0, &ohci->regs->control);
1415
1416 /* HC Reset requires max 10 us delay */
1417 writel (OHCI_HCR, &ohci->regs->cmdstatus);
1418 while ((readl (&ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
1419 if (--timeout == 0) {
1420 err("USB HC reset timed out!");
1421 return -1;
1422 }
1423 udelay (1);
1424 }
1425 return 0;
1426}
1427
1428/*-------------------------------------------------------------------------*/
1429
1430/* Start an OHCI controller, set the BUS operational
1431 * enable interrupts
1432 * connect the virtual root hub */
1433
1434static int hc_start (ohci_t * ohci)
1435{
wdenk42d1f032003-10-15 23:53:47 +00001436 __u32 mask;
1437 unsigned int fminterval;
wdenk149dded2003-09-10 18:20:28 +00001438
1439 ohci->disabled = 1;
1440
1441 /* Tell the controller where the control and bulk lists are
1442 * The lists are empty now. */
1443
1444 writel (0, &ohci->regs->ed_controlhead);
1445 writel (0, &ohci->regs->ed_bulkhead);
1446
1447 writel ((__u32)ohci->hcca, &ohci->regs->hcca); /* a reset clears this */
1448
wdenk42d1f032003-10-15 23:53:47 +00001449 fminterval = 0x2edf;
wdenk149dded2003-09-10 18:20:28 +00001450 writel ((fminterval * 9) / 10, &ohci->regs->periodicstart);
1451 fminterval |= ((((fminterval - 210) * 6) / 7) << 16);
1452 writel (fminterval, &ohci->regs->fminterval);
1453 writel (0x628, &ohci->regs->lsthresh);
1454
wdenk42d1f032003-10-15 23:53:47 +00001455 /* start controller operations */
1456 ohci->hc_control = OHCI_CONTROL_INIT | OHCI_USB_OPER;
wdenk149dded2003-09-10 18:20:28 +00001457 ohci->disabled = 0;
wdenk42d1f032003-10-15 23:53:47 +00001458 writel (ohci->hc_control, &ohci->regs->control);
wdenk149dded2003-09-10 18:20:28 +00001459
dzu8a42eac2003-09-29 21:55:54 +00001460 /* disable all interrupts */
1461 mask = (OHCI_INTR_SO | OHCI_INTR_WDH | OHCI_INTR_SF | OHCI_INTR_RD |
1462 OHCI_INTR_UE | OHCI_INTR_FNO | OHCI_INTR_RHSC |
1463 OHCI_INTR_OC | OHCI_INTR_MIE);
1464 writel (mask, &ohci->regs->intrdisable);
1465 /* clear all interrupts */
1466 mask &= ~OHCI_INTR_MIE;
wdenk149dded2003-09-10 18:20:28 +00001467 writel (mask, &ohci->regs->intrstatus);
dzu8a42eac2003-09-29 21:55:54 +00001468 /* Choose the interrupts we care about now - but w/o MIE */
1469 mask = OHCI_INTR_RHSC | OHCI_INTR_UE | OHCI_INTR_WDH | OHCI_INTR_SO;
1470 writel (mask, &ohci->regs->intrenable);
wdenk149dded2003-09-10 18:20:28 +00001471
1472#ifdef OHCI_USE_NPS
1473 /* required for AMD-756 and some Mac platforms */
1474 writel ((roothub_a (ohci) | RH_A_NPS) & ~RH_A_PSM,
1475 &ohci->regs->roothub.a);
1476 writel (RH_HS_LPSC, &ohci->regs->roothub.status);
1477#endif /* OHCI_USE_NPS */
1478
1479#define mdelay(n) ({unsigned long msec=(n); while (msec--) udelay(1000);})
1480 /* POTPGT delay is bits 24-31, in 2 ms units. */
1481 mdelay ((roothub_a (ohci) >> 23) & 0x1fe);
1482
1483 /* connect the virtual root hub */
1484 ohci->rh.devnum = 0;
1485
1486 return 0;
1487}
1488
1489/*-------------------------------------------------------------------------*/
1490
1491/* an interrupt happens */
1492
1493static int
1494hc_interrupt (void)
1495{
1496 ohci_t *ohci = &gohci;
1497 struct ohci_regs *regs = ohci->regs;
wdenk42d1f032003-10-15 23:53:47 +00001498 int ints;
wdenk149dded2003-09-10 18:20:28 +00001499 int stat = -1;
1500
Wolfgang Denk9c998aa2005-07-21 11:57:57 +02001501 if ((ohci->hcca->done_head != 0) &&
1502 !(m32_swap (ohci->hcca->done_head) & 0x01)) {
1503
wdenk149dded2003-09-10 18:20:28 +00001504 ints = OHCI_INTR_WDH;
Wolfgang Denk9c998aa2005-07-21 11:57:57 +02001505
1506 } else if ((ints = readl (&regs->intrstatus)) == ~(u32)0) {
1507 ohci->disabled++;
1508 err ("%s device removed!", ohci->slot_name);
1509 return -1;
Wolfgang Denk095b8a32005-08-02 17:06:17 +02001510
Wolfgang Denk9c998aa2005-07-21 11:57:57 +02001511 } else if ((ints &= readl (&regs->intrenable)) == 0) {
1512 dbg("hc_interrupt: returning..\n");
1513 return 0xff;
wdenk149dded2003-09-10 18:20:28 +00001514 }
1515
1516 /* dbg("Interrupt: %x frame: %x", ints, le16_to_cpu (ohci->hcca->frame_no)); */
1517
dzu8a42eac2003-09-29 21:55:54 +00001518 if (ints & OHCI_INTR_RHSC) {
1519 got_rhsc = 1;
Wolfgang Denk9c998aa2005-07-21 11:57:57 +02001520 stat = 0xff;
dzu8a42eac2003-09-29 21:55:54 +00001521 }
1522
wdenk149dded2003-09-10 18:20:28 +00001523 if (ints & OHCI_INTR_UE) {
1524 ohci->disabled++;
1525 err ("OHCI Unrecoverable Error, controller usb-%s disabled",
1526 ohci->slot_name);
1527 /* e.g. due to PCI Master/Target Abort */
1528
1529#ifdef DEBUG
1530 ohci_dump (ohci, 1);
1531#else
1532 wait_ms(1);
1533#endif
1534 /* FIXME: be optimistic, hope that bug won't repeat often. */
1535 /* Make some non-interrupt context restart the controller. */
1536 /* Count and limit the retries though; either hardware or */
1537 /* software errors can go forever... */
1538 hc_reset (ohci);
1539 return -1;
1540 }
1541
1542 if (ints & OHCI_INTR_WDH) {
1543 wait_ms(1);
Wolfgang Denk9c998aa2005-07-21 11:57:57 +02001544
wdenk149dded2003-09-10 18:20:28 +00001545 writel (OHCI_INTR_WDH, &regs->intrdisable);
1546 stat = dl_done_list (&gohci, dl_reverse_done_list (&gohci));
1547 writel (OHCI_INTR_WDH, &regs->intrenable);
1548 }
1549
1550 if (ints & OHCI_INTR_SO) {
1551 dbg("USB Schedule overrun\n");
1552 writel (OHCI_INTR_SO, &regs->intrenable);
1553 stat = -1;
1554 }
1555
1556 /* FIXME: this assumes SOF (1/ms) interrupts don't get lost... */
1557 if (ints & OHCI_INTR_SF) {
1558 unsigned int frame = m16_swap (ohci->hcca->frame_no) & 1;
1559 wait_ms(1);
1560 writel (OHCI_INTR_SF, &regs->intrdisable);
1561 if (ohci->ed_rm_list[frame] != NULL)
1562 writel (OHCI_INTR_SF, &regs->intrenable);
1563 stat = 0xff;
1564 }
1565
1566 writel (ints, &regs->intrstatus);
1567 return stat;
1568}
1569
1570/*-------------------------------------------------------------------------*/
1571
1572/*-------------------------------------------------------------------------*/
1573
1574/* De-allocate all resources.. */
1575
1576static void hc_release_ohci (ohci_t *ohci)
1577{
1578 dbg ("USB HC release ohci usb-%s", ohci->slot_name);
1579
1580 if (!ohci->disabled)
1581 hc_reset (ohci);
1582}
1583
1584/*-------------------------------------------------------------------------*/
1585
1586/*
1587 * low level initalisation routine, called from usb.c
1588 */
1589static char ohci_inited = 0;
1590
1591int usb_lowlevel_init(void)
1592{
1593 S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER();
1594 S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
1595
wdenk42d1f032003-10-15 23:53:47 +00001596 /*
1597 * Set the 48 MHz UPLL clocking. Values are taken from
1598 * "PLL value selection guide", 6-23, s3c2400_UM.pdf.
1599 */
1600 clk_power->UPLLCON = ((40 << 12) + (1 << 4) + 2);
1601 gpio->MISCCR |= 0x8; /* 1 = use pads related USB for USB host */
wdenk149dded2003-09-10 18:20:28 +00001602
wdenk42d1f032003-10-15 23:53:47 +00001603 /*
1604 * Enable USB host clock.
1605 */
1606 clk_power->CLKCON |= (1 << 4);
wdenk149dded2003-09-10 18:20:28 +00001607
1608 memset (&gohci, 0, sizeof (ohci_t));
1609 memset (&urb_priv, 0, sizeof (urb_priv_t));
1610
1611 /* align the storage */
1612 if ((__u32)&ghcca[0] & 0xff) {
1613 err("HCCA not aligned!!");
1614 return -1;
1615 }
1616 phcca = &ghcca[0];
1617 info("aligned ghcca %p", phcca);
1618 memset(&ohci_dev, 0, sizeof(struct ohci_device));
1619 if ((__u32)&ohci_dev.ed[0] & 0x7) {
1620 err("EDs not aligned!!");
1621 return -1;
1622 }
1623 memset(gtd, 0, sizeof(td_t) * (NUM_TD + 1));
1624 if ((__u32)gtd & 0x7) {
1625 err("TDs not aligned!!");
1626 return -1;
1627 }
1628 ptd = gtd;
1629 gohci.hcca = phcca;
wdenk42d1f032003-10-15 23:53:47 +00001630 memset (phcca, 0, sizeof (struct ohci_hcca));
wdenk149dded2003-09-10 18:20:28 +00001631
1632 gohci.disabled = 1;
1633 gohci.sleeping = 0;
1634 gohci.irq = -1;
1635 gohci.regs = (struct ohci_regs *)S3C24X0_USB_HOST_BASE;
1636
1637 gohci.flags = 0;
1638 gohci.slot_name = "s3c2400";
1639
1640 if (hc_reset (&gohci) < 0) {
1641 hc_release_ohci (&gohci);
wdenk42d1f032003-10-15 23:53:47 +00001642 /* Initialization failed */
1643 clk_power->CLKCON &= ~(1 << 4);
wdenk149dded2003-09-10 18:20:28 +00001644 return -1;
1645 }
1646
1647 /* FIXME this is a second HC reset; why?? */
Wolfgang Denkd2ed2f62006-03-11 23:07:09 +01001648 gohci.hc_control = OHCI_USB_RESET;
1649 writel (gohci.hc_control, &gohci.regs->control);
wdenk149dded2003-09-10 18:20:28 +00001650 wait_ms (10);
1651
1652 if (hc_start (&gohci) < 0) {
1653 err ("can't start usb-%s", gohci.slot_name);
1654 hc_release_ohci (&gohci);
wdenk42d1f032003-10-15 23:53:47 +00001655 /* Initialization failed */
1656 clk_power->CLKCON &= ~(1 << 4);
wdenk149dded2003-09-10 18:20:28 +00001657 return -1;
1658 }
1659
1660#ifdef DEBUG
1661 ohci_dump (&gohci, 1);
1662#else
1663 wait_ms(1);
1664#endif
1665 ohci_inited = 1;
Wolfgang Denk9c998aa2005-07-21 11:57:57 +02001666 urb_finished = 1;
1667
wdenk149dded2003-09-10 18:20:28 +00001668 return 0;
1669}
1670
1671int usb_lowlevel_stop(void)
1672{
1673 S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER();
1674
1675 /* this gets called really early - before the controller has */
1676 /* even been initialized! */
1677 if (!ohci_inited)
1678 return 0;
1679 /* TODO release any interrupts, etc. */
1680 /* call hc_release_ohci() here ? */
1681 hc_reset (&gohci);
1682 /* may not want to do this */
1683 clk_power->CLKCON &= ~(1 << 4);
1684 return 0;
1685}
1686
1687#endif /* CONFIG_USB_OHCI */