blob: 3267c5de36d1b12a190f93f9a3048ded598f84aa [file] [log] [blame]
wdenk5653fc32004-02-08 22:55:38 +00001/*
wdenkbf9e3b32004-02-12 00:47:09 +00002 * (C) Copyright 2002-2004
wdenk5653fc32004-02-08 22:55:38 +00003 * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
4 *
5 * Copyright (C) 2003 Arabella Software Ltd.
6 * Yuli Barcohen <yuli@arabellasw.com>
wdenk5653fc32004-02-08 22:55:38 +00007 *
wdenkbf9e3b32004-02-12 00:47:09 +00008 * Copyright (C) 2004
9 * Ed Okerson
Stefan Roese260421a2006-11-13 13:55:24 +010010 *
11 * Copyright (C) 2006
12 * Tolunay Orkun <listmember@orkun.us>
wdenkbf9e3b32004-02-12 00:47:09 +000013 *
wdenk5653fc32004-02-08 22:55:38 +000014 * See file CREDITS for list of people who contributed to this
15 * project.
16 *
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation; either version 2 of
20 * the License, or (at your option) any later version.
21 *
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
26 *
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30 * MA 02111-1307 USA
31 *
wdenk5653fc32004-02-08 22:55:38 +000032 */
33
34/* The DEBUG define must be before common to enable debugging */
wdenk2d1a5372004-02-23 19:30:57 +000035/* #define DEBUG */
36
wdenk5653fc32004-02-08 22:55:38 +000037#include <common.h>
38#include <asm/processor.h>
Haiying Wang3a197b22007-02-21 16:52:31 +010039#include <asm/io.h>
wdenk4c0d4c32004-06-09 17:34:58 +000040#include <asm/byteorder.h>
wdenk2a8af182005-04-13 10:02:42 +000041#include <environment.h>
Stefan Roesefa36ae72009-10-27 15:15:55 +010042#include <mtd/cfi_flash.h>
wdenk028ab6b2004-02-23 23:54:43 +000043
wdenk5653fc32004-02-08 22:55:38 +000044/*
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +010045 * This file implements a Common Flash Interface (CFI) driver for
46 * U-Boot.
47 *
48 * The width of the port and the width of the chips are determined at
49 * initialization. These widths are used to calculate the address for
50 * access CFI data structures.
wdenk5653fc32004-02-08 22:55:38 +000051 *
52 * References
53 * JEDEC Standard JESD68 - Common Flash Interface (CFI)
54 * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
55 * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
56 * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
Stefan Roese260421a2006-11-13 13:55:24 +010057 * AMD CFI Specification, Release 2.0 December 1, 2001
58 * AMD/Spansion Application Note: Migration from Single-byte to Three-byte
59 * Device IDs, Publication Number 25538 Revision A, November 8, 2001
wdenk5653fc32004-02-08 22:55:38 +000060 *
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020061 * Define CONFIG_SYS_WRITE_SWAPPED_DATA, if you have to swap the Bytes between
Heiko Schocherd0b6e142007-01-19 18:05:26 +010062 * reading and writing ... (yes there is such a Hardware).
wdenk5653fc32004-02-08 22:55:38 +000063 */
64
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020065#ifndef CONFIG_SYS_FLASH_BANKS_LIST
66#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
wdenkbf9e3b32004-02-12 00:47:09 +000067#endif
68
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +010069static uint flash_offset_cfi[2] = { FLASH_OFFSET_CFI, FLASH_OFFSET_CFI_ALT };
Piotr Ziecik6ea808e2008-11-17 15:49:32 +010070static uint flash_verbose = 1;
Wolfgang Denk92eb7292006-12-27 01:26:13 +010071
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020072/* use CONFIG_SYS_MAX_FLASH_BANKS_DETECT if defined */
73#ifdef CONFIG_SYS_MAX_FLASH_BANKS_DETECT
74# define CFI_MAX_FLASH_BANKS CONFIG_SYS_MAX_FLASH_BANKS_DETECT
Marian Balakowicze6f2e902005-10-11 19:09:42 +020075#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020076# define CFI_MAX_FLASH_BANKS CONFIG_SYS_MAX_FLASH_BANKS
Marian Balakowicze6f2e902005-10-11 19:09:42 +020077#endif
wdenk5653fc32004-02-08 22:55:38 +000078
Wolfgang Denk2a112b22008-08-08 16:39:54 +020079flash_info_t flash_info[CFI_MAX_FLASH_BANKS]; /* FLASH chips info */
80
Stefan Roese79b4cda2006-02-28 15:29:58 +010081/*
82 * Check if chip width is defined. If not, start detecting with 8bit.
83 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020084#ifndef CONFIG_SYS_FLASH_CFI_WIDTH
85#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
Stefan Roese79b4cda2006-02-28 15:29:58 +010086#endif
87
Stefan Roese45aa5a72008-11-17 14:45:22 +010088static void __flash_write8(u8 value, void *addr)
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +010089{
90 __raw_writeb(value, addr);
91}
92
Stefan Roese45aa5a72008-11-17 14:45:22 +010093static void __flash_write16(u16 value, void *addr)
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +010094{
95 __raw_writew(value, addr);
96}
97
Stefan Roese45aa5a72008-11-17 14:45:22 +010098static void __flash_write32(u32 value, void *addr)
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +010099{
100 __raw_writel(value, addr);
101}
102
Stefan Roese45aa5a72008-11-17 14:45:22 +0100103static void __flash_write64(u64 value, void *addr)
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100104{
105 /* No architectures currently implement __raw_writeq() */
106 *(volatile u64 *)addr = value;
107}
108
Stefan Roese45aa5a72008-11-17 14:45:22 +0100109static u8 __flash_read8(void *addr)
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100110{
111 return __raw_readb(addr);
112}
113
Stefan Roese45aa5a72008-11-17 14:45:22 +0100114static u16 __flash_read16(void *addr)
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100115{
116 return __raw_readw(addr);
117}
118
Stefan Roese45aa5a72008-11-17 14:45:22 +0100119static u32 __flash_read32(void *addr)
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100120{
121 return __raw_readl(addr);
122}
123
Daniel Hellstrom97bf85d2008-03-28 20:40:19 +0100124static u64 __flash_read64(void *addr)
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100125{
126 /* No architectures currently implement __raw_readq() */
127 return *(volatile u64 *)addr;
128}
129
Stefan Roese45aa5a72008-11-17 14:45:22 +0100130#ifdef CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
131void flash_write8(u8 value, void *addr)__attribute__((weak, alias("__flash_write8")));
132void flash_write16(u16 value, void *addr)__attribute__((weak, alias("__flash_write16")));
133void flash_write32(u32 value, void *addr)__attribute__((weak, alias("__flash_write32")));
134void flash_write64(u64 value, void *addr)__attribute__((weak, alias("__flash_write64")));
135u8 flash_read8(void *addr)__attribute__((weak, alias("__flash_read8")));
136u16 flash_read16(void *addr)__attribute__((weak, alias("__flash_read16")));
137u32 flash_read32(void *addr)__attribute__((weak, alias("__flash_read32")));
Daniel Hellstrom97bf85d2008-03-28 20:40:19 +0100138u64 flash_read64(void *addr)__attribute__((weak, alias("__flash_read64")));
Stefan Roese45aa5a72008-11-17 14:45:22 +0100139#else
140#define flash_write8 __flash_write8
141#define flash_write16 __flash_write16
142#define flash_write32 __flash_write32
143#define flash_write64 __flash_write64
144#define flash_read8 __flash_read8
145#define flash_read16 __flash_read16
146#define flash_read32 __flash_read32
147#define flash_read64 __flash_read64
148#endif
Daniel Hellstrom97bf85d2008-03-28 20:40:19 +0100149
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200150/*-----------------------------------------------------------------------
151 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200152#if defined(CONFIG_ENV_IS_IN_FLASH) || defined(CONFIG_ENV_ADDR_REDUND) || (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE)
Heiko Schocher4f975672009-02-10 09:53:29 +0100153flash_info_t *flash_get_info(ulong base)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200154{
155 int i;
156 flash_info_t * info = 0;
157
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200158 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200159 info = & flash_info[i];
160 if (info->size && info->start[0] <= base &&
161 base <= info->start[0] + info->size - 1)
162 break;
163 }
164
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200165 return i == CONFIG_SYS_MAX_FLASH_BANKS ? 0 : info;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200166}
wdenk5653fc32004-02-08 22:55:38 +0000167#endif
168
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100169unsigned long flash_sector_size(flash_info_t *info, flash_sect_t sect)
170{
171 if (sect != (info->sector_count - 1))
172 return info->start[sect + 1] - info->start[sect];
173 else
174 return info->start[0] + info->size - info->start[sect];
175}
176
wdenk5653fc32004-02-08 22:55:38 +0000177/*-----------------------------------------------------------------------
178 * create an address based on the offset and the port width
179 */
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100180static inline void *
181flash_map (flash_info_t * info, flash_sect_t sect, uint offset)
wdenk5653fc32004-02-08 22:55:38 +0000182{
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100183 unsigned int byte_offset = offset * info->portwidth;
184
Becky Bruce09ce9922009-02-02 16:34:51 -0600185 return (void *)(info->start[sect] + byte_offset);
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100186}
187
188static inline void flash_unmap(flash_info_t *info, flash_sect_t sect,
189 unsigned int offset, void *addr)
190{
wdenk5653fc32004-02-08 22:55:38 +0000191}
wdenkbf9e3b32004-02-12 00:47:09 +0000192
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200193/*-----------------------------------------------------------------------
194 * make a proper sized command based on the port and chip widths
195 */
Sebastian Siewior7288f972008-07-15 13:35:23 +0200196static void flash_make_cmd(flash_info_t *info, u32 cmd, void *cmdbuf)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200197{
198 int i;
Vasiliy Leoenenko93c56f22008-05-07 21:24:44 +0400199 int cword_offset;
200 int cp_offset;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200201#if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Sebastian Siewior340ccb22008-07-16 20:04:49 +0200202 u32 cmd_le = cpu_to_le32(cmd);
203#endif
Vasiliy Leoenenko93c56f22008-05-07 21:24:44 +0400204 uchar val;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200205 uchar *cp = (uchar *) cmdbuf;
206
Vasiliy Leoenenko93c56f22008-05-07 21:24:44 +0400207 for (i = info->portwidth; i > 0; i--){
208 cword_offset = (info->portwidth-i)%info->chipwidth;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200209#if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Vasiliy Leoenenko93c56f22008-05-07 21:24:44 +0400210 cp_offset = info->portwidth - i;
Sebastian Siewior340ccb22008-07-16 20:04:49 +0200211 val = *((uchar*)&cmd_le + cword_offset);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200212#else
Vasiliy Leoenenko93c56f22008-05-07 21:24:44 +0400213 cp_offset = i - 1;
Sebastian Siewior7288f972008-07-15 13:35:23 +0200214 val = *((uchar*)&cmd + sizeof(u32) - cword_offset - 1);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200215#endif
Sebastian Siewior7288f972008-07-15 13:35:23 +0200216 cp[cp_offset] = (cword_offset >= sizeof(u32)) ? 0x00 : val;
Vasiliy Leoenenko93c56f22008-05-07 21:24:44 +0400217 }
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200218}
219
wdenkbf9e3b32004-02-12 00:47:09 +0000220#ifdef DEBUG
221/*-----------------------------------------------------------------------
222 * Debug support
223 */
Haavard Skinnemoen30557932007-12-13 12:56:29 +0100224static void print_longlong (char *str, unsigned long long data)
wdenkbf9e3b32004-02-12 00:47:09 +0000225{
226 int i;
227 char *cp;
228
Wolfgang Denk657f2062009-02-04 09:42:20 +0100229 cp = (char *) &data;
wdenkbf9e3b32004-02-12 00:47:09 +0000230 for (i = 0; i < 8; i++)
231 sprintf (&str[i * 2], "%2.2x", *cp++);
232}
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200233
Haavard Skinnemoene23741f2007-12-14 15:36:16 +0100234static void flash_printqry (struct cfi_qry *qry)
wdenkbf9e3b32004-02-12 00:47:09 +0000235{
Haavard Skinnemoene23741f2007-12-14 15:36:16 +0100236 u8 *p = (u8 *)qry;
wdenkbf9e3b32004-02-12 00:47:09 +0000237 int x, y;
238
Haavard Skinnemoene23741f2007-12-14 15:36:16 +0100239 for (x = 0; x < sizeof(struct cfi_qry); x += 16) {
240 debug("%02x : ", x);
241 for (y = 0; y < 16; y++)
242 debug("%2.2x ", p[x + y]);
243 debug(" ");
wdenkbf9e3b32004-02-12 00:47:09 +0000244 for (y = 0; y < 16; y++) {
Haavard Skinnemoene23741f2007-12-14 15:36:16 +0100245 unsigned char c = p[x + y];
246 if (c >= 0x20 && c <= 0x7e)
247 debug("%c", c);
248 else
249 debug(".");
wdenkbf9e3b32004-02-12 00:47:09 +0000250 }
Haavard Skinnemoene23741f2007-12-14 15:36:16 +0100251 debug("\n");
wdenkbf9e3b32004-02-12 00:47:09 +0000252 }
253}
wdenkbf9e3b32004-02-12 00:47:09 +0000254#endif
255
256
wdenk5653fc32004-02-08 22:55:38 +0000257/*-----------------------------------------------------------------------
258 * read a character at a port width address
259 */
Haavard Skinnemoen30557932007-12-13 12:56:29 +0100260static inline uchar flash_read_uchar (flash_info_t * info, uint offset)
wdenk5653fc32004-02-08 22:55:38 +0000261{
262 uchar *cp;
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100263 uchar retval;
wdenkbf9e3b32004-02-12 00:47:09 +0000264
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100265 cp = flash_map (info, 0, offset);
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200266#if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100267 retval = flash_read8(cp);
wdenkbf9e3b32004-02-12 00:47:09 +0000268#else
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100269 retval = flash_read8(cp + info->portwidth - 1);
wdenkbf9e3b32004-02-12 00:47:09 +0000270#endif
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100271 flash_unmap (info, 0, offset, cp);
272 return retval;
wdenk5653fc32004-02-08 22:55:38 +0000273}
274
275/*-----------------------------------------------------------------------
Tor Krill90447ec2008-03-28 11:29:10 +0100276 * read a word at a port width address, assume 16bit bus
277 */
278static inline ushort flash_read_word (flash_info_t * info, uint offset)
279{
280 ushort *addr, retval;
281
282 addr = flash_map (info, 0, offset);
283 retval = flash_read16 (addr);
284 flash_unmap (info, 0, offset, addr);
285 return retval;
286}
287
288
289/*-----------------------------------------------------------------------
Stefan Roese260421a2006-11-13 13:55:24 +0100290 * read a long word by picking the least significant byte of each maximum
wdenk5653fc32004-02-08 22:55:38 +0000291 * port size word. Swap for ppc format.
292 */
Haavard Skinnemoen30557932007-12-13 12:56:29 +0100293static ulong flash_read_long (flash_info_t * info, flash_sect_t sect,
294 uint offset)
wdenk5653fc32004-02-08 22:55:38 +0000295{
wdenkbf9e3b32004-02-12 00:47:09 +0000296 uchar *addr;
297 ulong retval;
wdenk5653fc32004-02-08 22:55:38 +0000298
wdenkbf9e3b32004-02-12 00:47:09 +0000299#ifdef DEBUG
300 int x;
301#endif
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100302 addr = flash_map (info, sect, offset);
wdenkbf9e3b32004-02-12 00:47:09 +0000303
304#ifdef DEBUG
305 debug ("long addr is at %p info->portwidth = %d\n", addr,
306 info->portwidth);
307 for (x = 0; x < 4 * info->portwidth; x++) {
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100308 debug ("addr[%x] = 0x%x\n", x, flash_read8(addr + x));
wdenkbf9e3b32004-02-12 00:47:09 +0000309 }
310#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200311#if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100312 retval = ((flash_read8(addr) << 16) |
313 (flash_read8(addr + info->portwidth) << 24) |
314 (flash_read8(addr + 2 * info->portwidth)) |
315 (flash_read8(addr + 3 * info->portwidth) << 8));
wdenkbf9e3b32004-02-12 00:47:09 +0000316#else
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100317 retval = ((flash_read8(addr + 2 * info->portwidth - 1) << 24) |
318 (flash_read8(addr + info->portwidth - 1) << 16) |
319 (flash_read8(addr + 4 * info->portwidth - 1) << 8) |
320 (flash_read8(addr + 3 * info->portwidth - 1)));
wdenkbf9e3b32004-02-12 00:47:09 +0000321#endif
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100322 flash_unmap(info, sect, offset, addr);
323
wdenkbf9e3b32004-02-12 00:47:09 +0000324 return retval;
wdenk5653fc32004-02-08 22:55:38 +0000325}
326
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200327/*
328 * Write a proper sized command to the correct address
329 */
Stefan Roesefa36ae72009-10-27 15:15:55 +0100330void flash_write_cmd (flash_info_t * info, flash_sect_t sect,
331 uint offset, u32 cmd)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200332{
Stefan Roese79b4cda2006-02-28 15:29:58 +0100333
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100334 void *addr;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200335 cfiword_t cword;
336
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100337 addr = flash_map (info, sect, offset);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200338 flash_make_cmd (info, cmd, &cword);
339 switch (info->portwidth) {
340 case FLASH_CFI_8BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100341 debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr, cmd,
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200342 cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100343 flash_write8(cword.c, addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200344 break;
345 case FLASH_CFI_16BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100346 debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr,
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200347 cmd, cword.w,
348 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100349 flash_write16(cword.w, addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200350 break;
351 case FLASH_CFI_32BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100352 debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr,
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200353 cmd, cword.l,
354 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100355 flash_write32(cword.l, addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200356 break;
357 case FLASH_CFI_64BIT:
358#ifdef DEBUG
359 {
360 char str[20];
361
362 print_longlong (str, cword.ll);
363
364 debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100365 addr, cmd, str,
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200366 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
367 }
368#endif
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100369 flash_write64(cword.ll, addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200370 break;
371 }
372
373 /* Ensure all the instructions are fully finished */
374 sync();
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100375
376 flash_unmap(info, sect, offset, addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200377}
378
379static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect)
380{
381 flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_UNLOCK_START);
382 flash_write_cmd (info, sect, info->addr_unlock2, AMD_CMD_UNLOCK_ACK);
383}
384
385/*-----------------------------------------------------------------------
386 */
387static int flash_isequal (flash_info_t * info, flash_sect_t sect,
388 uint offset, uchar cmd)
389{
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100390 void *addr;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200391 cfiword_t cword;
392 int retval;
393
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100394 addr = flash_map (info, sect, offset);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200395 flash_make_cmd (info, cmd, &cword);
396
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100397 debug ("is= cmd %x(%c) addr %p ", cmd, cmd, addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200398 switch (info->portwidth) {
399 case FLASH_CFI_8BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100400 debug ("is= %x %x\n", flash_read8(addr), cword.c);
401 retval = (flash_read8(addr) == cword.c);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200402 break;
403 case FLASH_CFI_16BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100404 debug ("is= %4.4x %4.4x\n", flash_read16(addr), cword.w);
405 retval = (flash_read16(addr) == cword.w);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200406 break;
407 case FLASH_CFI_32BIT:
Andrew Klossner52514692008-08-21 07:12:26 -0700408 debug ("is= %8.8x %8.8lx\n", flash_read32(addr), cword.l);
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100409 retval = (flash_read32(addr) == cword.l);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200410 break;
411 case FLASH_CFI_64BIT:
412#ifdef DEBUG
413 {
414 char str1[20];
415 char str2[20];
416
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100417 print_longlong (str1, flash_read64(addr));
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200418 print_longlong (str2, cword.ll);
419 debug ("is= %s %s\n", str1, str2);
420 }
421#endif
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100422 retval = (flash_read64(addr) == cword.ll);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200423 break;
424 default:
425 retval = 0;
426 break;
427 }
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100428 flash_unmap(info, sect, offset, addr);
429
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200430 return retval;
431}
432
433/*-----------------------------------------------------------------------
434 */
435static int flash_isset (flash_info_t * info, flash_sect_t sect,
436 uint offset, uchar cmd)
437{
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100438 void *addr;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200439 cfiword_t cword;
440 int retval;
441
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100442 addr = flash_map (info, sect, offset);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200443 flash_make_cmd (info, cmd, &cword);
444 switch (info->portwidth) {
445 case FLASH_CFI_8BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100446 retval = ((flash_read8(addr) & cword.c) == cword.c);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200447 break;
448 case FLASH_CFI_16BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100449 retval = ((flash_read16(addr) & cword.w) == cword.w);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200450 break;
451 case FLASH_CFI_32BIT:
Stefan Roese47cc23c2008-01-02 14:05:37 +0100452 retval = ((flash_read32(addr) & cword.l) == cword.l);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200453 break;
454 case FLASH_CFI_64BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100455 retval = ((flash_read64(addr) & cword.ll) == cword.ll);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200456 break;
457 default:
458 retval = 0;
459 break;
460 }
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100461 flash_unmap(info, sect, offset, addr);
462
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200463 return retval;
464}
465
466/*-----------------------------------------------------------------------
467 */
468static int flash_toggle (flash_info_t * info, flash_sect_t sect,
469 uint offset, uchar cmd)
470{
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100471 void *addr;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200472 cfiword_t cword;
473 int retval;
474
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100475 addr = flash_map (info, sect, offset);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200476 flash_make_cmd (info, cmd, &cword);
477 switch (info->portwidth) {
478 case FLASH_CFI_8BIT:
Stefan Roesefb8c0612008-06-16 10:40:02 +0200479 retval = flash_read8(addr) != flash_read8(addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200480 break;
481 case FLASH_CFI_16BIT:
Stefan Roesefb8c0612008-06-16 10:40:02 +0200482 retval = flash_read16(addr) != flash_read16(addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200483 break;
484 case FLASH_CFI_32BIT:
Stefan Roesefb8c0612008-06-16 10:40:02 +0200485 retval = flash_read32(addr) != flash_read32(addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200486 break;
487 case FLASH_CFI_64BIT:
Wolfgang Denk9abda6b2008-10-31 01:12:28 +0100488 retval = ( (flash_read32( addr ) != flash_read32( addr )) ||
489 (flash_read32(addr+4) != flash_read32(addr+4)) );
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200490 break;
491 default:
492 retval = 0;
493 break;
494 }
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100495 flash_unmap(info, sect, offset, addr);
496
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200497 return retval;
498}
499
500/*
501 * flash_is_busy - check to see if the flash is busy
502 *
503 * This routine checks the status of the chip and returns true if the
504 * chip is busy.
505 */
506static int flash_is_busy (flash_info_t * info, flash_sect_t sect)
507{
508 int retval;
509
510 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +0400511 case CFI_CMDSET_INTEL_PROG_REGIONS:
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200512 case CFI_CMDSET_INTEL_STANDARD:
513 case CFI_CMDSET_INTEL_EXTENDED:
514 retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE);
515 break;
516 case CFI_CMDSET_AMD_STANDARD:
517 case CFI_CMDSET_AMD_EXTENDED:
Michael Schwingen81b20cc2007-12-07 23:35:02 +0100518#ifdef CONFIG_FLASH_CFI_LEGACY
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200519 case CFI_CMDSET_AMD_LEGACY:
520#endif
521 retval = flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE);
522 break;
523 default:
524 retval = 0;
Michael Schwingen81b20cc2007-12-07 23:35:02 +0100525 }
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200526 debug ("flash_is_busy: %d\n", retval);
527 return retval;
Michael Schwingen81b20cc2007-12-07 23:35:02 +0100528}
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200529
530/*-----------------------------------------------------------------------
531 * wait for XSR.7 to be set. Time out with an error if it does not.
532 * This routine does not set the flash to read-array mode.
533 */
534static int flash_status_check (flash_info_t * info, flash_sect_t sector,
535 ulong tout, char *prompt)
536{
537 ulong start;
538
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200539#if CONFIG_SYS_HZ != 1000
Renato Andreolac40c94a2010-03-24 23:00:47 +0800540 if ((ulong)CONFIG_SYS_HZ > 100000)
541 tout *= (ulong)CONFIG_SYS_HZ / 1000; /* for a big HZ, avoid overflow */
542 else
543 tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200544#endif
545
546 /* Wait for command completion */
Thomas Chou22d6c8f2010-04-01 11:15:05 +0800547 reset_timer();
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200548 start = get_timer (0);
549 while (flash_is_busy (info, sector)) {
550 if (get_timer (start) > tout) {
551 printf ("Flash %s timeout at address %lx data %lx\n",
552 prompt, info->start[sector],
553 flash_read_long (info, sector, 0));
554 flash_write_cmd (info, sector, 0, info->cmd_reset);
555 return ERR_TIMOUT;
556 }
557 udelay (1); /* also triggers watchdog */
558 }
559 return ERR_OK;
560}
561
562/*-----------------------------------------------------------------------
563 * Wait for XSR.7 to be set, if it times out print an error, otherwise
564 * do a full status check.
565 *
566 * This routine sets the flash to read-array mode.
567 */
568static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
569 ulong tout, char *prompt)
570{
571 int retcode;
572
573 retcode = flash_status_check (info, sector, tout, prompt);
574 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +0400575 case CFI_CMDSET_INTEL_PROG_REGIONS:
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200576 case CFI_CMDSET_INTEL_EXTENDED:
577 case CFI_CMDSET_INTEL_STANDARD:
Ed Swarthout0d01f662008-10-09 01:26:36 -0500578 if ((retcode != ERR_OK)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200579 && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) {
580 retcode = ERR_INVAL;
581 printf ("Flash %s error at address %lx\n", prompt,
582 info->start[sector]);
583 if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS |
584 FLASH_STATUS_PSLBS)) {
585 puts ("Command Sequence Error.\n");
586 } else if (flash_isset (info, sector, 0,
587 FLASH_STATUS_ECLBS)) {
588 puts ("Block Erase Error.\n");
589 retcode = ERR_NOT_ERASED;
590 } else if (flash_isset (info, sector, 0,
591 FLASH_STATUS_PSLBS)) {
592 puts ("Locking Error\n");
593 }
594 if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) {
595 puts ("Block locked.\n");
596 retcode = ERR_PROTECTED;
597 }
598 if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS))
599 puts ("Vpp Low Error.\n");
600 }
601 flash_write_cmd (info, sector, 0, info->cmd_reset);
602 break;
603 default:
604 break;
605 }
606 return retcode;
607}
608
Thomas Choue5720822010-03-26 08:17:00 +0800609static int use_flash_status_poll(flash_info_t *info)
610{
611#ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
612 if (info->vendor == CFI_CMDSET_AMD_EXTENDED ||
613 info->vendor == CFI_CMDSET_AMD_STANDARD)
614 return 1;
615#endif
616 return 0;
617}
618
619static int flash_status_poll(flash_info_t *info, void *src, void *dst,
620 ulong tout, char *prompt)
621{
622#ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
623 ulong start;
624 int ready;
625
626#if CONFIG_SYS_HZ != 1000
627 if ((ulong)CONFIG_SYS_HZ > 100000)
628 tout *= (ulong)CONFIG_SYS_HZ / 1000; /* for a big HZ, avoid overflow */
629 else
630 tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
631#endif
632
633 /* Wait for command completion */
Thomas Chou22d6c8f2010-04-01 11:15:05 +0800634 reset_timer();
Thomas Choue5720822010-03-26 08:17:00 +0800635 start = get_timer(0);
636 while (1) {
637 switch (info->portwidth) {
638 case FLASH_CFI_8BIT:
639 ready = flash_read8(dst) == flash_read8(src);
640 break;
641 case FLASH_CFI_16BIT:
642 ready = flash_read16(dst) == flash_read16(src);
643 break;
644 case FLASH_CFI_32BIT:
645 ready = flash_read32(dst) == flash_read32(src);
646 break;
647 case FLASH_CFI_64BIT:
648 ready = flash_read64(dst) == flash_read64(src);
649 break;
650 default:
651 ready = 0;
652 break;
653 }
654 if (ready)
655 break;
656 if (get_timer(start) > tout) {
657 printf("Flash %s timeout at address %lx data %lx\n",
658 prompt, (ulong)dst, (ulong)flash_read8(dst));
659 return ERR_TIMOUT;
660 }
661 udelay(1); /* also triggers watchdog */
662 }
663#endif /* CONFIG_SYS_CFI_FLASH_STATUS_POLL */
664 return ERR_OK;
665}
666
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200667/*-----------------------------------------------------------------------
668 */
669static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
670{
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200671#if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200672 unsigned short w;
673 unsigned int l;
674 unsigned long long ll;
675#endif
676
677 switch (info->portwidth) {
678 case FLASH_CFI_8BIT:
679 cword->c = c;
680 break;
681 case FLASH_CFI_16BIT:
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200682#if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200683 w = c;
684 w <<= 8;
685 cword->w = (cword->w >> 8) | w;
Michael Schwingen81b20cc2007-12-07 23:35:02 +0100686#else
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200687 cword->w = (cword->w << 8) | c;
Michael Schwingen81b20cc2007-12-07 23:35:02 +0100688#endif
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200689 break;
690 case FLASH_CFI_32BIT:
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200691#if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200692 l = c;
693 l <<= 24;
694 cword->l = (cword->l >> 8) | l;
695#else
696 cword->l = (cword->l << 8) | c;
Stefan Roese2662b402006-04-01 13:41:03 +0200697#endif
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200698 break;
699 case FLASH_CFI_64BIT:
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200700#if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200701 ll = c;
702 ll <<= 56;
703 cword->ll = (cword->ll >> 8) | ll;
704#else
705 cword->ll = (cword->ll << 8) | c;
706#endif
707 break;
wdenk5653fc32004-02-08 22:55:38 +0000708 }
wdenk5653fc32004-02-08 22:55:38 +0000709}
710
Jens Gehrlein0f8e8512008-12-16 17:25:55 +0100711/*
712 * Loop through the sector table starting from the previously found sector.
713 * Searches forwards or backwards, dependent on the passed address.
wdenk5653fc32004-02-08 22:55:38 +0000714 */
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200715static flash_sect_t find_sector (flash_info_t * info, ulong addr)
wdenk7680c142005-05-16 15:23:22 +0000716{
Jens Gehrlein0f8e8512008-12-16 17:25:55 +0100717 static flash_sect_t saved_sector = 0; /* previously found sector */
718 flash_sect_t sector = saved_sector;
wdenk7680c142005-05-16 15:23:22 +0000719
Jens Gehrlein0f8e8512008-12-16 17:25:55 +0100720 while ((info->start[sector] < addr)
721 && (sector < info->sector_count - 1))
722 sector++;
723 while ((info->start[sector] > addr) && (sector > 0))
724 /*
725 * also decrements the sector in case of an overshot
726 * in the first loop
727 */
728 sector--;
729
730 saved_sector = sector;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200731 return sector;
wdenk7680c142005-05-16 15:23:22 +0000732}
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200733
734/*-----------------------------------------------------------------------
735 */
736static int flash_write_cfiword (flash_info_t * info, ulong dest,
737 cfiword_t cword)
738{
Becky Bruce09ce9922009-02-02 16:34:51 -0600739 void *dstaddr = (void *)dest;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200740 int flag;
Jens Gehrleina7292872008-12-16 17:25:54 +0100741 flash_sect_t sect = 0;
742 char sect_found = 0;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200743
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200744 /* Check if Flash is (sufficiently) erased */
745 switch (info->portwidth) {
746 case FLASH_CFI_8BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100747 flag = ((flash_read8(dstaddr) & cword.c) == cword.c);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200748 break;
749 case FLASH_CFI_16BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100750 flag = ((flash_read16(dstaddr) & cword.w) == cword.w);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200751 break;
752 case FLASH_CFI_32BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100753 flag = ((flash_read32(dstaddr) & cword.l) == cword.l);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200754 break;
755 case FLASH_CFI_64BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100756 flag = ((flash_read64(dstaddr) & cword.ll) == cword.ll);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200757 break;
758 default:
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100759 flag = 0;
760 break;
761 }
Becky Bruce09ce9922009-02-02 16:34:51 -0600762 if (!flag)
Stefan Roese0dc80e22007-12-27 07:50:54 +0100763 return ERR_NOT_ERASED;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200764
765 /* Disable interrupts which might cause a timeout here */
766 flag = disable_interrupts ();
767
768 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +0400769 case CFI_CMDSET_INTEL_PROG_REGIONS:
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200770 case CFI_CMDSET_INTEL_EXTENDED:
771 case CFI_CMDSET_INTEL_STANDARD:
772 flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS);
773 flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE);
774 break;
775 case CFI_CMDSET_AMD_EXTENDED:
776 case CFI_CMDSET_AMD_STANDARD:
Ed Swarthout0d01f662008-10-09 01:26:36 -0500777 sect = find_sector(info, dest);
778 flash_unlock_seq (info, sect);
779 flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_WRITE);
Jens Gehrleina7292872008-12-16 17:25:54 +0100780 sect_found = 1;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200781 break;
Po-Yu Chuangb4db4a72009-07-10 18:03:57 +0800782#ifdef CONFIG_FLASH_CFI_LEGACY
783 case CFI_CMDSET_AMD_LEGACY:
784 sect = find_sector(info, dest);
785 flash_unlock_seq (info, 0);
786 flash_write_cmd (info, 0, info->addr_unlock1, AMD_CMD_WRITE);
787 sect_found = 1;
788 break;
789#endif
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200790 }
791
792 switch (info->portwidth) {
793 case FLASH_CFI_8BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100794 flash_write8(cword.c, dstaddr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200795 break;
796 case FLASH_CFI_16BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100797 flash_write16(cword.w, dstaddr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200798 break;
799 case FLASH_CFI_32BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100800 flash_write32(cword.l, dstaddr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200801 break;
802 case FLASH_CFI_64BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100803 flash_write64(cword.ll, dstaddr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200804 break;
805 }
806
807 /* re-enable interrupts if necessary */
808 if (flag)
809 enable_interrupts ();
810
Jens Gehrleina7292872008-12-16 17:25:54 +0100811 if (!sect_found)
812 sect = find_sector (info, dest);
813
Thomas Choue5720822010-03-26 08:17:00 +0800814 if (use_flash_status_poll(info))
815 return flash_status_poll(info, &cword, dstaddr,
816 info->write_tout, "write");
817 else
818 return flash_full_status_check(info, sect,
819 info->write_tout, "write");
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200820}
821
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200822#ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200823
824static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
825 int len)
826{
827 flash_sect_t sector;
828 int cnt;
829 int retcode;
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100830 void *src = cp;
Stefan Roeseec21d5c2009-02-05 11:25:57 +0100831 void *dst = (void *)dest;
Stefan Roese0dc80e22007-12-27 07:50:54 +0100832 void *dst2 = dst;
833 int flag = 0;
Guennadi Liakhovetski96ef8312008-04-03 13:36:02 +0200834 uint offset = 0;
835 unsigned int shift;
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +0400836 uchar write_cmd;
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100837
Stefan Roese0dc80e22007-12-27 07:50:54 +0100838 switch (info->portwidth) {
839 case FLASH_CFI_8BIT:
Guennadi Liakhovetski96ef8312008-04-03 13:36:02 +0200840 shift = 0;
Stefan Roese0dc80e22007-12-27 07:50:54 +0100841 break;
842 case FLASH_CFI_16BIT:
Guennadi Liakhovetski96ef8312008-04-03 13:36:02 +0200843 shift = 1;
Stefan Roese0dc80e22007-12-27 07:50:54 +0100844 break;
845 case FLASH_CFI_32BIT:
Guennadi Liakhovetski96ef8312008-04-03 13:36:02 +0200846 shift = 2;
Stefan Roese0dc80e22007-12-27 07:50:54 +0100847 break;
848 case FLASH_CFI_64BIT:
Guennadi Liakhovetski96ef8312008-04-03 13:36:02 +0200849 shift = 3;
Stefan Roese0dc80e22007-12-27 07:50:54 +0100850 break;
851 default:
852 retcode = ERR_INVAL;
853 goto out_unmap;
854 }
855
Guennadi Liakhovetski96ef8312008-04-03 13:36:02 +0200856 cnt = len >> shift;
857
Stefan Roese0dc80e22007-12-27 07:50:54 +0100858 while ((cnt-- > 0) && (flag == 0)) {
859 switch (info->portwidth) {
860 case FLASH_CFI_8BIT:
861 flag = ((flash_read8(dst2) & flash_read8(src)) ==
862 flash_read8(src));
863 src += 1, dst2 += 1;
864 break;
865 case FLASH_CFI_16BIT:
866 flag = ((flash_read16(dst2) & flash_read16(src)) ==
867 flash_read16(src));
868 src += 2, dst2 += 2;
869 break;
870 case FLASH_CFI_32BIT:
871 flag = ((flash_read32(dst2) & flash_read32(src)) ==
872 flash_read32(src));
873 src += 4, dst2 += 4;
874 break;
875 case FLASH_CFI_64BIT:
876 flag = ((flash_read64(dst2) & flash_read64(src)) ==
877 flash_read64(src));
878 src += 8, dst2 += 8;
879 break;
880 }
881 }
882 if (!flag) {
883 retcode = ERR_NOT_ERASED;
884 goto out_unmap;
885 }
886
887 src = cp;
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100888 sector = find_sector (info, dest);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200889
890 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +0400891 case CFI_CMDSET_INTEL_PROG_REGIONS:
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200892 case CFI_CMDSET_INTEL_STANDARD:
893 case CFI_CMDSET_INTEL_EXTENDED:
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +0400894 write_cmd = (info->vendor == CFI_CMDSET_INTEL_PROG_REGIONS) ?
895 FLASH_CMD_WRITE_BUFFER_PROG : FLASH_CMD_WRITE_TO_BUFFER;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200896 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +0400897 flash_write_cmd (info, sector, 0, FLASH_CMD_READ_STATUS);
898 flash_write_cmd (info, sector, 0, write_cmd);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200899 retcode = flash_status_check (info, sector,
900 info->buffer_write_tout,
901 "write to buffer");
902 if (retcode == ERR_OK) {
903 /* reduce the number of loops by the width of
904 * the port */
Guennadi Liakhovetski96ef8312008-04-03 13:36:02 +0200905 cnt = len >> shift;
Vasiliy Leoenenko93c56f22008-05-07 21:24:44 +0400906 flash_write_cmd (info, sector, 0, cnt - 1);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200907 while (cnt-- > 0) {
908 switch (info->portwidth) {
909 case FLASH_CFI_8BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100910 flash_write8(flash_read8(src), dst);
911 src += 1, dst += 1;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200912 break;
913 case FLASH_CFI_16BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100914 flash_write16(flash_read16(src), dst);
915 src += 2, dst += 2;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200916 break;
917 case FLASH_CFI_32BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100918 flash_write32(flash_read32(src), dst);
919 src += 4, dst += 4;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200920 break;
921 case FLASH_CFI_64BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100922 flash_write64(flash_read64(src), dst);
923 src += 8, dst += 8;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200924 break;
925 default:
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100926 retcode = ERR_INVAL;
927 goto out_unmap;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200928 }
929 }
930 flash_write_cmd (info, sector, 0,
931 FLASH_CMD_WRITE_BUFFER_CONFIRM);
932 retcode = flash_full_status_check (
933 info, sector, info->buffer_write_tout,
934 "buffer write");
935 }
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100936
937 break;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200938
939 case CFI_CMDSET_AMD_STANDARD:
940 case CFI_CMDSET_AMD_EXTENDED:
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200941 flash_unlock_seq(info,0);
Guennadi Liakhovetski96ef8312008-04-03 13:36:02 +0200942
943#ifdef CONFIG_FLASH_SPANSION_S29WS_N
944 offset = ((unsigned long)dst - info->start[sector]) >> shift;
945#endif
946 flash_write_cmd(info, sector, offset, AMD_CMD_WRITE_TO_BUFFER);
947 cnt = len >> shift;
John Schmoller7dedefd2009-08-12 10:55:47 -0500948 flash_write_cmd(info, sector, offset, cnt - 1);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200949
950 switch (info->portwidth) {
951 case FLASH_CFI_8BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100952 while (cnt-- > 0) {
953 flash_write8(flash_read8(src), dst);
954 src += 1, dst += 1;
955 }
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200956 break;
957 case FLASH_CFI_16BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100958 while (cnt-- > 0) {
959 flash_write16(flash_read16(src), dst);
960 src += 2, dst += 2;
961 }
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200962 break;
963 case FLASH_CFI_32BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100964 while (cnt-- > 0) {
965 flash_write32(flash_read32(src), dst);
966 src += 4, dst += 4;
967 }
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200968 break;
969 case FLASH_CFI_64BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100970 while (cnt-- > 0) {
971 flash_write64(flash_read64(src), dst);
972 src += 8, dst += 8;
973 }
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200974 break;
975 default:
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100976 retcode = ERR_INVAL;
977 goto out_unmap;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200978 }
979
980 flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM);
Thomas Choue5720822010-03-26 08:17:00 +0800981 if (use_flash_status_poll(info))
982 retcode = flash_status_poll(info, src - (1 << shift),
983 dst - (1 << shift),
984 info->buffer_write_tout,
985 "buffer write");
986 else
987 retcode = flash_full_status_check(info, sector,
988 info->buffer_write_tout,
989 "buffer write");
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100990 break;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200991
992 default:
993 debug ("Unknown Command Set\n");
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100994 retcode = ERR_INVAL;
995 break;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200996 }
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100997
998out_unmap:
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100999 return retcode;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001000}
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001001#endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001002
wdenk7680c142005-05-16 15:23:22 +00001003
1004/*-----------------------------------------------------------------------
1005 */
wdenkbf9e3b32004-02-12 00:47:09 +00001006int flash_erase (flash_info_t * info, int s_first, int s_last)
wdenk5653fc32004-02-08 22:55:38 +00001007{
1008 int rcode = 0;
1009 int prot;
1010 flash_sect_t sect;
Thomas Choue5720822010-03-26 08:17:00 +08001011 int st;
wdenk5653fc32004-02-08 22:55:38 +00001012
wdenkbf9e3b32004-02-12 00:47:09 +00001013 if (info->flash_id != FLASH_MAN_CFI) {
wdenk4b9206e2004-03-23 22:14:11 +00001014 puts ("Can't erase unknown flash type - aborted\n");
wdenk5653fc32004-02-08 22:55:38 +00001015 return 1;
1016 }
1017 if ((s_first < 0) || (s_first > s_last)) {
wdenk4b9206e2004-03-23 22:14:11 +00001018 puts ("- no sectors to erase\n");
wdenk5653fc32004-02-08 22:55:38 +00001019 return 1;
1020 }
1021
1022 prot = 0;
wdenkbf9e3b32004-02-12 00:47:09 +00001023 for (sect = s_first; sect <= s_last; ++sect) {
wdenk5653fc32004-02-08 22:55:38 +00001024 if (info->protect[sect]) {
1025 prot++;
1026 }
1027 }
1028 if (prot) {
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001029 printf ("- Warning: %d protected sectors will not be erased!\n",
1030 prot);
Piotr Ziecik6ea808e2008-11-17 15:49:32 +01001031 } else if (flash_verbose) {
wdenk4b9206e2004-03-23 22:14:11 +00001032 putc ('\n');
wdenk5653fc32004-02-08 22:55:38 +00001033 }
1034
1035
wdenkbf9e3b32004-02-12 00:47:09 +00001036 for (sect = s_first; sect <= s_last; sect++) {
wdenk5653fc32004-02-08 22:55:38 +00001037 if (info->protect[sect] == 0) { /* not protected */
wdenkbf9e3b32004-02-12 00:47:09 +00001038 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +04001039 case CFI_CMDSET_INTEL_PROG_REGIONS:
wdenk5653fc32004-02-08 22:55:38 +00001040 case CFI_CMDSET_INTEL_STANDARD:
1041 case CFI_CMDSET_INTEL_EXTENDED:
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001042 flash_write_cmd (info, sect, 0,
1043 FLASH_CMD_CLEAR_STATUS);
1044 flash_write_cmd (info, sect, 0,
1045 FLASH_CMD_BLOCK_ERASE);
1046 flash_write_cmd (info, sect, 0,
1047 FLASH_CMD_ERASE_CONFIRM);
wdenk5653fc32004-02-08 22:55:38 +00001048 break;
1049 case CFI_CMDSET_AMD_STANDARD:
1050 case CFI_CMDSET_AMD_EXTENDED:
wdenkbf9e3b32004-02-12 00:47:09 +00001051 flash_unlock_seq (info, sect);
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001052 flash_write_cmd (info, sect,
1053 info->addr_unlock1,
1054 AMD_CMD_ERASE_START);
wdenkbf9e3b32004-02-12 00:47:09 +00001055 flash_unlock_seq (info, sect);
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001056 flash_write_cmd (info, sect, 0,
1057 AMD_CMD_ERASE_SECTOR);
wdenk5653fc32004-02-08 22:55:38 +00001058 break;
Michael Schwingen81b20cc2007-12-07 23:35:02 +01001059#ifdef CONFIG_FLASH_CFI_LEGACY
1060 case CFI_CMDSET_AMD_LEGACY:
1061 flash_unlock_seq (info, 0);
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001062 flash_write_cmd (info, 0, info->addr_unlock1,
1063 AMD_CMD_ERASE_START);
Michael Schwingen81b20cc2007-12-07 23:35:02 +01001064 flash_unlock_seq (info, 0);
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001065 flash_write_cmd (info, sect, 0,
1066 AMD_CMD_ERASE_SECTOR);
Michael Schwingen81b20cc2007-12-07 23:35:02 +01001067 break;
1068#endif
wdenk5653fc32004-02-08 22:55:38 +00001069 default:
wdenkbf9e3b32004-02-12 00:47:09 +00001070 debug ("Unkown flash vendor %d\n",
1071 info->vendor);
wdenk5653fc32004-02-08 22:55:38 +00001072 break;
1073 }
1074
Thomas Choue5720822010-03-26 08:17:00 +08001075 if (use_flash_status_poll(info)) {
1076 cfiword_t cword = (cfiword_t)0xffffffffffffffffULL;
1077 void *dest;
1078 dest = flash_map(info, sect, 0);
1079 st = flash_status_poll(info, &cword, dest,
1080 info->erase_blk_tout, "erase");
1081 flash_unmap(info, sect, 0, dest);
1082 } else
1083 st = flash_full_status_check(info, sect,
1084 info->erase_blk_tout,
1085 "erase");
1086 if (st)
wdenk5653fc32004-02-08 22:55:38 +00001087 rcode = 1;
Thomas Choue5720822010-03-26 08:17:00 +08001088 else if (flash_verbose)
wdenk4b9206e2004-03-23 22:14:11 +00001089 putc ('.');
wdenk5653fc32004-02-08 22:55:38 +00001090 }
1091 }
Piotr Ziecik6ea808e2008-11-17 15:49:32 +01001092
1093 if (flash_verbose)
1094 puts (" done\n");
1095
wdenk5653fc32004-02-08 22:55:38 +00001096 return rcode;
1097}
1098
1099/*-----------------------------------------------------------------------
1100 */
wdenkbf9e3b32004-02-12 00:47:09 +00001101void flash_print_info (flash_info_t * info)
wdenk5653fc32004-02-08 22:55:38 +00001102{
1103 int i;
1104
1105 if (info->flash_id != FLASH_MAN_CFI) {
wdenk4b9206e2004-03-23 22:14:11 +00001106 puts ("missing or unknown FLASH type\n");
wdenk5653fc32004-02-08 22:55:38 +00001107 return;
1108 }
1109
Michael Schwingen81b20cc2007-12-07 23:35:02 +01001110 printf ("%s FLASH (%d x %d)",
1111 info->name,
wdenkbf9e3b32004-02-12 00:47:09 +00001112 (info->portwidth << 3), (info->chipwidth << 3));
Michael Schwingen81b20cc2007-12-07 23:35:02 +01001113 if (info->size < 1024*1024)
1114 printf (" Size: %ld kB in %d Sectors\n",
1115 info->size >> 10, info->sector_count);
1116 else
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001117 printf (" Size: %ld MB in %d Sectors\n",
1118 info->size >> 20, info->sector_count);
Stefan Roese260421a2006-11-13 13:55:24 +01001119 printf (" ");
1120 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +04001121 case CFI_CMDSET_INTEL_PROG_REGIONS:
1122 printf ("Intel Prog Regions");
1123 break;
Stefan Roese260421a2006-11-13 13:55:24 +01001124 case CFI_CMDSET_INTEL_STANDARD:
1125 printf ("Intel Standard");
1126 break;
1127 case CFI_CMDSET_INTEL_EXTENDED:
1128 printf ("Intel Extended");
1129 break;
1130 case CFI_CMDSET_AMD_STANDARD:
1131 printf ("AMD Standard");
1132 break;
1133 case CFI_CMDSET_AMD_EXTENDED:
1134 printf ("AMD Extended");
1135 break;
Michael Schwingen81b20cc2007-12-07 23:35:02 +01001136#ifdef CONFIG_FLASH_CFI_LEGACY
1137 case CFI_CMDSET_AMD_LEGACY:
1138 printf ("AMD Legacy");
1139 break;
1140#endif
Stefan Roese260421a2006-11-13 13:55:24 +01001141 default:
1142 printf ("Unknown (%d)", info->vendor);
1143 break;
1144 }
1145 printf (" command set, Manufacturer ID: 0x%02X, Device ID: 0x%02X",
1146 info->manufacturer_id, info->device_id);
1147 if (info->device_id == 0x7E) {
1148 printf("%04X", info->device_id2);
1149 }
1150 printf ("\n Erase timeout: %ld ms, write timeout: %ld ms\n",
wdenk028ab6b2004-02-23 23:54:43 +00001151 info->erase_blk_tout,
Stefan Roese260421a2006-11-13 13:55:24 +01001152 info->write_tout);
1153 if (info->buffer_size > 1) {
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001154 printf (" Buffer write timeout: %ld ms, "
1155 "buffer size: %d bytes\n",
wdenk028ab6b2004-02-23 23:54:43 +00001156 info->buffer_write_tout,
1157 info->buffer_size);
Stefan Roese260421a2006-11-13 13:55:24 +01001158 }
wdenk5653fc32004-02-08 22:55:38 +00001159
Stefan Roese260421a2006-11-13 13:55:24 +01001160 puts ("\n Sector Start Addresses:");
wdenkbf9e3b32004-02-12 00:47:09 +00001161 for (i = 0; i < info->sector_count; ++i) {
Stefan Roese260421a2006-11-13 13:55:24 +01001162 if ((i % 5) == 0)
1163 printf ("\n");
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001164#ifdef CONFIG_SYS_FLASH_EMPTY_INFO
wdenk5653fc32004-02-08 22:55:38 +00001165 int k;
1166 int size;
1167 int erased;
1168 volatile unsigned long *flash;
1169
1170 /*
1171 * Check if whole sector is erased
1172 */
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001173 size = flash_sector_size(info, i);
wdenk5653fc32004-02-08 22:55:38 +00001174 erased = 1;
wdenkbf9e3b32004-02-12 00:47:09 +00001175 flash = (volatile unsigned long *) info->start[i];
1176 size = size >> 2; /* divide by 4 for longword access */
1177 for (k = 0; k < size; k++) {
1178 if (*flash++ != 0xffffffff) {
1179 erased = 0;
1180 break;
1181 }
1182 }
wdenk5653fc32004-02-08 22:55:38 +00001183
wdenk5653fc32004-02-08 22:55:38 +00001184 /* print empty and read-only info */
Stefan Roese260421a2006-11-13 13:55:24 +01001185 printf (" %08lX %c %s ",
wdenk5653fc32004-02-08 22:55:38 +00001186 info->start[i],
Stefan Roese260421a2006-11-13 13:55:24 +01001187 erased ? 'E' : ' ',
1188 info->protect[i] ? "RO" : " ");
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001189#else /* ! CONFIG_SYS_FLASH_EMPTY_INFO */
Stefan Roese260421a2006-11-13 13:55:24 +01001190 printf (" %08lX %s ",
1191 info->start[i],
1192 info->protect[i] ? "RO" : " ");
wdenk5653fc32004-02-08 22:55:38 +00001193#endif
1194 }
wdenk4b9206e2004-03-23 22:14:11 +00001195 putc ('\n');
wdenk5653fc32004-02-08 22:55:38 +00001196 return;
1197}
1198
1199/*-----------------------------------------------------------------------
Jerry Van Baren9a042e92008-03-08 13:48:01 -05001200 * This is used in a few places in write_buf() to show programming
1201 * progress. Making it a function is nasty because it needs to do side
1202 * effect updates to digit and dots. Repeated code is nasty too, so
1203 * we define it once here.
1204 */
Stefan Roesef0105722008-03-19 07:09:26 +01001205#ifdef CONFIG_FLASH_SHOW_PROGRESS
1206#define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) \
Piotr Ziecik6ea808e2008-11-17 15:49:32 +01001207 if (flash_verbose) { \
1208 dots -= dots_sub; \
1209 if ((scale > 0) && (dots <= 0)) { \
1210 if ((digit % 5) == 0) \
1211 printf ("%d", digit / 5); \
1212 else \
1213 putc ('.'); \
1214 digit--; \
1215 dots += scale; \
1216 } \
Jerry Van Baren9a042e92008-03-08 13:48:01 -05001217 }
Stefan Roesef0105722008-03-19 07:09:26 +01001218#else
1219#define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub)
1220#endif
Jerry Van Baren9a042e92008-03-08 13:48:01 -05001221
1222/*-----------------------------------------------------------------------
wdenk5653fc32004-02-08 22:55:38 +00001223 * Copy memory to flash, returns:
1224 * 0 - OK
1225 * 1 - write timeout
1226 * 2 - Flash not erased
1227 */
wdenkbf9e3b32004-02-12 00:47:09 +00001228int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
wdenk5653fc32004-02-08 22:55:38 +00001229{
1230 ulong wp;
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001231 uchar *p;
wdenk5653fc32004-02-08 22:55:38 +00001232 int aln;
1233 cfiword_t cword;
1234 int i, rc;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001235#ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
wdenkbf9e3b32004-02-12 00:47:09 +00001236 int buffered_size;
1237#endif
Jerry Van Baren9a042e92008-03-08 13:48:01 -05001238#ifdef CONFIG_FLASH_SHOW_PROGRESS
1239 int digit = CONFIG_FLASH_SHOW_PROGRESS;
1240 int scale = 0;
1241 int dots = 0;
1242
1243 /*
1244 * Suppress if there are fewer than CONFIG_FLASH_SHOW_PROGRESS writes.
1245 */
1246 if (cnt >= CONFIG_FLASH_SHOW_PROGRESS) {
1247 scale = (int)((cnt + CONFIG_FLASH_SHOW_PROGRESS - 1) /
1248 CONFIG_FLASH_SHOW_PROGRESS);
1249 }
1250#endif
1251
wdenkbf9e3b32004-02-12 00:47:09 +00001252 /* get lower aligned address */
wdenk5653fc32004-02-08 22:55:38 +00001253 wp = (addr & ~(info->portwidth - 1));
1254
1255 /* handle unaligned start */
wdenkbf9e3b32004-02-12 00:47:09 +00001256 if ((aln = addr - wp) != 0) {
wdenk5653fc32004-02-08 22:55:38 +00001257 cword.l = 0;
Becky Bruce09ce9922009-02-02 16:34:51 -06001258 p = (uchar *)wp;
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001259 for (i = 0; i < aln; ++i)
1260 flash_add_byte (info, &cword, flash_read8(p + i));
wdenk5653fc32004-02-08 22:55:38 +00001261
wdenkbf9e3b32004-02-12 00:47:09 +00001262 for (; (i < info->portwidth) && (cnt > 0); i++) {
1263 flash_add_byte (info, &cword, *src++);
wdenk5653fc32004-02-08 22:55:38 +00001264 cnt--;
wdenk5653fc32004-02-08 22:55:38 +00001265 }
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001266 for (; (cnt == 0) && (i < info->portwidth); ++i)
1267 flash_add_byte (info, &cword, flash_read8(p + i));
1268
1269 rc = flash_write_cfiword (info, wp, cword);
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001270 if (rc != 0)
wdenk5653fc32004-02-08 22:55:38 +00001271 return rc;
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001272
1273 wp += i;
Stefan Roesef0105722008-03-19 07:09:26 +01001274 FLASH_SHOW_PROGRESS(scale, dots, digit, i);
wdenk5653fc32004-02-08 22:55:38 +00001275 }
1276
wdenkbf9e3b32004-02-12 00:47:09 +00001277 /* handle the aligned part */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001278#ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
wdenkbf9e3b32004-02-12 00:47:09 +00001279 buffered_size = (info->portwidth / info->chipwidth);
1280 buffered_size *= info->buffer_size;
1281 while (cnt >= info->portwidth) {
Stefan Roese79b4cda2006-02-28 15:29:58 +01001282 /* prohibit buffer write when buffer_size is 1 */
1283 if (info->buffer_size == 1) {
1284 cword.l = 0;
1285 for (i = 0; i < info->portwidth; i++)
1286 flash_add_byte (info, &cword, *src++);
1287 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
1288 return rc;
1289 wp += info->portwidth;
1290 cnt -= info->portwidth;
1291 continue;
1292 }
1293
1294 /* write buffer until next buffered_size aligned boundary */
1295 i = buffered_size - (wp % buffered_size);
1296 if (i > cnt)
1297 i = cnt;
wdenkbf9e3b32004-02-12 00:47:09 +00001298 if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK)
wdenk5653fc32004-02-08 22:55:38 +00001299 return rc;
Wolfgang Denk8d4ba3d2005-08-12 22:35:59 +02001300 i -= i & (info->portwidth - 1);
wdenk5653fc32004-02-08 22:55:38 +00001301 wp += i;
1302 src += i;
wdenkbf9e3b32004-02-12 00:47:09 +00001303 cnt -= i;
Stefan Roesef0105722008-03-19 07:09:26 +01001304 FLASH_SHOW_PROGRESS(scale, dots, digit, i);
wdenk5653fc32004-02-08 22:55:38 +00001305 }
1306#else
wdenkbf9e3b32004-02-12 00:47:09 +00001307 while (cnt >= info->portwidth) {
wdenk5653fc32004-02-08 22:55:38 +00001308 cword.l = 0;
wdenkbf9e3b32004-02-12 00:47:09 +00001309 for (i = 0; i < info->portwidth; i++) {
1310 flash_add_byte (info, &cword, *src++);
wdenk5653fc32004-02-08 22:55:38 +00001311 }
wdenkbf9e3b32004-02-12 00:47:09 +00001312 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
wdenk5653fc32004-02-08 22:55:38 +00001313 return rc;
1314 wp += info->portwidth;
1315 cnt -= info->portwidth;
Stefan Roesef0105722008-03-19 07:09:26 +01001316 FLASH_SHOW_PROGRESS(scale, dots, digit, info->portwidth);
wdenk5653fc32004-02-08 22:55:38 +00001317 }
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001318#endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
Jerry Van Baren9a042e92008-03-08 13:48:01 -05001319
wdenk5653fc32004-02-08 22:55:38 +00001320 if (cnt == 0) {
1321 return (0);
1322 }
1323
1324 /*
1325 * handle unaligned tail bytes
1326 */
1327 cword.l = 0;
Becky Bruce09ce9922009-02-02 16:34:51 -06001328 p = (uchar *)wp;
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001329 for (i = 0; (i < info->portwidth) && (cnt > 0); ++i) {
wdenkbf9e3b32004-02-12 00:47:09 +00001330 flash_add_byte (info, &cword, *src++);
wdenk5653fc32004-02-08 22:55:38 +00001331 --cnt;
1332 }
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001333 for (; i < info->portwidth; ++i)
1334 flash_add_byte (info, &cword, flash_read8(p + i));
wdenk5653fc32004-02-08 22:55:38 +00001335
wdenkbf9e3b32004-02-12 00:47:09 +00001336 return flash_write_cfiword (info, wp, cword);
wdenk5653fc32004-02-08 22:55:38 +00001337}
1338
1339/*-----------------------------------------------------------------------
1340 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001341#ifdef CONFIG_SYS_FLASH_PROTECTION
wdenk5653fc32004-02-08 22:55:38 +00001342
wdenkbf9e3b32004-02-12 00:47:09 +00001343int flash_real_protect (flash_info_t * info, long sector, int prot)
wdenk5653fc32004-02-08 22:55:38 +00001344{
1345 int retcode = 0;
1346
Rafael Camposbc9019e2008-07-31 10:22:20 +02001347 switch (info->vendor) {
1348 case CFI_CMDSET_INTEL_PROG_REGIONS:
1349 case CFI_CMDSET_INTEL_STANDARD:
Nick Spence9e8e63c2008-08-19 22:21:16 -07001350 case CFI_CMDSET_INTEL_EXTENDED:
Rafael Camposbc9019e2008-07-31 10:22:20 +02001351 flash_write_cmd (info, sector, 0,
1352 FLASH_CMD_CLEAR_STATUS);
1353 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT);
1354 if (prot)
1355 flash_write_cmd (info, sector, 0,
1356 FLASH_CMD_PROTECT_SET);
1357 else
1358 flash_write_cmd (info, sector, 0,
1359 FLASH_CMD_PROTECT_CLEAR);
1360 break;
1361 case CFI_CMDSET_AMD_EXTENDED:
1362 case CFI_CMDSET_AMD_STANDARD:
Rafael Camposbc9019e2008-07-31 10:22:20 +02001363 /* U-Boot only checks the first byte */
1364 if (info->manufacturer_id == (uchar)ATM_MANUFACT) {
1365 if (prot) {
1366 flash_unlock_seq (info, 0);
1367 flash_write_cmd (info, 0,
1368 info->addr_unlock1,
1369 ATM_CMD_SOFTLOCK_START);
1370 flash_unlock_seq (info, 0);
1371 flash_write_cmd (info, sector, 0,
1372 ATM_CMD_LOCK_SECT);
1373 } else {
1374 flash_write_cmd (info, 0,
1375 info->addr_unlock1,
1376 AMD_CMD_UNLOCK_START);
1377 if (info->device_id == ATM_ID_BV6416)
1378 flash_write_cmd (info, sector,
1379 0, ATM_CMD_UNLOCK_SECT);
1380 }
1381 }
1382 break;
TsiChung Liew4e00acd2008-08-19 16:53:39 +00001383#ifdef CONFIG_FLASH_CFI_LEGACY
1384 case CFI_CMDSET_AMD_LEGACY:
1385 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
1386 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT);
1387 if (prot)
1388 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET);
1389 else
1390 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
1391#endif
Rafael Camposbc9019e2008-07-31 10:22:20 +02001392 };
wdenk5653fc32004-02-08 22:55:38 +00001393
wdenkbf9e3b32004-02-12 00:47:09 +00001394 if ((retcode =
1395 flash_full_status_check (info, sector, info->erase_blk_tout,
1396 prot ? "protect" : "unprotect")) == 0) {
wdenk5653fc32004-02-08 22:55:38 +00001397
1398 info->protect[sector] = prot;
Stefan Roese2662b402006-04-01 13:41:03 +02001399
1400 /*
1401 * On some of Intel's flash chips (marked via legacy_unlock)
1402 * unprotect unprotects all locking.
1403 */
1404 if ((prot == 0) && (info->legacy_unlock)) {
wdenk5653fc32004-02-08 22:55:38 +00001405 flash_sect_t i;
wdenkbf9e3b32004-02-12 00:47:09 +00001406
1407 for (i = 0; i < info->sector_count; i++) {
1408 if (info->protect[i])
1409 flash_real_protect (info, i, 1);
wdenk5653fc32004-02-08 22:55:38 +00001410 }
1411 }
1412 }
wdenk5653fc32004-02-08 22:55:38 +00001413 return retcode;
wdenkbf9e3b32004-02-12 00:47:09 +00001414}
1415
wdenk5653fc32004-02-08 22:55:38 +00001416/*-----------------------------------------------------------------------
1417 * flash_read_user_serial - read the OneTimeProgramming cells
1418 */
wdenkbf9e3b32004-02-12 00:47:09 +00001419void flash_read_user_serial (flash_info_t * info, void *buffer, int offset,
1420 int len)
wdenk5653fc32004-02-08 22:55:38 +00001421{
wdenkbf9e3b32004-02-12 00:47:09 +00001422 uchar *src;
1423 uchar *dst;
wdenk5653fc32004-02-08 22:55:38 +00001424
1425 dst = buffer;
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001426 src = flash_map (info, 0, FLASH_OFFSET_USER_PROTECTION);
wdenkbf9e3b32004-02-12 00:47:09 +00001427 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
1428 memcpy (dst, src + offset, len);
Wolfgang Denkdb421e62005-09-25 16:41:22 +02001429 flash_write_cmd (info, 0, 0, info->cmd_reset);
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001430 flash_unmap(info, 0, FLASH_OFFSET_USER_PROTECTION, src);
wdenk5653fc32004-02-08 22:55:38 +00001431}
wdenkbf9e3b32004-02-12 00:47:09 +00001432
wdenk5653fc32004-02-08 22:55:38 +00001433/*
1434 * flash_read_factory_serial - read the device Id from the protection area
1435 */
wdenkbf9e3b32004-02-12 00:47:09 +00001436void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset,
1437 int len)
wdenk5653fc32004-02-08 22:55:38 +00001438{
wdenkbf9e3b32004-02-12 00:47:09 +00001439 uchar *src;
wdenkcd37d9e2004-02-10 00:03:41 +00001440
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001441 src = flash_map (info, 0, FLASH_OFFSET_INTEL_PROTECTION);
wdenkbf9e3b32004-02-12 00:47:09 +00001442 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
1443 memcpy (buffer, src + offset, len);
Wolfgang Denkdb421e62005-09-25 16:41:22 +02001444 flash_write_cmd (info, 0, 0, info->cmd_reset);
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001445 flash_unmap(info, 0, FLASH_OFFSET_INTEL_PROTECTION, src);
wdenk5653fc32004-02-08 22:55:38 +00001446}
1447
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001448#endif /* CONFIG_SYS_FLASH_PROTECTION */
wdenk5653fc32004-02-08 22:55:38 +00001449
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001450/*-----------------------------------------------------------------------
1451 * Reverse the order of the erase regions in the CFI QRY structure.
1452 * This is needed for chips that are either a) correctly detected as
1453 * top-boot, or b) buggy.
1454 */
1455static void cfi_reverse_geometry(struct cfi_qry *qry)
1456{
1457 unsigned int i, j;
1458 u32 tmp;
1459
1460 for (i = 0, j = qry->num_erase_regions - 1; i < j; i++, j--) {
1461 tmp = qry->erase_region_info[i];
1462 qry->erase_region_info[i] = qry->erase_region_info[j];
1463 qry->erase_region_info[j] = tmp;
1464 }
1465}
wdenk5653fc32004-02-08 22:55:38 +00001466
1467/*-----------------------------------------------------------------------
Stefan Roese260421a2006-11-13 13:55:24 +01001468 * read jedec ids from device and set corresponding fields in info struct
1469 *
1470 * Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct
1471 *
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001472 */
1473static void cmdset_intel_read_jedec_ids(flash_info_t *info)
1474{
1475 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1476 flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
1477 udelay(1000); /* some flash are slow to respond */
1478 info->manufacturer_id = flash_read_uchar (info,
1479 FLASH_OFFSET_MANUFACTURER_ID);
1480 info->device_id = flash_read_uchar (info,
1481 FLASH_OFFSET_DEVICE_ID);
1482 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1483}
1484
1485static int cmdset_intel_init(flash_info_t *info, struct cfi_qry *qry)
1486{
1487 info->cmd_reset = FLASH_CMD_RESET;
1488
1489 cmdset_intel_read_jedec_ids(info);
1490 flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
1491
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001492#ifdef CONFIG_SYS_FLASH_PROTECTION
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001493 /* read legacy lock/unlock bit from intel flash */
1494 if (info->ext_addr) {
1495 info->legacy_unlock = flash_read_uchar (info,
1496 info->ext_addr + 5) & 0x08;
1497 }
1498#endif
1499
1500 return 0;
1501}
1502
1503static void cmdset_amd_read_jedec_ids(flash_info_t *info)
1504{
Niklaus Giger3a7b2c22009-07-22 17:13:24 +02001505 ushort bankId = 0;
1506 uchar manuId;
1507
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001508 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1509 flash_unlock_seq(info, 0);
1510 flash_write_cmd(info, 0, info->addr_unlock1, FLASH_CMD_READ_ID);
1511 udelay(1000); /* some flash are slow to respond */
Tor Krill90447ec2008-03-28 11:29:10 +01001512
Niklaus Giger3a7b2c22009-07-22 17:13:24 +02001513 manuId = flash_read_uchar (info, FLASH_OFFSET_MANUFACTURER_ID);
1514 /* JEDEC JEP106Z specifies ID codes up to bank 7 */
1515 while (manuId == FLASH_CONTINUATION_CODE && bankId < 0x800) {
1516 bankId += 0x100;
1517 manuId = flash_read_uchar (info,
1518 bankId | FLASH_OFFSET_MANUFACTURER_ID);
1519 }
1520 info->manufacturer_id = manuId;
Tor Krill90447ec2008-03-28 11:29:10 +01001521
1522 switch (info->chipwidth){
1523 case FLASH_CFI_8BIT:
1524 info->device_id = flash_read_uchar (info,
1525 FLASH_OFFSET_DEVICE_ID);
1526 if (info->device_id == 0x7E) {
1527 /* AMD 3-byte (expanded) device ids */
1528 info->device_id2 = flash_read_uchar (info,
1529 FLASH_OFFSET_DEVICE_ID2);
1530 info->device_id2 <<= 8;
1531 info->device_id2 |= flash_read_uchar (info,
1532 FLASH_OFFSET_DEVICE_ID3);
1533 }
1534 break;
1535 case FLASH_CFI_16BIT:
1536 info->device_id = flash_read_word (info,
1537 FLASH_OFFSET_DEVICE_ID);
1538 break;
1539 default:
1540 break;
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001541 }
1542 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1543}
1544
1545static int cmdset_amd_init(flash_info_t *info, struct cfi_qry *qry)
1546{
1547 info->cmd_reset = AMD_CMD_RESET;
1548
1549 cmdset_amd_read_jedec_ids(info);
1550 flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
1551
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001552 return 0;
1553}
1554
1555#ifdef CONFIG_FLASH_CFI_LEGACY
Stefan Roese260421a2006-11-13 13:55:24 +01001556static void flash_read_jedec_ids (flash_info_t * info)
1557{
1558 info->manufacturer_id = 0;
1559 info->device_id = 0;
1560 info->device_id2 = 0;
1561
1562 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +04001563 case CFI_CMDSET_INTEL_PROG_REGIONS:
Stefan Roese260421a2006-11-13 13:55:24 +01001564 case CFI_CMDSET_INTEL_STANDARD:
1565 case CFI_CMDSET_INTEL_EXTENDED:
Michael Schwingen8225d1e2008-01-12 20:29:47 +01001566 cmdset_intel_read_jedec_ids(info);
Stefan Roese260421a2006-11-13 13:55:24 +01001567 break;
1568 case CFI_CMDSET_AMD_STANDARD:
1569 case CFI_CMDSET_AMD_EXTENDED:
Michael Schwingen8225d1e2008-01-12 20:29:47 +01001570 cmdset_amd_read_jedec_ids(info);
Stefan Roese260421a2006-11-13 13:55:24 +01001571 break;
1572 default:
1573 break;
1574 }
1575}
1576
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001577/*-----------------------------------------------------------------------
1578 * Call board code to request info about non-CFI flash.
1579 * board_flash_get_legacy needs to fill in at least:
1580 * info->portwidth, info->chipwidth and info->interface for Jedec probing.
1581 */
Becky Bruce09ce9922009-02-02 16:34:51 -06001582static int flash_detect_legacy(phys_addr_t base, int banknum)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001583{
1584 flash_info_t *info = &flash_info[banknum];
1585
1586 if (board_flash_get_legacy(base, banknum, info)) {
1587 /* board code may have filled info completely. If not, we
1588 use JEDEC ID probing. */
1589 if (!info->vendor) {
1590 int modes[] = {
1591 CFI_CMDSET_AMD_STANDARD,
1592 CFI_CMDSET_INTEL_STANDARD
1593 };
1594 int i;
1595
1596 for (i = 0; i < sizeof(modes) / sizeof(modes[0]); i++) {
1597 info->vendor = modes[i];
Becky Bruce09ce9922009-02-02 16:34:51 -06001598 info->start[0] =
1599 (ulong)map_physmem(base,
Stefan Roesee1fb6d02009-02-05 11:44:52 +01001600 info->portwidth,
Becky Bruce09ce9922009-02-02 16:34:51 -06001601 MAP_NOCACHE);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001602 if (info->portwidth == FLASH_CFI_8BIT
1603 && info->interface == FLASH_CFI_X8X16) {
1604 info->addr_unlock1 = 0x2AAA;
1605 info->addr_unlock2 = 0x5555;
1606 } else {
1607 info->addr_unlock1 = 0x5555;
1608 info->addr_unlock2 = 0x2AAA;
1609 }
1610 flash_read_jedec_ids(info);
1611 debug("JEDEC PROBE: ID %x %x %x\n",
1612 info->manufacturer_id,
1613 info->device_id,
1614 info->device_id2);
Becky Bruce09ce9922009-02-02 16:34:51 -06001615 if (jedec_flash_match(info, info->start[0]))
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001616 break;
Becky Bruce09ce9922009-02-02 16:34:51 -06001617 else
Stefan Roesee1fb6d02009-02-05 11:44:52 +01001618 unmap_physmem((void *)info->start[0],
Becky Bruce09ce9922009-02-02 16:34:51 -06001619 MAP_NOCACHE);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001620 }
1621 }
1622
1623 switch(info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +04001624 case CFI_CMDSET_INTEL_PROG_REGIONS:
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001625 case CFI_CMDSET_INTEL_STANDARD:
1626 case CFI_CMDSET_INTEL_EXTENDED:
1627 info->cmd_reset = FLASH_CMD_RESET;
1628 break;
1629 case CFI_CMDSET_AMD_STANDARD:
1630 case CFI_CMDSET_AMD_EXTENDED:
1631 case CFI_CMDSET_AMD_LEGACY:
1632 info->cmd_reset = AMD_CMD_RESET;
1633 break;
1634 }
1635 info->flash_id = FLASH_MAN_CFI;
1636 return 1;
1637 }
1638 return 0; /* use CFI */
1639}
1640#else
Becky Bruce09ce9922009-02-02 16:34:51 -06001641static inline int flash_detect_legacy(phys_addr_t base, int banknum)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001642{
1643 return 0; /* use CFI */
1644}
1645#endif
1646
Stefan Roese260421a2006-11-13 13:55:24 +01001647/*-----------------------------------------------------------------------
wdenk5653fc32004-02-08 22:55:38 +00001648 * detect if flash is compatible with the Common Flash Interface (CFI)
1649 * http://www.jedec.org/download/search/jesd68.pdf
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001650 */
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001651static void flash_read_cfi (flash_info_t *info, void *buf,
1652 unsigned int start, size_t len)
1653{
1654 u8 *p = buf;
1655 unsigned int i;
1656
1657 for (i = 0; i < len; i++)
1658 p[i] = flash_read_uchar(info, start + i);
1659}
1660
Stefan Roesefa36ae72009-10-27 15:15:55 +01001661void __flash_cmd_reset(flash_info_t *info)
1662{
1663 /*
1664 * We do not yet know what kind of commandset to use, so we issue
1665 * the reset command in both Intel and AMD variants, in the hope
1666 * that AMD flash roms ignore the Intel command.
1667 */
1668 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1669 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1670}
1671void flash_cmd_reset(flash_info_t *info)
1672 __attribute__((weak,alias("__flash_cmd_reset")));
1673
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001674static int __flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)
wdenk5653fc32004-02-08 22:55:38 +00001675{
Wolfgang Denk92eb7292006-12-27 01:26:13 +01001676 int cfi_offset;
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001677
Stefan Roesefa36ae72009-10-27 15:15:55 +01001678 /* Issue FLASH reset command */
1679 flash_cmd_reset(info);
Michael Schwingen1ba639d2008-02-18 23:16:35 +01001680
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001681 for (cfi_offset=0;
1682 cfi_offset < sizeof(flash_offset_cfi) / sizeof(uint);
1683 cfi_offset++) {
1684 flash_write_cmd (info, 0, flash_offset_cfi[cfi_offset],
1685 FLASH_CMD_CFI);
1686 if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q')
1687 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R')
1688 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001689 flash_read_cfi(info, qry, FLASH_OFFSET_CFI_RESP,
1690 sizeof(struct cfi_qry));
1691 info->interface = le16_to_cpu(qry->interface_desc);
1692
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001693 info->cfi_offset = flash_offset_cfi[cfi_offset];
1694 debug ("device interface is %d\n",
1695 info->interface);
1696 debug ("found port %d chip %d ",
1697 info->portwidth, info->chipwidth);
1698 debug ("port %d bits chip %d bits\n",
1699 info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1700 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1701
1702 /* calculate command offsets as in the Linux driver */
1703 info->addr_unlock1 = 0x555;
1704 info->addr_unlock2 = 0x2aa;
1705
1706 /*
1707 * modify the unlock address if we are
1708 * in compatibility mode
1709 */
1710 if ( /* x8/x16 in x8 mode */
1711 ((info->chipwidth == FLASH_CFI_BY8) &&
1712 (info->interface == FLASH_CFI_X8X16)) ||
1713 /* x16/x32 in x16 mode */
1714 ((info->chipwidth == FLASH_CFI_BY16) &&
1715 (info->interface == FLASH_CFI_X16X32)))
1716 {
1717 info->addr_unlock1 = 0xaaa;
1718 info->addr_unlock2 = 0x555;
1719 }
1720
1721 info->name = "CFI conformant";
1722 return 1;
1723 }
1724 }
1725
1726 return 0;
1727}
1728
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001729static int flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001730{
wdenkbf9e3b32004-02-12 00:47:09 +00001731 debug ("flash detect cfi\n");
wdenk5653fc32004-02-08 22:55:38 +00001732
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001733 for (info->portwidth = CONFIG_SYS_FLASH_CFI_WIDTH;
wdenkbf9e3b32004-02-12 00:47:09 +00001734 info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) {
1735 for (info->chipwidth = FLASH_CFI_BY8;
1736 info->chipwidth <= info->portwidth;
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001737 info->chipwidth <<= 1)
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001738 if (__flash_detect_cfi(info, qry))
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001739 return 1;
wdenk5653fc32004-02-08 22:55:38 +00001740 }
wdenkbf9e3b32004-02-12 00:47:09 +00001741 debug ("not found\n");
wdenk5653fc32004-02-08 22:55:38 +00001742 return 0;
1743}
wdenkbf9e3b32004-02-12 00:47:09 +00001744
wdenk5653fc32004-02-08 22:55:38 +00001745/*
Haavard Skinnemoen467bcee2007-12-14 15:36:18 +01001746 * Manufacturer-specific quirks. Add workarounds for geometry
1747 * reversal, etc. here.
1748 */
1749static void flash_fixup_amd(flash_info_t *info, struct cfi_qry *qry)
1750{
1751 /* check if flash geometry needs reversal */
1752 if (qry->num_erase_regions > 1) {
1753 /* reverse geometry if top boot part */
1754 if (info->cfi_version < 0x3131) {
1755 /* CFI < 1.1, try to guess from device id */
1756 if ((info->device_id & 0x80) != 0)
1757 cfi_reverse_geometry(qry);
1758 } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
1759 /* CFI >= 1.1, deduct from top/bottom flag */
1760 /* note: ext_addr is valid since cfi_version > 0 */
1761 cfi_reverse_geometry(qry);
1762 }
1763 }
1764}
1765
1766static void flash_fixup_atmel(flash_info_t *info, struct cfi_qry *qry)
1767{
1768 int reverse_geometry = 0;
1769
1770 /* Check the "top boot" bit in the PRI */
1771 if (info->ext_addr && !(flash_read_uchar(info, info->ext_addr + 6) & 1))
1772 reverse_geometry = 1;
1773
1774 /* AT49BV6416(T) list the erase regions in the wrong order.
1775 * However, the device ID is identical with the non-broken
Ulf Samuelssoncb82a532009-03-27 23:26:43 +01001776 * AT49BV642D they differ in the high byte.
Haavard Skinnemoen467bcee2007-12-14 15:36:18 +01001777 */
Haavard Skinnemoen467bcee2007-12-14 15:36:18 +01001778 if (info->device_id == 0xd6 || info->device_id == 0xd2)
1779 reverse_geometry = !reverse_geometry;
Haavard Skinnemoen467bcee2007-12-14 15:36:18 +01001780
1781 if (reverse_geometry)
1782 cfi_reverse_geometry(qry);
1783}
1784
Richard Retanubune8eac432009-01-14 08:44:26 -05001785static void flash_fixup_stm(flash_info_t *info, struct cfi_qry *qry)
1786{
1787 /* check if flash geometry needs reversal */
1788 if (qry->num_erase_regions > 1) {
1789 /* reverse geometry if top boot part */
1790 if (info->cfi_version < 0x3131) {
Richard Retanubun7a886012009-03-06 10:09:37 -05001791 /* CFI < 1.1, guess by device id (M29W320{DT,ET} only) */
1792 if (info->device_id == 0x22CA ||
1793 info->device_id == 0x2256) {
Richard Retanubune8eac432009-01-14 08:44:26 -05001794 cfi_reverse_geometry(qry);
1795 }
1796 }
1797 }
1798}
1799
Haavard Skinnemoen467bcee2007-12-14 15:36:18 +01001800/*
wdenk5653fc32004-02-08 22:55:38 +00001801 * The following code cannot be run from FLASH!
1802 *
1803 */
Becky Bruce09ce9922009-02-02 16:34:51 -06001804ulong flash_get_size (phys_addr_t base, int banknum)
wdenk5653fc32004-02-08 22:55:38 +00001805{
wdenkbf9e3b32004-02-12 00:47:09 +00001806 flash_info_t *info = &flash_info[banknum];
wdenk5653fc32004-02-08 22:55:38 +00001807 int i, j;
1808 flash_sect_t sect_cnt;
Becky Bruce09ce9922009-02-02 16:34:51 -06001809 phys_addr_t sector;
wdenk5653fc32004-02-08 22:55:38 +00001810 unsigned long tmp;
1811 int size_ratio;
1812 uchar num_erase_regions;
wdenkbf9e3b32004-02-12 00:47:09 +00001813 int erase_region_size;
1814 int erase_region_count;
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001815 struct cfi_qry qry;
Stefan Roese260421a2006-11-13 13:55:24 +01001816
Kumar Galaf9796902008-05-15 15:13:08 -05001817 memset(&qry, 0, sizeof(qry));
1818
Stefan Roese260421a2006-11-13 13:55:24 +01001819 info->ext_addr = 0;
1820 info->cfi_version = 0;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001821#ifdef CONFIG_SYS_FLASH_PROTECTION
Stefan Roese2662b402006-04-01 13:41:03 +02001822 info->legacy_unlock = 0;
1823#endif
wdenk5653fc32004-02-08 22:55:38 +00001824
Becky Bruce09ce9922009-02-02 16:34:51 -06001825 info->start[0] = (ulong)map_physmem(base, info->portwidth, MAP_NOCACHE);
wdenk5653fc32004-02-08 22:55:38 +00001826
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001827 if (flash_detect_cfi (info, &qry)) {
1828 info->vendor = le16_to_cpu(qry.p_id);
1829 info->ext_addr = le16_to_cpu(qry.p_adr);
1830 num_erase_regions = qry.num_erase_regions;
1831
Stefan Roese260421a2006-11-13 13:55:24 +01001832 if (info->ext_addr) {
1833 info->cfi_version = (ushort) flash_read_uchar (info,
1834 info->ext_addr + 3) << 8;
1835 info->cfi_version |= (ushort) flash_read_uchar (info,
1836 info->ext_addr + 4);
1837 }
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001838
wdenkbf9e3b32004-02-12 00:47:09 +00001839#ifdef DEBUG
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001840 flash_printqry (&qry);
wdenkbf9e3b32004-02-12 00:47:09 +00001841#endif
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001842
wdenkbf9e3b32004-02-12 00:47:09 +00001843 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +04001844 case CFI_CMDSET_INTEL_PROG_REGIONS:
wdenk5653fc32004-02-08 22:55:38 +00001845 case CFI_CMDSET_INTEL_STANDARD:
1846 case CFI_CMDSET_INTEL_EXTENDED:
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001847 cmdset_intel_init(info, &qry);
wdenk5653fc32004-02-08 22:55:38 +00001848 break;
1849 case CFI_CMDSET_AMD_STANDARD:
1850 case CFI_CMDSET_AMD_EXTENDED:
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001851 cmdset_amd_init(info, &qry);
wdenk5653fc32004-02-08 22:55:38 +00001852 break;
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001853 default:
1854 printf("CFI: Unknown command set 0x%x\n",
1855 info->vendor);
1856 /*
1857 * Unfortunately, this means we don't know how
1858 * to get the chip back to Read mode. Might
1859 * as well try an Intel-style reset...
1860 */
1861 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1862 return 0;
wdenk5653fc32004-02-08 22:55:38 +00001863 }
wdenkcd37d9e2004-02-10 00:03:41 +00001864
Haavard Skinnemoen467bcee2007-12-14 15:36:18 +01001865 /* Do manufacturer-specific fixups */
1866 switch (info->manufacturer_id) {
1867 case 0x0001:
1868 flash_fixup_amd(info, &qry);
1869 break;
1870 case 0x001f:
1871 flash_fixup_atmel(info, &qry);
1872 break;
Richard Retanubune8eac432009-01-14 08:44:26 -05001873 case 0x0020:
1874 flash_fixup_stm(info, &qry);
1875 break;
Haavard Skinnemoen467bcee2007-12-14 15:36:18 +01001876 }
1877
wdenkbf9e3b32004-02-12 00:47:09 +00001878 debug ("manufacturer is %d\n", info->vendor);
Stefan Roese260421a2006-11-13 13:55:24 +01001879 debug ("manufacturer id is 0x%x\n", info->manufacturer_id);
1880 debug ("device id is 0x%x\n", info->device_id);
1881 debug ("device id2 is 0x%x\n", info->device_id2);
1882 debug ("cfi version is 0x%04x\n", info->cfi_version);
1883
wdenk5653fc32004-02-08 22:55:38 +00001884 size_ratio = info->portwidth / info->chipwidth;
wdenkbf9e3b32004-02-12 00:47:09 +00001885 /* if the chip is x8/x16 reduce the ratio by half */
1886 if ((info->interface == FLASH_CFI_X8X16)
1887 && (info->chipwidth == FLASH_CFI_BY8)) {
1888 size_ratio >>= 1;
1889 }
wdenkbf9e3b32004-02-12 00:47:09 +00001890 debug ("size_ratio %d port %d bits chip %d bits\n",
1891 size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1892 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1893 debug ("found %d erase regions\n", num_erase_regions);
wdenk5653fc32004-02-08 22:55:38 +00001894 sect_cnt = 0;
1895 sector = base;
wdenkbf9e3b32004-02-12 00:47:09 +00001896 for (i = 0; i < num_erase_regions; i++) {
1897 if (i > NUM_ERASE_REGIONS) {
wdenk028ab6b2004-02-23 23:54:43 +00001898 printf ("%d erase regions found, only %d used\n",
1899 num_erase_regions, NUM_ERASE_REGIONS);
wdenk5653fc32004-02-08 22:55:38 +00001900 break;
1901 }
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001902
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001903 tmp = le32_to_cpu(qry.erase_region_info[i]);
1904 debug("erase region %u: 0x%08lx\n", i, tmp);
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001905
1906 erase_region_count = (tmp & 0xffff) + 1;
1907 tmp >>= 16;
wdenkbf9e3b32004-02-12 00:47:09 +00001908 erase_region_size =
1909 (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
wdenk4c0d4c32004-06-09 17:34:58 +00001910 debug ("erase_region_count = %d erase_region_size = %d\n",
wdenk028ab6b2004-02-23 23:54:43 +00001911 erase_region_count, erase_region_size);
wdenkbf9e3b32004-02-12 00:47:09 +00001912 for (j = 0; j < erase_region_count; j++) {
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001913 if (sect_cnt >= CONFIG_SYS_MAX_FLASH_SECT) {
Michael Schwingen81b20cc2007-12-07 23:35:02 +01001914 printf("ERROR: too many flash sectors\n");
1915 break;
1916 }
Becky Bruce09ce9922009-02-02 16:34:51 -06001917 info->start[sect_cnt] =
1918 (ulong)map_physmem(sector,
1919 info->portwidth,
1920 MAP_NOCACHE);
wdenk5653fc32004-02-08 22:55:38 +00001921 sector += (erase_region_size * size_ratio);
wdenka1191902005-01-09 17:12:27 +00001922
1923 /*
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001924 * Only read protection status from
1925 * supported devices (intel...)
wdenka1191902005-01-09 17:12:27 +00001926 */
1927 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +04001928 case CFI_CMDSET_INTEL_PROG_REGIONS:
wdenka1191902005-01-09 17:12:27 +00001929 case CFI_CMDSET_INTEL_EXTENDED:
1930 case CFI_CMDSET_INTEL_STANDARD:
1931 info->protect[sect_cnt] =
1932 flash_isset (info, sect_cnt,
1933 FLASH_OFFSET_PROTECT,
1934 FLASH_STATUS_PROTECT);
1935 break;
1936 default:
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001937 /* default: not protected */
1938 info->protect[sect_cnt] = 0;
wdenka1191902005-01-09 17:12:27 +00001939 }
1940
wdenk5653fc32004-02-08 22:55:38 +00001941 sect_cnt++;
1942 }
1943 }
1944
1945 info->sector_count = sect_cnt;
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001946 info->size = 1 << qry.dev_size;
wdenk5653fc32004-02-08 22:55:38 +00001947 /* multiply the size by the number of chips */
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001948 info->size *= size_ratio;
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001949 info->buffer_size = 1 << le16_to_cpu(qry.max_buf_write_size);
1950 tmp = 1 << qry.block_erase_timeout_typ;
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001951 info->erase_blk_tout = tmp *
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001952 (1 << qry.block_erase_timeout_max);
1953 tmp = (1 << qry.buf_write_timeout_typ) *
1954 (1 << qry.buf_write_timeout_max);
1955
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001956 /* round up when converting to ms */
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001957 info->buffer_write_tout = (tmp + 999) / 1000;
1958 tmp = (1 << qry.word_write_timeout_typ) *
1959 (1 << qry.word_write_timeout_max);
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001960 /* round up when converting to ms */
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001961 info->write_tout = (tmp + 999) / 1000;
wdenk5653fc32004-02-08 22:55:38 +00001962 info->flash_id = FLASH_MAN_CFI;
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001963 if ((info->interface == FLASH_CFI_X8X16) &&
1964 (info->chipwidth == FLASH_CFI_BY8)) {
1965 /* XXX - Need to test on x8/x16 in parallel. */
1966 info->portwidth >>= 1;
wdenk855a4962004-03-14 18:23:55 +00001967 }
Mike Frysinger22159872008-10-02 01:55:38 -04001968
1969 flash_write_cmd (info, 0, 0, info->cmd_reset);
wdenk5653fc32004-02-08 22:55:38 +00001970 }
1971
wdenkbf9e3b32004-02-12 00:47:09 +00001972 return (info->size);
wdenk5653fc32004-02-08 22:55:38 +00001973}
1974
Piotr Ziecik6ea808e2008-11-17 15:49:32 +01001975void flash_set_verbose(uint v)
1976{
1977 flash_verbose = v;
1978}
1979
wdenk5653fc32004-02-08 22:55:38 +00001980/*-----------------------------------------------------------------------
1981 */
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001982unsigned long flash_init (void)
wdenk5653fc32004-02-08 22:55:38 +00001983{
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001984 unsigned long size = 0;
1985 int i;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001986#if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
Matthias Fuchsc63ad632008-04-18 16:29:40 +02001987 struct apl_s {
1988 ulong start;
1989 ulong size;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001990 } apl[] = CONFIG_SYS_FLASH_AUTOPROTECT_LIST;
Matthias Fuchsc63ad632008-04-18 16:29:40 +02001991#endif
wdenk5653fc32004-02-08 22:55:38 +00001992
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001993#ifdef CONFIG_SYS_FLASH_PROTECTION
Eric Schumann3a3baf32009-03-21 09:59:34 -04001994 /* read environment from EEPROM */
1995 char s[64];
1996 getenv_r ("unlock", s, sizeof(s));
Michael Schwingen81b20cc2007-12-07 23:35:02 +01001997#endif
wdenk5653fc32004-02-08 22:55:38 +00001998
Becky Bruce09ce9922009-02-02 16:34:51 -06001999#define BANK_BASE(i) (((phys_addr_t [CFI_MAX_FLASH_BANKS])CONFIG_SYS_FLASH_BANKS_LIST)[i])
Wolfgang Denk2a112b22008-08-08 16:39:54 +02002000
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002001 /* Init: no FLASHes known */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002002 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002003 flash_info[i].flash_id = FLASH_UNKNOWN;
wdenk5653fc32004-02-08 22:55:38 +00002004
Wolfgang Denk2a112b22008-08-08 16:39:54 +02002005 if (!flash_detect_legacy (BANK_BASE(i), i))
2006 flash_get_size (BANK_BASE(i), i);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002007 size += flash_info[i].size;
2008 if (flash_info[i].flash_id == FLASH_UNKNOWN) {
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002009#ifndef CONFIG_SYS_FLASH_QUIET_TEST
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002010 printf ("## Unknown FLASH on Bank %d "
2011 "- Size = 0x%08lx = %ld MB\n",
2012 i+1, flash_info[i].size,
2013 flash_info[i].size << 20);
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002014#endif /* CONFIG_SYS_FLASH_QUIET_TEST */
wdenk5653fc32004-02-08 22:55:38 +00002015 }
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002016#ifdef CONFIG_SYS_FLASH_PROTECTION
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002017 else if ((s != NULL) && (strcmp(s, "yes") == 0)) {
2018 /*
2019 * Only the U-Boot image and it's environment
2020 * is protected, all other sectors are
2021 * unprotected (unlocked) if flash hardware
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002022 * protection is used (CONFIG_SYS_FLASH_PROTECTION)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002023 * and the environment variable "unlock" is
2024 * set to "yes".
2025 */
2026 if (flash_info[i].legacy_unlock) {
2027 int k;
Stefan Roese79b4cda2006-02-28 15:29:58 +01002028
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002029 /*
2030 * Disable legacy_unlock temporarily,
2031 * since flash_real_protect would
2032 * relock all other sectors again
2033 * otherwise.
2034 */
2035 flash_info[i].legacy_unlock = 0;
Stefan Roese79b4cda2006-02-28 15:29:58 +01002036
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002037 /*
2038 * Legacy unlocking (e.g. Intel J3) ->
2039 * unlock only one sector. This will
2040 * unlock all sectors.
2041 */
2042 flash_real_protect (&flash_info[i], 0, 0);
Stefan Roese79b4cda2006-02-28 15:29:58 +01002043
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002044 flash_info[i].legacy_unlock = 1;
2045
2046 /*
2047 * Manually mark other sectors as
2048 * unlocked (unprotected)
2049 */
2050 for (k = 1; k < flash_info[i].sector_count; k++)
2051 flash_info[i].protect[k] = 0;
2052 } else {
2053 /*
2054 * No legancy unlocking -> unlock all sectors
2055 */
2056 flash_protect (FLAG_PROTECT_CLEAR,
2057 flash_info[i].start[0],
2058 flash_info[i].start[0]
2059 + flash_info[i].size - 1,
2060 &flash_info[i]);
2061 }
Stefan Roese79b4cda2006-02-28 15:29:58 +01002062 }
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002063#endif /* CONFIG_SYS_FLASH_PROTECTION */
wdenk5653fc32004-02-08 22:55:38 +00002064 }
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002065
2066 /* Monitor protection ON by default */
Wolfgang Wegner8f9a2212010-03-02 10:59:19 +01002067#if (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE) && \
2068 (!defined(CONFIG_MONITOR_IS_IN_RAM))
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002069 flash_protect (FLAG_PROTECT_SET,
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002070 CONFIG_SYS_MONITOR_BASE,
2071 CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1,
2072 flash_get_info(CONFIG_SYS_MONITOR_BASE));
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002073#endif
2074
2075 /* Environment protection ON by default */
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +02002076#ifdef CONFIG_ENV_IS_IN_FLASH
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002077 flash_protect (FLAG_PROTECT_SET,
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +02002078 CONFIG_ENV_ADDR,
2079 CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1,
2080 flash_get_info(CONFIG_ENV_ADDR));
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002081#endif
2082
2083 /* Redundant environment protection ON by default */
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +02002084#ifdef CONFIG_ENV_ADDR_REDUND
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002085 flash_protect (FLAG_PROTECT_SET,
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +02002086 CONFIG_ENV_ADDR_REDUND,
Wolfgang Denkdfcd7f22009-05-15 00:16:03 +02002087 CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1,
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +02002088 flash_get_info(CONFIG_ENV_ADDR_REDUND));
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002089#endif
Matthias Fuchsc63ad632008-04-18 16:29:40 +02002090
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002091#if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
Matthias Fuchsc63ad632008-04-18 16:29:40 +02002092 for (i = 0; i < (sizeof(apl) / sizeof(struct apl_s)); i++) {
2093 debug("autoprotecting from %08x to %08x\n",
2094 apl[i].start, apl[i].start + apl[i].size - 1);
2095 flash_protect (FLAG_PROTECT_SET,
2096 apl[i].start,
2097 apl[i].start + apl[i].size - 1,
2098 flash_get_info(apl[i].start));
2099 }
2100#endif
Piotr Ziecik91809ed2008-11-17 15:57:58 +01002101
2102#ifdef CONFIG_FLASH_CFI_MTD
2103 cfi_mtd_init();
2104#endif
2105
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002106 return (size);
wdenk5653fc32004-02-08 22:55:38 +00002107}