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wdenk5653fc32004-02-08 22:55:38 +00001/*
wdenkbf9e3b32004-02-12 00:47:09 +00002 * (C) Copyright 2002-2004
wdenk5653fc32004-02-08 22:55:38 +00003 * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
4 *
5 * Copyright (C) 2003 Arabella Software Ltd.
6 * Yuli Barcohen <yuli@arabellasw.com>
wdenk5653fc32004-02-08 22:55:38 +00007 *
wdenkbf9e3b32004-02-12 00:47:09 +00008 * Copyright (C) 2004
9 * Ed Okerson
Stefan Roese260421a2006-11-13 13:55:24 +010010 *
11 * Copyright (C) 2006
12 * Tolunay Orkun <listmember@orkun.us>
wdenkbf9e3b32004-02-12 00:47:09 +000013 *
wdenk5653fc32004-02-08 22:55:38 +000014 * See file CREDITS for list of people who contributed to this
15 * project.
16 *
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation; either version 2 of
20 * the License, or (at your option) any later version.
21 *
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
26 *
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30 * MA 02111-1307 USA
31 *
wdenk5653fc32004-02-08 22:55:38 +000032 */
33
34/* The DEBUG define must be before common to enable debugging */
wdenk2d1a5372004-02-23 19:30:57 +000035/* #define DEBUG */
36
wdenk5653fc32004-02-08 22:55:38 +000037#include <common.h>
38#include <asm/processor.h>
Haiying Wang3a197b22007-02-21 16:52:31 +010039#include <asm/io.h>
wdenk4c0d4c32004-06-09 17:34:58 +000040#include <asm/byteorder.h>
wdenk2a8af182005-04-13 10:02:42 +000041#include <environment.h>
wdenk028ab6b2004-02-23 23:54:43 +000042
wdenk5653fc32004-02-08 22:55:38 +000043/*
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +010044 * This file implements a Common Flash Interface (CFI) driver for
45 * U-Boot.
46 *
47 * The width of the port and the width of the chips are determined at
48 * initialization. These widths are used to calculate the address for
49 * access CFI data structures.
wdenk5653fc32004-02-08 22:55:38 +000050 *
51 * References
52 * JEDEC Standard JESD68 - Common Flash Interface (CFI)
53 * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
54 * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
55 * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
Stefan Roese260421a2006-11-13 13:55:24 +010056 * AMD CFI Specification, Release 2.0 December 1, 2001
57 * AMD/Spansion Application Note: Migration from Single-byte to Three-byte
58 * Device IDs, Publication Number 25538 Revision A, November 8, 2001
wdenk5653fc32004-02-08 22:55:38 +000059 *
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020060 * Define CONFIG_SYS_WRITE_SWAPPED_DATA, if you have to swap the Bytes between
Heiko Schocherd0b6e142007-01-19 18:05:26 +010061 * reading and writing ... (yes there is such a Hardware).
wdenk5653fc32004-02-08 22:55:38 +000062 */
63
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020064#ifndef CONFIG_SYS_FLASH_BANKS_LIST
65#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
wdenkbf9e3b32004-02-12 00:47:09 +000066#endif
67
wdenk5653fc32004-02-08 22:55:38 +000068#define FLASH_CMD_CFI 0x98
69#define FLASH_CMD_READ_ID 0x90
70#define FLASH_CMD_RESET 0xff
71#define FLASH_CMD_BLOCK_ERASE 0x20
72#define FLASH_CMD_ERASE_CONFIRM 0xD0
73#define FLASH_CMD_WRITE 0x40
74#define FLASH_CMD_PROTECT 0x60
75#define FLASH_CMD_PROTECT_SET 0x01
76#define FLASH_CMD_PROTECT_CLEAR 0xD0
77#define FLASH_CMD_CLEAR_STATUS 0x50
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +040078#define FLASH_CMD_READ_STATUS 0x70
wdenkbf9e3b32004-02-12 00:47:09 +000079#define FLASH_CMD_WRITE_TO_BUFFER 0xE8
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +040080#define FLASH_CMD_WRITE_BUFFER_PROG 0xE9
wdenkbf9e3b32004-02-12 00:47:09 +000081#define FLASH_CMD_WRITE_BUFFER_CONFIRM 0xD0
wdenk5653fc32004-02-08 22:55:38 +000082
83#define FLASH_STATUS_DONE 0x80
84#define FLASH_STATUS_ESS 0x40
85#define FLASH_STATUS_ECLBS 0x20
86#define FLASH_STATUS_PSLBS 0x10
87#define FLASH_STATUS_VPENS 0x08
88#define FLASH_STATUS_PSS 0x04
89#define FLASH_STATUS_DPS 0x02
90#define FLASH_STATUS_R 0x01
91#define FLASH_STATUS_PROTECT 0x01
92
93#define AMD_CMD_RESET 0xF0
94#define AMD_CMD_WRITE 0xA0
95#define AMD_CMD_ERASE_START 0x80
96#define AMD_CMD_ERASE_SECTOR 0x30
wdenk855a4962004-03-14 18:23:55 +000097#define AMD_CMD_UNLOCK_START 0xAA
98#define AMD_CMD_UNLOCK_ACK 0x55
Stefan Roese79b4cda2006-02-28 15:29:58 +010099#define AMD_CMD_WRITE_TO_BUFFER 0x25
100#define AMD_CMD_WRITE_BUFFER_CONFIRM 0x29
wdenk5653fc32004-02-08 22:55:38 +0000101
102#define AMD_STATUS_TOGGLE 0x40
103#define AMD_STATUS_ERROR 0x20
Stefan Roese79b4cda2006-02-28 15:29:58 +0100104
Rafael Camposbc9019e2008-07-31 10:22:20 +0200105#define ATM_CMD_UNLOCK_SECT 0x70
106#define ATM_CMD_SOFTLOCK_START 0x80
107#define ATM_CMD_LOCK_SECT 0x40
108
Stefan Roese260421a2006-11-13 13:55:24 +0100109#define FLASH_OFFSET_MANUFACTURER_ID 0x00
110#define FLASH_OFFSET_DEVICE_ID 0x01
111#define FLASH_OFFSET_DEVICE_ID2 0x0E
112#define FLASH_OFFSET_DEVICE_ID3 0x0F
wdenk5653fc32004-02-08 22:55:38 +0000113#define FLASH_OFFSET_CFI 0x55
Wolfgang Denk92eb7292006-12-27 01:26:13 +0100114#define FLASH_OFFSET_CFI_ALT 0x555
wdenk5653fc32004-02-08 22:55:38 +0000115#define FLASH_OFFSET_CFI_RESP 0x10
wdenkbf9e3b32004-02-12 00:47:09 +0000116#define FLASH_OFFSET_PRIMARY_VENDOR 0x13
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +0100117/* extended query table primary address */
118#define FLASH_OFFSET_EXT_QUERY_T_P_ADDR 0x15
wdenk5653fc32004-02-08 22:55:38 +0000119#define FLASH_OFFSET_WTOUT 0x1F
wdenkbf9e3b32004-02-12 00:47:09 +0000120#define FLASH_OFFSET_WBTOUT 0x20
wdenk5653fc32004-02-08 22:55:38 +0000121#define FLASH_OFFSET_ETOUT 0x21
wdenkbf9e3b32004-02-12 00:47:09 +0000122#define FLASH_OFFSET_CETOUT 0x22
wdenk5653fc32004-02-08 22:55:38 +0000123#define FLASH_OFFSET_WMAX_TOUT 0x23
wdenkbf9e3b32004-02-12 00:47:09 +0000124#define FLASH_OFFSET_WBMAX_TOUT 0x24
wdenk5653fc32004-02-08 22:55:38 +0000125#define FLASH_OFFSET_EMAX_TOUT 0x25
wdenkbf9e3b32004-02-12 00:47:09 +0000126#define FLASH_OFFSET_CEMAX_TOUT 0x26
wdenk5653fc32004-02-08 22:55:38 +0000127#define FLASH_OFFSET_SIZE 0x27
wdenkbf9e3b32004-02-12 00:47:09 +0000128#define FLASH_OFFSET_INTERFACE 0x28
129#define FLASH_OFFSET_BUFFER_SIZE 0x2A
wdenk5653fc32004-02-08 22:55:38 +0000130#define FLASH_OFFSET_NUM_ERASE_REGIONS 0x2C
131#define FLASH_OFFSET_ERASE_REGIONS 0x2D
132#define FLASH_OFFSET_PROTECT 0x02
wdenkbf9e3b32004-02-12 00:47:09 +0000133#define FLASH_OFFSET_USER_PROTECTION 0x85
134#define FLASH_OFFSET_INTEL_PROTECTION 0x81
wdenk5653fc32004-02-08 22:55:38 +0000135
Stefan Roese260421a2006-11-13 13:55:24 +0100136#define CFI_CMDSET_NONE 0
137#define CFI_CMDSET_INTEL_EXTENDED 1
138#define CFI_CMDSET_AMD_STANDARD 2
139#define CFI_CMDSET_INTEL_STANDARD 3
140#define CFI_CMDSET_AMD_EXTENDED 4
141#define CFI_CMDSET_MITSU_STANDARD 256
142#define CFI_CMDSET_MITSU_EXTENDED 257
143#define CFI_CMDSET_SST 258
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +0400144#define CFI_CMDSET_INTEL_PROG_REGIONS 512
wdenk5653fc32004-02-08 22:55:38 +0000145
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200146#ifdef CONFIG_SYS_FLASH_CFI_AMD_RESET /* needed for STM_ID_29W320DB on UC100 */
wdenkf7d15722004-12-18 22:35:43 +0000147# undef FLASH_CMD_RESET
Stefan Roese260421a2006-11-13 13:55:24 +0100148# define FLASH_CMD_RESET AMD_CMD_RESET /* use AMD-Reset instead */
wdenkf7d15722004-12-18 22:35:43 +0000149#endif
150
wdenk5653fc32004-02-08 22:55:38 +0000151typedef union {
152 unsigned char c;
153 unsigned short w;
154 unsigned long l;
155 unsigned long long ll;
156} cfiword_t;
157
Stefan Roese260421a2006-11-13 13:55:24 +0100158#define NUM_ERASE_REGIONS 4 /* max. number of erase regions */
wdenk5653fc32004-02-08 22:55:38 +0000159
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +0100160static uint flash_offset_cfi[2] = { FLASH_OFFSET_CFI, FLASH_OFFSET_CFI_ALT };
Wolfgang Denk92eb7292006-12-27 01:26:13 +0100161
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200162/* use CONFIG_SYS_MAX_FLASH_BANKS_DETECT if defined */
163#ifdef CONFIG_SYS_MAX_FLASH_BANKS_DETECT
164# define CFI_MAX_FLASH_BANKS CONFIG_SYS_MAX_FLASH_BANKS_DETECT
Marian Balakowicze6f2e902005-10-11 19:09:42 +0200165#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200166# define CFI_MAX_FLASH_BANKS CONFIG_SYS_MAX_FLASH_BANKS
Marian Balakowicze6f2e902005-10-11 19:09:42 +0200167#endif
wdenk5653fc32004-02-08 22:55:38 +0000168
Wolfgang Denk2a112b22008-08-08 16:39:54 +0200169flash_info_t flash_info[CFI_MAX_FLASH_BANKS]; /* FLASH chips info */
170
Stefan Roese79b4cda2006-02-28 15:29:58 +0100171/*
172 * Check if chip width is defined. If not, start detecting with 8bit.
173 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200174#ifndef CONFIG_SYS_FLASH_CFI_WIDTH
175#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
Stefan Roese79b4cda2006-02-28 15:29:58 +0100176#endif
177
wdenk5653fc32004-02-08 22:55:38 +0000178typedef unsigned long flash_sect_t;
179
Haavard Skinnemoene23741f2007-12-14 15:36:16 +0100180/* CFI standard query structure */
181struct cfi_qry {
182 u8 qry[3];
183 u16 p_id;
184 u16 p_adr;
185 u16 a_id;
186 u16 a_adr;
187 u8 vcc_min;
188 u8 vcc_max;
189 u8 vpp_min;
190 u8 vpp_max;
191 u8 word_write_timeout_typ;
192 u8 buf_write_timeout_typ;
193 u8 block_erase_timeout_typ;
194 u8 chip_erase_timeout_typ;
195 u8 word_write_timeout_max;
196 u8 buf_write_timeout_max;
197 u8 block_erase_timeout_max;
198 u8 chip_erase_timeout_max;
199 u8 dev_size;
200 u16 interface_desc;
201 u16 max_buf_write_size;
202 u8 num_erase_regions;
203 u32 erase_region_info[NUM_ERASE_REGIONS];
204} __attribute__((packed));
205
206struct cfi_pri_hdr {
207 u8 pri[3];
208 u8 major_version;
209 u8 minor_version;
210} __attribute__((packed));
211
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100212static void flash_write8(u8 value, void *addr)
213{
214 __raw_writeb(value, addr);
215}
216
217static void flash_write16(u16 value, void *addr)
218{
219 __raw_writew(value, addr);
220}
221
222static void flash_write32(u32 value, void *addr)
223{
224 __raw_writel(value, addr);
225}
226
227static void flash_write64(u64 value, void *addr)
228{
229 /* No architectures currently implement __raw_writeq() */
230 *(volatile u64 *)addr = value;
231}
232
233static u8 flash_read8(void *addr)
234{
235 return __raw_readb(addr);
236}
237
238static u16 flash_read16(void *addr)
239{
240 return __raw_readw(addr);
241}
242
243static u32 flash_read32(void *addr)
244{
245 return __raw_readl(addr);
246}
247
Daniel Hellstrom97bf85d2008-03-28 20:40:19 +0100248static u64 __flash_read64(void *addr)
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100249{
250 /* No architectures currently implement __raw_readq() */
251 return *(volatile u64 *)addr;
252}
253
Daniel Hellstrom97bf85d2008-03-28 20:40:19 +0100254u64 flash_read64(void *addr)__attribute__((weak, alias("__flash_read64")));
255
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200256/*-----------------------------------------------------------------------
257 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200258#if defined(CONFIG_ENV_IS_IN_FLASH) || defined(CONFIG_ENV_ADDR_REDUND) || (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200259static flash_info_t *flash_get_info(ulong base)
260{
261 int i;
262 flash_info_t * info = 0;
263
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200264 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200265 info = & flash_info[i];
266 if (info->size && info->start[0] <= base &&
267 base <= info->start[0] + info->size - 1)
268 break;
269 }
270
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200271 return i == CONFIG_SYS_MAX_FLASH_BANKS ? 0 : info;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200272}
wdenk5653fc32004-02-08 22:55:38 +0000273#endif
274
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100275unsigned long flash_sector_size(flash_info_t *info, flash_sect_t sect)
276{
277 if (sect != (info->sector_count - 1))
278 return info->start[sect + 1] - info->start[sect];
279 else
280 return info->start[0] + info->size - info->start[sect];
281}
282
wdenk5653fc32004-02-08 22:55:38 +0000283/*-----------------------------------------------------------------------
284 * create an address based on the offset and the port width
285 */
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100286static inline void *
287flash_map (flash_info_t * info, flash_sect_t sect, uint offset)
wdenk5653fc32004-02-08 22:55:38 +0000288{
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100289 unsigned int byte_offset = offset * info->portwidth;
290
291 return map_physmem(info->start[sect] + byte_offset,
292 flash_sector_size(info, sect) - byte_offset,
293 MAP_NOCACHE);
294}
295
296static inline void flash_unmap(flash_info_t *info, flash_sect_t sect,
297 unsigned int offset, void *addr)
298{
299 unsigned int byte_offset = offset * info->portwidth;
300
301 unmap_physmem(addr, flash_sector_size(info, sect) - byte_offset);
wdenk5653fc32004-02-08 22:55:38 +0000302}
wdenkbf9e3b32004-02-12 00:47:09 +0000303
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200304/*-----------------------------------------------------------------------
305 * make a proper sized command based on the port and chip widths
306 */
Sebastian Siewior7288f972008-07-15 13:35:23 +0200307static void flash_make_cmd(flash_info_t *info, u32 cmd, void *cmdbuf)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200308{
309 int i;
Vasiliy Leoenenko93c56f22008-05-07 21:24:44 +0400310 int cword_offset;
311 int cp_offset;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200312#if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Sebastian Siewior340ccb22008-07-16 20:04:49 +0200313 u32 cmd_le = cpu_to_le32(cmd);
314#endif
Vasiliy Leoenenko93c56f22008-05-07 21:24:44 +0400315 uchar val;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200316 uchar *cp = (uchar *) cmdbuf;
317
Vasiliy Leoenenko93c56f22008-05-07 21:24:44 +0400318 for (i = info->portwidth; i > 0; i--){
319 cword_offset = (info->portwidth-i)%info->chipwidth;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200320#if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Vasiliy Leoenenko93c56f22008-05-07 21:24:44 +0400321 cp_offset = info->portwidth - i;
Sebastian Siewior340ccb22008-07-16 20:04:49 +0200322 val = *((uchar*)&cmd_le + cword_offset);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200323#else
Vasiliy Leoenenko93c56f22008-05-07 21:24:44 +0400324 cp_offset = i - 1;
Sebastian Siewior7288f972008-07-15 13:35:23 +0200325 val = *((uchar*)&cmd + sizeof(u32) - cword_offset - 1);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200326#endif
Sebastian Siewior7288f972008-07-15 13:35:23 +0200327 cp[cp_offset] = (cword_offset >= sizeof(u32)) ? 0x00 : val;
Vasiliy Leoenenko93c56f22008-05-07 21:24:44 +0400328 }
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200329}
330
wdenkbf9e3b32004-02-12 00:47:09 +0000331#ifdef DEBUG
332/*-----------------------------------------------------------------------
333 * Debug support
334 */
Haavard Skinnemoen30557932007-12-13 12:56:29 +0100335static void print_longlong (char *str, unsigned long long data)
wdenkbf9e3b32004-02-12 00:47:09 +0000336{
337 int i;
338 char *cp;
339
340 cp = (unsigned char *) &data;
341 for (i = 0; i < 8; i++)
342 sprintf (&str[i * 2], "%2.2x", *cp++);
343}
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200344
Haavard Skinnemoene23741f2007-12-14 15:36:16 +0100345static void flash_printqry (struct cfi_qry *qry)
wdenkbf9e3b32004-02-12 00:47:09 +0000346{
Haavard Skinnemoene23741f2007-12-14 15:36:16 +0100347 u8 *p = (u8 *)qry;
wdenkbf9e3b32004-02-12 00:47:09 +0000348 int x, y;
349
Haavard Skinnemoene23741f2007-12-14 15:36:16 +0100350 for (x = 0; x < sizeof(struct cfi_qry); x += 16) {
351 debug("%02x : ", x);
352 for (y = 0; y < 16; y++)
353 debug("%2.2x ", p[x + y]);
354 debug(" ");
wdenkbf9e3b32004-02-12 00:47:09 +0000355 for (y = 0; y < 16; y++) {
Haavard Skinnemoene23741f2007-12-14 15:36:16 +0100356 unsigned char c = p[x + y];
357 if (c >= 0x20 && c <= 0x7e)
358 debug("%c", c);
359 else
360 debug(".");
wdenkbf9e3b32004-02-12 00:47:09 +0000361 }
Haavard Skinnemoene23741f2007-12-14 15:36:16 +0100362 debug("\n");
wdenkbf9e3b32004-02-12 00:47:09 +0000363 }
364}
wdenkbf9e3b32004-02-12 00:47:09 +0000365#endif
366
367
wdenk5653fc32004-02-08 22:55:38 +0000368/*-----------------------------------------------------------------------
369 * read a character at a port width address
370 */
Haavard Skinnemoen30557932007-12-13 12:56:29 +0100371static inline uchar flash_read_uchar (flash_info_t * info, uint offset)
wdenk5653fc32004-02-08 22:55:38 +0000372{
373 uchar *cp;
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100374 uchar retval;
wdenkbf9e3b32004-02-12 00:47:09 +0000375
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100376 cp = flash_map (info, 0, offset);
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200377#if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100378 retval = flash_read8(cp);
wdenkbf9e3b32004-02-12 00:47:09 +0000379#else
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100380 retval = flash_read8(cp + info->portwidth - 1);
wdenkbf9e3b32004-02-12 00:47:09 +0000381#endif
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100382 flash_unmap (info, 0, offset, cp);
383 return retval;
wdenk5653fc32004-02-08 22:55:38 +0000384}
385
386/*-----------------------------------------------------------------------
Tor Krill90447ec2008-03-28 11:29:10 +0100387 * read a word at a port width address, assume 16bit bus
388 */
389static inline ushort flash_read_word (flash_info_t * info, uint offset)
390{
391 ushort *addr, retval;
392
393 addr = flash_map (info, 0, offset);
394 retval = flash_read16 (addr);
395 flash_unmap (info, 0, offset, addr);
396 return retval;
397}
398
399
400/*-----------------------------------------------------------------------
Stefan Roese260421a2006-11-13 13:55:24 +0100401 * read a long word by picking the least significant byte of each maximum
wdenk5653fc32004-02-08 22:55:38 +0000402 * port size word. Swap for ppc format.
403 */
Haavard Skinnemoen30557932007-12-13 12:56:29 +0100404static ulong flash_read_long (flash_info_t * info, flash_sect_t sect,
405 uint offset)
wdenk5653fc32004-02-08 22:55:38 +0000406{
wdenkbf9e3b32004-02-12 00:47:09 +0000407 uchar *addr;
408 ulong retval;
wdenk5653fc32004-02-08 22:55:38 +0000409
wdenkbf9e3b32004-02-12 00:47:09 +0000410#ifdef DEBUG
411 int x;
412#endif
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100413 addr = flash_map (info, sect, offset);
wdenkbf9e3b32004-02-12 00:47:09 +0000414
415#ifdef DEBUG
416 debug ("long addr is at %p info->portwidth = %d\n", addr,
417 info->portwidth);
418 for (x = 0; x < 4 * info->portwidth; x++) {
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100419 debug ("addr[%x] = 0x%x\n", x, flash_read8(addr + x));
wdenkbf9e3b32004-02-12 00:47:09 +0000420 }
421#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200422#if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100423 retval = ((flash_read8(addr) << 16) |
424 (flash_read8(addr + info->portwidth) << 24) |
425 (flash_read8(addr + 2 * info->portwidth)) |
426 (flash_read8(addr + 3 * info->portwidth) << 8));
wdenkbf9e3b32004-02-12 00:47:09 +0000427#else
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100428 retval = ((flash_read8(addr + 2 * info->portwidth - 1) << 24) |
429 (flash_read8(addr + info->portwidth - 1) << 16) |
430 (flash_read8(addr + 4 * info->portwidth - 1) << 8) |
431 (flash_read8(addr + 3 * info->portwidth - 1)));
wdenkbf9e3b32004-02-12 00:47:09 +0000432#endif
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100433 flash_unmap(info, sect, offset, addr);
434
wdenkbf9e3b32004-02-12 00:47:09 +0000435 return retval;
wdenk5653fc32004-02-08 22:55:38 +0000436}
437
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200438/*
439 * Write a proper sized command to the correct address
440 */
441static void flash_write_cmd (flash_info_t * info, flash_sect_t sect,
Sebastian Siewior7288f972008-07-15 13:35:23 +0200442 uint offset, u32 cmd)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200443{
Stefan Roese79b4cda2006-02-28 15:29:58 +0100444
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100445 void *addr;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200446 cfiword_t cword;
447
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100448 addr = flash_map (info, sect, offset);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200449 flash_make_cmd (info, cmd, &cword);
450 switch (info->portwidth) {
451 case FLASH_CFI_8BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100452 debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr, cmd,
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200453 cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100454 flash_write8(cword.c, addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200455 break;
456 case FLASH_CFI_16BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100457 debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr,
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200458 cmd, cword.w,
459 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100460 flash_write16(cword.w, addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200461 break;
462 case FLASH_CFI_32BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100463 debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr,
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200464 cmd, cword.l,
465 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100466 flash_write32(cword.l, addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200467 break;
468 case FLASH_CFI_64BIT:
469#ifdef DEBUG
470 {
471 char str[20];
472
473 print_longlong (str, cword.ll);
474
475 debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100476 addr, cmd, str,
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200477 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
478 }
479#endif
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100480 flash_write64(cword.ll, addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200481 break;
482 }
483
484 /* Ensure all the instructions are fully finished */
485 sync();
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100486
487 flash_unmap(info, sect, offset, addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200488}
489
490static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect)
491{
492 flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_UNLOCK_START);
493 flash_write_cmd (info, sect, info->addr_unlock2, AMD_CMD_UNLOCK_ACK);
494}
495
496/*-----------------------------------------------------------------------
497 */
498static int flash_isequal (flash_info_t * info, flash_sect_t sect,
499 uint offset, uchar cmd)
500{
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100501 void *addr;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200502 cfiword_t cword;
503 int retval;
504
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100505 addr = flash_map (info, sect, offset);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200506 flash_make_cmd (info, cmd, &cword);
507
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100508 debug ("is= cmd %x(%c) addr %p ", cmd, cmd, addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200509 switch (info->portwidth) {
510 case FLASH_CFI_8BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100511 debug ("is= %x %x\n", flash_read8(addr), cword.c);
512 retval = (flash_read8(addr) == cword.c);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200513 break;
514 case FLASH_CFI_16BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100515 debug ("is= %4.4x %4.4x\n", flash_read16(addr), cword.w);
516 retval = (flash_read16(addr) == cword.w);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200517 break;
518 case FLASH_CFI_32BIT:
Andrew Klossner52514692008-08-21 07:12:26 -0700519 debug ("is= %8.8x %8.8lx\n", flash_read32(addr), cword.l);
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100520 retval = (flash_read32(addr) == cword.l);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200521 break;
522 case FLASH_CFI_64BIT:
523#ifdef DEBUG
524 {
525 char str1[20];
526 char str2[20];
527
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100528 print_longlong (str1, flash_read64(addr));
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200529 print_longlong (str2, cword.ll);
530 debug ("is= %s %s\n", str1, str2);
531 }
532#endif
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100533 retval = (flash_read64(addr) == cword.ll);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200534 break;
535 default:
536 retval = 0;
537 break;
538 }
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100539 flash_unmap(info, sect, offset, addr);
540
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200541 return retval;
542}
543
544/*-----------------------------------------------------------------------
545 */
546static int flash_isset (flash_info_t * info, flash_sect_t sect,
547 uint offset, uchar cmd)
548{
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100549 void *addr;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200550 cfiword_t cword;
551 int retval;
552
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100553 addr = flash_map (info, sect, offset);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200554 flash_make_cmd (info, cmd, &cword);
555 switch (info->portwidth) {
556 case FLASH_CFI_8BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100557 retval = ((flash_read8(addr) & cword.c) == cword.c);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200558 break;
559 case FLASH_CFI_16BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100560 retval = ((flash_read16(addr) & cword.w) == cword.w);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200561 break;
562 case FLASH_CFI_32BIT:
Stefan Roese47cc23c2008-01-02 14:05:37 +0100563 retval = ((flash_read32(addr) & cword.l) == cword.l);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200564 break;
565 case FLASH_CFI_64BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100566 retval = ((flash_read64(addr) & cword.ll) == cword.ll);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200567 break;
568 default:
569 retval = 0;
570 break;
571 }
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100572 flash_unmap(info, sect, offset, addr);
573
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200574 return retval;
575}
576
577/*-----------------------------------------------------------------------
578 */
579static int flash_toggle (flash_info_t * info, flash_sect_t sect,
580 uint offset, uchar cmd)
581{
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100582 void *addr;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200583 cfiword_t cword;
584 int retval;
585
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100586 addr = flash_map (info, sect, offset);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200587 flash_make_cmd (info, cmd, &cword);
588 switch (info->portwidth) {
589 case FLASH_CFI_8BIT:
Stefan Roesefb8c0612008-06-16 10:40:02 +0200590 retval = flash_read8(addr) != flash_read8(addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200591 break;
592 case FLASH_CFI_16BIT:
Stefan Roesefb8c0612008-06-16 10:40:02 +0200593 retval = flash_read16(addr) != flash_read16(addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200594 break;
595 case FLASH_CFI_32BIT:
Stefan Roesefb8c0612008-06-16 10:40:02 +0200596 retval = flash_read32(addr) != flash_read32(addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200597 break;
598 case FLASH_CFI_64BIT:
Wolfgang Denk9abda6b2008-10-31 01:12:28 +0100599 retval = ( (flash_read32( addr ) != flash_read32( addr )) ||
600 (flash_read32(addr+4) != flash_read32(addr+4)) );
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200601 break;
602 default:
603 retval = 0;
604 break;
605 }
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100606 flash_unmap(info, sect, offset, addr);
607
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200608 return retval;
609}
610
611/*
612 * flash_is_busy - check to see if the flash is busy
613 *
614 * This routine checks the status of the chip and returns true if the
615 * chip is busy.
616 */
617static int flash_is_busy (flash_info_t * info, flash_sect_t sect)
618{
619 int retval;
620
621 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +0400622 case CFI_CMDSET_INTEL_PROG_REGIONS:
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200623 case CFI_CMDSET_INTEL_STANDARD:
624 case CFI_CMDSET_INTEL_EXTENDED:
625 retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE);
626 break;
627 case CFI_CMDSET_AMD_STANDARD:
628 case CFI_CMDSET_AMD_EXTENDED:
Michael Schwingen81b20cc2007-12-07 23:35:02 +0100629#ifdef CONFIG_FLASH_CFI_LEGACY
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200630 case CFI_CMDSET_AMD_LEGACY:
631#endif
632 retval = flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE);
633 break;
634 default:
635 retval = 0;
Michael Schwingen81b20cc2007-12-07 23:35:02 +0100636 }
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200637 debug ("flash_is_busy: %d\n", retval);
638 return retval;
Michael Schwingen81b20cc2007-12-07 23:35:02 +0100639}
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200640
641/*-----------------------------------------------------------------------
642 * wait for XSR.7 to be set. Time out with an error if it does not.
643 * This routine does not set the flash to read-array mode.
644 */
645static int flash_status_check (flash_info_t * info, flash_sect_t sector,
646 ulong tout, char *prompt)
647{
648 ulong start;
649
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200650#if CONFIG_SYS_HZ != 1000
651 tout *= CONFIG_SYS_HZ/1000;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200652#endif
653
654 /* Wait for command completion */
655 start = get_timer (0);
656 while (flash_is_busy (info, sector)) {
657 if (get_timer (start) > tout) {
658 printf ("Flash %s timeout at address %lx data %lx\n",
659 prompt, info->start[sector],
660 flash_read_long (info, sector, 0));
661 flash_write_cmd (info, sector, 0, info->cmd_reset);
662 return ERR_TIMOUT;
663 }
664 udelay (1); /* also triggers watchdog */
665 }
666 return ERR_OK;
667}
668
669/*-----------------------------------------------------------------------
670 * Wait for XSR.7 to be set, if it times out print an error, otherwise
671 * do a full status check.
672 *
673 * This routine sets the flash to read-array mode.
674 */
675static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
676 ulong tout, char *prompt)
677{
678 int retcode;
679
680 retcode = flash_status_check (info, sector, tout, prompt);
681 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +0400682 case CFI_CMDSET_INTEL_PROG_REGIONS:
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200683 case CFI_CMDSET_INTEL_EXTENDED:
684 case CFI_CMDSET_INTEL_STANDARD:
Ed Swarthout0d01f662008-10-09 01:26:36 -0500685 if ((retcode != ERR_OK)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200686 && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) {
687 retcode = ERR_INVAL;
688 printf ("Flash %s error at address %lx\n", prompt,
689 info->start[sector]);
690 if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS |
691 FLASH_STATUS_PSLBS)) {
692 puts ("Command Sequence Error.\n");
693 } else if (flash_isset (info, sector, 0,
694 FLASH_STATUS_ECLBS)) {
695 puts ("Block Erase Error.\n");
696 retcode = ERR_NOT_ERASED;
697 } else if (flash_isset (info, sector, 0,
698 FLASH_STATUS_PSLBS)) {
699 puts ("Locking Error\n");
700 }
701 if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) {
702 puts ("Block locked.\n");
703 retcode = ERR_PROTECTED;
704 }
705 if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS))
706 puts ("Vpp Low Error.\n");
707 }
708 flash_write_cmd (info, sector, 0, info->cmd_reset);
709 break;
710 default:
711 break;
712 }
713 return retcode;
714}
715
716/*-----------------------------------------------------------------------
717 */
718static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
719{
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200720#if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200721 unsigned short w;
722 unsigned int l;
723 unsigned long long ll;
724#endif
725
726 switch (info->portwidth) {
727 case FLASH_CFI_8BIT:
728 cword->c = c;
729 break;
730 case FLASH_CFI_16BIT:
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200731#if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200732 w = c;
733 w <<= 8;
734 cword->w = (cword->w >> 8) | w;
Michael Schwingen81b20cc2007-12-07 23:35:02 +0100735#else
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200736 cword->w = (cword->w << 8) | c;
Michael Schwingen81b20cc2007-12-07 23:35:02 +0100737#endif
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200738 break;
739 case FLASH_CFI_32BIT:
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200740#if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200741 l = c;
742 l <<= 24;
743 cword->l = (cword->l >> 8) | l;
744#else
745 cword->l = (cword->l << 8) | c;
Stefan Roese2662b402006-04-01 13:41:03 +0200746#endif
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200747 break;
748 case FLASH_CFI_64BIT:
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200749#if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200750 ll = c;
751 ll <<= 56;
752 cword->ll = (cword->ll >> 8) | ll;
753#else
754 cword->ll = (cword->ll << 8) | c;
755#endif
756 break;
wdenk5653fc32004-02-08 22:55:38 +0000757 }
wdenk5653fc32004-02-08 22:55:38 +0000758}
759
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200760/* loop through the sectors from the highest address when the passed
761 * address is greater or equal to the sector address we have a match
wdenk5653fc32004-02-08 22:55:38 +0000762 */
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200763static flash_sect_t find_sector (flash_info_t * info, ulong addr)
wdenk7680c142005-05-16 15:23:22 +0000764{
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200765 flash_sect_t sector;
wdenk7680c142005-05-16 15:23:22 +0000766
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200767 for (sector = info->sector_count - 1; sector >= 0; sector--) {
768 if (addr >= info->start[sector])
wdenk7680c142005-05-16 15:23:22 +0000769 break;
770 }
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200771 return sector;
wdenk7680c142005-05-16 15:23:22 +0000772}
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200773
774/*-----------------------------------------------------------------------
775 */
776static int flash_write_cfiword (flash_info_t * info, ulong dest,
777 cfiword_t cword)
778{
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100779 void *dstaddr;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200780 int flag;
Ed Swarthout0d01f662008-10-09 01:26:36 -0500781 flash_sect_t sect;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200782
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100783 dstaddr = map_physmem(dest, info->portwidth, MAP_NOCACHE);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200784
785 /* Check if Flash is (sufficiently) erased */
786 switch (info->portwidth) {
787 case FLASH_CFI_8BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100788 flag = ((flash_read8(dstaddr) & cword.c) == cword.c);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200789 break;
790 case FLASH_CFI_16BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100791 flag = ((flash_read16(dstaddr) & cword.w) == cword.w);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200792 break;
793 case FLASH_CFI_32BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100794 flag = ((flash_read32(dstaddr) & cword.l) == cword.l);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200795 break;
796 case FLASH_CFI_64BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100797 flag = ((flash_read64(dstaddr) & cword.ll) == cword.ll);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200798 break;
799 default:
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100800 flag = 0;
801 break;
802 }
803 if (!flag) {
804 unmap_physmem(dstaddr, info->portwidth);
Stefan Roese0dc80e22007-12-27 07:50:54 +0100805 return ERR_NOT_ERASED;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200806 }
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200807
808 /* Disable interrupts which might cause a timeout here */
809 flag = disable_interrupts ();
810
811 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +0400812 case CFI_CMDSET_INTEL_PROG_REGIONS:
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200813 case CFI_CMDSET_INTEL_EXTENDED:
814 case CFI_CMDSET_INTEL_STANDARD:
815 flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS);
816 flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE);
817 break;
818 case CFI_CMDSET_AMD_EXTENDED:
819 case CFI_CMDSET_AMD_STANDARD:
820#ifdef CONFIG_FLASH_CFI_LEGACY
821 case CFI_CMDSET_AMD_LEGACY:
Wolfgang Denk080bdb72005-10-05 01:51:29 +0200822#endif
Ed Swarthout0d01f662008-10-09 01:26:36 -0500823 sect = find_sector(info, dest);
824 flash_unlock_seq (info, sect);
825 flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_WRITE);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200826 break;
827 }
828
829 switch (info->portwidth) {
830 case FLASH_CFI_8BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100831 flash_write8(cword.c, dstaddr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200832 break;
833 case FLASH_CFI_16BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100834 flash_write16(cword.w, dstaddr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200835 break;
836 case FLASH_CFI_32BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100837 flash_write32(cword.l, dstaddr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200838 break;
839 case FLASH_CFI_64BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100840 flash_write64(cword.ll, dstaddr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200841 break;
842 }
843
844 /* re-enable interrupts if necessary */
845 if (flag)
846 enable_interrupts ();
847
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100848 unmap_physmem(dstaddr, info->portwidth);
849
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200850 return flash_full_status_check (info, find_sector (info, dest),
851 info->write_tout, "write");
852}
853
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200854#ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200855
856static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
857 int len)
858{
859 flash_sect_t sector;
860 int cnt;
861 int retcode;
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100862 void *src = cp;
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100863 void *dst = map_physmem(dest, len, MAP_NOCACHE);
Stefan Roese0dc80e22007-12-27 07:50:54 +0100864 void *dst2 = dst;
865 int flag = 0;
Guennadi Liakhovetski96ef8312008-04-03 13:36:02 +0200866 uint offset = 0;
867 unsigned int shift;
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +0400868 uchar write_cmd;
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100869
Stefan Roese0dc80e22007-12-27 07:50:54 +0100870 switch (info->portwidth) {
871 case FLASH_CFI_8BIT:
Guennadi Liakhovetski96ef8312008-04-03 13:36:02 +0200872 shift = 0;
Stefan Roese0dc80e22007-12-27 07:50:54 +0100873 break;
874 case FLASH_CFI_16BIT:
Guennadi Liakhovetski96ef8312008-04-03 13:36:02 +0200875 shift = 1;
Stefan Roese0dc80e22007-12-27 07:50:54 +0100876 break;
877 case FLASH_CFI_32BIT:
Guennadi Liakhovetski96ef8312008-04-03 13:36:02 +0200878 shift = 2;
Stefan Roese0dc80e22007-12-27 07:50:54 +0100879 break;
880 case FLASH_CFI_64BIT:
Guennadi Liakhovetski96ef8312008-04-03 13:36:02 +0200881 shift = 3;
Stefan Roese0dc80e22007-12-27 07:50:54 +0100882 break;
883 default:
884 retcode = ERR_INVAL;
885 goto out_unmap;
886 }
887
Guennadi Liakhovetski96ef8312008-04-03 13:36:02 +0200888 cnt = len >> shift;
889
Stefan Roese0dc80e22007-12-27 07:50:54 +0100890 while ((cnt-- > 0) && (flag == 0)) {
891 switch (info->portwidth) {
892 case FLASH_CFI_8BIT:
893 flag = ((flash_read8(dst2) & flash_read8(src)) ==
894 flash_read8(src));
895 src += 1, dst2 += 1;
896 break;
897 case FLASH_CFI_16BIT:
898 flag = ((flash_read16(dst2) & flash_read16(src)) ==
899 flash_read16(src));
900 src += 2, dst2 += 2;
901 break;
902 case FLASH_CFI_32BIT:
903 flag = ((flash_read32(dst2) & flash_read32(src)) ==
904 flash_read32(src));
905 src += 4, dst2 += 4;
906 break;
907 case FLASH_CFI_64BIT:
908 flag = ((flash_read64(dst2) & flash_read64(src)) ==
909 flash_read64(src));
910 src += 8, dst2 += 8;
911 break;
912 }
913 }
914 if (!flag) {
915 retcode = ERR_NOT_ERASED;
916 goto out_unmap;
917 }
918
919 src = cp;
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100920 sector = find_sector (info, dest);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200921
922 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +0400923 case CFI_CMDSET_INTEL_PROG_REGIONS:
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200924 case CFI_CMDSET_INTEL_STANDARD:
925 case CFI_CMDSET_INTEL_EXTENDED:
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +0400926 write_cmd = (info->vendor == CFI_CMDSET_INTEL_PROG_REGIONS) ?
927 FLASH_CMD_WRITE_BUFFER_PROG : FLASH_CMD_WRITE_TO_BUFFER;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200928 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +0400929 flash_write_cmd (info, sector, 0, FLASH_CMD_READ_STATUS);
930 flash_write_cmd (info, sector, 0, write_cmd);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200931 retcode = flash_status_check (info, sector,
932 info->buffer_write_tout,
933 "write to buffer");
934 if (retcode == ERR_OK) {
935 /* reduce the number of loops by the width of
936 * the port */
Guennadi Liakhovetski96ef8312008-04-03 13:36:02 +0200937 cnt = len >> shift;
Vasiliy Leoenenko93c56f22008-05-07 21:24:44 +0400938 flash_write_cmd (info, sector, 0, cnt - 1);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200939 while (cnt-- > 0) {
940 switch (info->portwidth) {
941 case FLASH_CFI_8BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100942 flash_write8(flash_read8(src), dst);
943 src += 1, dst += 1;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200944 break;
945 case FLASH_CFI_16BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100946 flash_write16(flash_read16(src), dst);
947 src += 2, dst += 2;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200948 break;
949 case FLASH_CFI_32BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100950 flash_write32(flash_read32(src), dst);
951 src += 4, dst += 4;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200952 break;
953 case FLASH_CFI_64BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100954 flash_write64(flash_read64(src), dst);
955 src += 8, dst += 8;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200956 break;
957 default:
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100958 retcode = ERR_INVAL;
959 goto out_unmap;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200960 }
961 }
962 flash_write_cmd (info, sector, 0,
963 FLASH_CMD_WRITE_BUFFER_CONFIRM);
964 retcode = flash_full_status_check (
965 info, sector, info->buffer_write_tout,
966 "buffer write");
967 }
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100968
969 break;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200970
971 case CFI_CMDSET_AMD_STANDARD:
972 case CFI_CMDSET_AMD_EXTENDED:
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200973 flash_unlock_seq(info,0);
Guennadi Liakhovetski96ef8312008-04-03 13:36:02 +0200974
975#ifdef CONFIG_FLASH_SPANSION_S29WS_N
976 offset = ((unsigned long)dst - info->start[sector]) >> shift;
977#endif
978 flash_write_cmd(info, sector, offset, AMD_CMD_WRITE_TO_BUFFER);
979 cnt = len >> shift;
980 flash_write_cmd(info, sector, offset, (uchar)cnt - 1);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200981
982 switch (info->portwidth) {
983 case FLASH_CFI_8BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100984 while (cnt-- > 0) {
985 flash_write8(flash_read8(src), dst);
986 src += 1, dst += 1;
987 }
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200988 break;
989 case FLASH_CFI_16BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100990 while (cnt-- > 0) {
991 flash_write16(flash_read16(src), dst);
992 src += 2, dst += 2;
993 }
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200994 break;
995 case FLASH_CFI_32BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100996 while (cnt-- > 0) {
997 flash_write32(flash_read32(src), dst);
998 src += 4, dst += 4;
999 }
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001000 break;
1001 case FLASH_CFI_64BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +01001002 while (cnt-- > 0) {
1003 flash_write64(flash_read64(src), dst);
1004 src += 8, dst += 8;
1005 }
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001006 break;
1007 default:
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001008 retcode = ERR_INVAL;
1009 goto out_unmap;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001010 }
1011
1012 flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM);
1013 retcode = flash_full_status_check (info, sector,
1014 info->buffer_write_tout,
1015 "buffer write");
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001016 break;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001017
1018 default:
1019 debug ("Unknown Command Set\n");
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001020 retcode = ERR_INVAL;
1021 break;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001022 }
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001023
1024out_unmap:
1025 unmap_physmem(dst, len);
1026 return retcode;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001027}
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001028#endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001029
wdenk7680c142005-05-16 15:23:22 +00001030
1031/*-----------------------------------------------------------------------
1032 */
wdenkbf9e3b32004-02-12 00:47:09 +00001033int flash_erase (flash_info_t * info, int s_first, int s_last)
wdenk5653fc32004-02-08 22:55:38 +00001034{
1035 int rcode = 0;
1036 int prot;
1037 flash_sect_t sect;
1038
wdenkbf9e3b32004-02-12 00:47:09 +00001039 if (info->flash_id != FLASH_MAN_CFI) {
wdenk4b9206e2004-03-23 22:14:11 +00001040 puts ("Can't erase unknown flash type - aborted\n");
wdenk5653fc32004-02-08 22:55:38 +00001041 return 1;
1042 }
1043 if ((s_first < 0) || (s_first > s_last)) {
wdenk4b9206e2004-03-23 22:14:11 +00001044 puts ("- no sectors to erase\n");
wdenk5653fc32004-02-08 22:55:38 +00001045 return 1;
1046 }
1047
1048 prot = 0;
wdenkbf9e3b32004-02-12 00:47:09 +00001049 for (sect = s_first; sect <= s_last; ++sect) {
wdenk5653fc32004-02-08 22:55:38 +00001050 if (info->protect[sect]) {
1051 prot++;
1052 }
1053 }
1054 if (prot) {
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001055 printf ("- Warning: %d protected sectors will not be erased!\n",
1056 prot);
wdenk5653fc32004-02-08 22:55:38 +00001057 } else {
wdenk4b9206e2004-03-23 22:14:11 +00001058 putc ('\n');
wdenk5653fc32004-02-08 22:55:38 +00001059 }
1060
1061
wdenkbf9e3b32004-02-12 00:47:09 +00001062 for (sect = s_first; sect <= s_last; sect++) {
wdenk5653fc32004-02-08 22:55:38 +00001063 if (info->protect[sect] == 0) { /* not protected */
wdenkbf9e3b32004-02-12 00:47:09 +00001064 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +04001065 case CFI_CMDSET_INTEL_PROG_REGIONS:
wdenk5653fc32004-02-08 22:55:38 +00001066 case CFI_CMDSET_INTEL_STANDARD:
1067 case CFI_CMDSET_INTEL_EXTENDED:
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001068 flash_write_cmd (info, sect, 0,
1069 FLASH_CMD_CLEAR_STATUS);
1070 flash_write_cmd (info, sect, 0,
1071 FLASH_CMD_BLOCK_ERASE);
1072 flash_write_cmd (info, sect, 0,
1073 FLASH_CMD_ERASE_CONFIRM);
wdenk5653fc32004-02-08 22:55:38 +00001074 break;
1075 case CFI_CMDSET_AMD_STANDARD:
1076 case CFI_CMDSET_AMD_EXTENDED:
wdenkbf9e3b32004-02-12 00:47:09 +00001077 flash_unlock_seq (info, sect);
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001078 flash_write_cmd (info, sect,
1079 info->addr_unlock1,
1080 AMD_CMD_ERASE_START);
wdenkbf9e3b32004-02-12 00:47:09 +00001081 flash_unlock_seq (info, sect);
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001082 flash_write_cmd (info, sect, 0,
1083 AMD_CMD_ERASE_SECTOR);
wdenk5653fc32004-02-08 22:55:38 +00001084 break;
Michael Schwingen81b20cc2007-12-07 23:35:02 +01001085#ifdef CONFIG_FLASH_CFI_LEGACY
1086 case CFI_CMDSET_AMD_LEGACY:
1087 flash_unlock_seq (info, 0);
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001088 flash_write_cmd (info, 0, info->addr_unlock1,
1089 AMD_CMD_ERASE_START);
Michael Schwingen81b20cc2007-12-07 23:35:02 +01001090 flash_unlock_seq (info, 0);
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001091 flash_write_cmd (info, sect, 0,
1092 AMD_CMD_ERASE_SECTOR);
Michael Schwingen81b20cc2007-12-07 23:35:02 +01001093 break;
1094#endif
wdenk5653fc32004-02-08 22:55:38 +00001095 default:
wdenkbf9e3b32004-02-12 00:47:09 +00001096 debug ("Unkown flash vendor %d\n",
1097 info->vendor);
wdenk5653fc32004-02-08 22:55:38 +00001098 break;
1099 }
1100
wdenkbf9e3b32004-02-12 00:47:09 +00001101 if (flash_full_status_check
1102 (info, sect, info->erase_blk_tout, "erase")) {
wdenk5653fc32004-02-08 22:55:38 +00001103 rcode = 1;
1104 } else
wdenk4b9206e2004-03-23 22:14:11 +00001105 putc ('.');
wdenk5653fc32004-02-08 22:55:38 +00001106 }
1107 }
wdenk4b9206e2004-03-23 22:14:11 +00001108 puts (" done\n");
wdenk5653fc32004-02-08 22:55:38 +00001109 return rcode;
1110}
1111
1112/*-----------------------------------------------------------------------
1113 */
wdenkbf9e3b32004-02-12 00:47:09 +00001114void flash_print_info (flash_info_t * info)
wdenk5653fc32004-02-08 22:55:38 +00001115{
1116 int i;
1117
1118 if (info->flash_id != FLASH_MAN_CFI) {
wdenk4b9206e2004-03-23 22:14:11 +00001119 puts ("missing or unknown FLASH type\n");
wdenk5653fc32004-02-08 22:55:38 +00001120 return;
1121 }
1122
Michael Schwingen81b20cc2007-12-07 23:35:02 +01001123 printf ("%s FLASH (%d x %d)",
1124 info->name,
wdenkbf9e3b32004-02-12 00:47:09 +00001125 (info->portwidth << 3), (info->chipwidth << 3));
Michael Schwingen81b20cc2007-12-07 23:35:02 +01001126 if (info->size < 1024*1024)
1127 printf (" Size: %ld kB in %d Sectors\n",
1128 info->size >> 10, info->sector_count);
1129 else
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001130 printf (" Size: %ld MB in %d Sectors\n",
1131 info->size >> 20, info->sector_count);
Stefan Roese260421a2006-11-13 13:55:24 +01001132 printf (" ");
1133 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +04001134 case CFI_CMDSET_INTEL_PROG_REGIONS:
1135 printf ("Intel Prog Regions");
1136 break;
Stefan Roese260421a2006-11-13 13:55:24 +01001137 case CFI_CMDSET_INTEL_STANDARD:
1138 printf ("Intel Standard");
1139 break;
1140 case CFI_CMDSET_INTEL_EXTENDED:
1141 printf ("Intel Extended");
1142 break;
1143 case CFI_CMDSET_AMD_STANDARD:
1144 printf ("AMD Standard");
1145 break;
1146 case CFI_CMDSET_AMD_EXTENDED:
1147 printf ("AMD Extended");
1148 break;
Michael Schwingen81b20cc2007-12-07 23:35:02 +01001149#ifdef CONFIG_FLASH_CFI_LEGACY
1150 case CFI_CMDSET_AMD_LEGACY:
1151 printf ("AMD Legacy");
1152 break;
1153#endif
Stefan Roese260421a2006-11-13 13:55:24 +01001154 default:
1155 printf ("Unknown (%d)", info->vendor);
1156 break;
1157 }
1158 printf (" command set, Manufacturer ID: 0x%02X, Device ID: 0x%02X",
1159 info->manufacturer_id, info->device_id);
1160 if (info->device_id == 0x7E) {
1161 printf("%04X", info->device_id2);
1162 }
1163 printf ("\n Erase timeout: %ld ms, write timeout: %ld ms\n",
wdenk028ab6b2004-02-23 23:54:43 +00001164 info->erase_blk_tout,
Stefan Roese260421a2006-11-13 13:55:24 +01001165 info->write_tout);
1166 if (info->buffer_size > 1) {
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001167 printf (" Buffer write timeout: %ld ms, "
1168 "buffer size: %d bytes\n",
wdenk028ab6b2004-02-23 23:54:43 +00001169 info->buffer_write_tout,
1170 info->buffer_size);
Stefan Roese260421a2006-11-13 13:55:24 +01001171 }
wdenk5653fc32004-02-08 22:55:38 +00001172
Stefan Roese260421a2006-11-13 13:55:24 +01001173 puts ("\n Sector Start Addresses:");
wdenkbf9e3b32004-02-12 00:47:09 +00001174 for (i = 0; i < info->sector_count; ++i) {
Stefan Roese260421a2006-11-13 13:55:24 +01001175 if ((i % 5) == 0)
1176 printf ("\n");
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001177#ifdef CONFIG_SYS_FLASH_EMPTY_INFO
wdenk5653fc32004-02-08 22:55:38 +00001178 int k;
1179 int size;
1180 int erased;
1181 volatile unsigned long *flash;
1182
1183 /*
1184 * Check if whole sector is erased
1185 */
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001186 size = flash_sector_size(info, i);
wdenk5653fc32004-02-08 22:55:38 +00001187 erased = 1;
wdenkbf9e3b32004-02-12 00:47:09 +00001188 flash = (volatile unsigned long *) info->start[i];
1189 size = size >> 2; /* divide by 4 for longword access */
1190 for (k = 0; k < size; k++) {
1191 if (*flash++ != 0xffffffff) {
1192 erased = 0;
1193 break;
1194 }
1195 }
wdenk5653fc32004-02-08 22:55:38 +00001196
wdenk5653fc32004-02-08 22:55:38 +00001197 /* print empty and read-only info */
Stefan Roese260421a2006-11-13 13:55:24 +01001198 printf (" %08lX %c %s ",
wdenk5653fc32004-02-08 22:55:38 +00001199 info->start[i],
Stefan Roese260421a2006-11-13 13:55:24 +01001200 erased ? 'E' : ' ',
1201 info->protect[i] ? "RO" : " ");
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001202#else /* ! CONFIG_SYS_FLASH_EMPTY_INFO */
Stefan Roese260421a2006-11-13 13:55:24 +01001203 printf (" %08lX %s ",
1204 info->start[i],
1205 info->protect[i] ? "RO" : " ");
wdenk5653fc32004-02-08 22:55:38 +00001206#endif
1207 }
wdenk4b9206e2004-03-23 22:14:11 +00001208 putc ('\n');
wdenk5653fc32004-02-08 22:55:38 +00001209 return;
1210}
1211
1212/*-----------------------------------------------------------------------
Jerry Van Baren9a042e92008-03-08 13:48:01 -05001213 * This is used in a few places in write_buf() to show programming
1214 * progress. Making it a function is nasty because it needs to do side
1215 * effect updates to digit and dots. Repeated code is nasty too, so
1216 * we define it once here.
1217 */
Stefan Roesef0105722008-03-19 07:09:26 +01001218#ifdef CONFIG_FLASH_SHOW_PROGRESS
1219#define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) \
1220 dots -= dots_sub; \
Jerry Van Baren9a042e92008-03-08 13:48:01 -05001221 if ((scale > 0) && (dots <= 0)) { \
1222 if ((digit % 5) == 0) \
1223 printf ("%d", digit / 5); \
1224 else \
1225 putc ('.'); \
1226 digit--; \
1227 dots += scale; \
1228 }
Stefan Roesef0105722008-03-19 07:09:26 +01001229#else
1230#define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub)
1231#endif
Jerry Van Baren9a042e92008-03-08 13:48:01 -05001232
1233/*-----------------------------------------------------------------------
wdenk5653fc32004-02-08 22:55:38 +00001234 * Copy memory to flash, returns:
1235 * 0 - OK
1236 * 1 - write timeout
1237 * 2 - Flash not erased
1238 */
wdenkbf9e3b32004-02-12 00:47:09 +00001239int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
wdenk5653fc32004-02-08 22:55:38 +00001240{
1241 ulong wp;
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001242 uchar *p;
wdenk5653fc32004-02-08 22:55:38 +00001243 int aln;
1244 cfiword_t cword;
1245 int i, rc;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001246#ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
wdenkbf9e3b32004-02-12 00:47:09 +00001247 int buffered_size;
1248#endif
Jerry Van Baren9a042e92008-03-08 13:48:01 -05001249#ifdef CONFIG_FLASH_SHOW_PROGRESS
1250 int digit = CONFIG_FLASH_SHOW_PROGRESS;
1251 int scale = 0;
1252 int dots = 0;
1253
1254 /*
1255 * Suppress if there are fewer than CONFIG_FLASH_SHOW_PROGRESS writes.
1256 */
1257 if (cnt >= CONFIG_FLASH_SHOW_PROGRESS) {
1258 scale = (int)((cnt + CONFIG_FLASH_SHOW_PROGRESS - 1) /
1259 CONFIG_FLASH_SHOW_PROGRESS);
1260 }
1261#endif
1262
wdenkbf9e3b32004-02-12 00:47:09 +00001263 /* get lower aligned address */
wdenk5653fc32004-02-08 22:55:38 +00001264 wp = (addr & ~(info->portwidth - 1));
1265
1266 /* handle unaligned start */
wdenkbf9e3b32004-02-12 00:47:09 +00001267 if ((aln = addr - wp) != 0) {
wdenk5653fc32004-02-08 22:55:38 +00001268 cword.l = 0;
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001269 p = map_physmem(wp, info->portwidth, MAP_NOCACHE);
1270 for (i = 0; i < aln; ++i)
1271 flash_add_byte (info, &cword, flash_read8(p + i));
wdenk5653fc32004-02-08 22:55:38 +00001272
wdenkbf9e3b32004-02-12 00:47:09 +00001273 for (; (i < info->portwidth) && (cnt > 0); i++) {
1274 flash_add_byte (info, &cword, *src++);
wdenk5653fc32004-02-08 22:55:38 +00001275 cnt--;
wdenk5653fc32004-02-08 22:55:38 +00001276 }
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001277 for (; (cnt == 0) && (i < info->portwidth); ++i)
1278 flash_add_byte (info, &cword, flash_read8(p + i));
1279
1280 rc = flash_write_cfiword (info, wp, cword);
1281 unmap_physmem(p, info->portwidth);
1282 if (rc != 0)
wdenk5653fc32004-02-08 22:55:38 +00001283 return rc;
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001284
1285 wp += i;
Stefan Roesef0105722008-03-19 07:09:26 +01001286 FLASH_SHOW_PROGRESS(scale, dots, digit, i);
wdenk5653fc32004-02-08 22:55:38 +00001287 }
1288
wdenkbf9e3b32004-02-12 00:47:09 +00001289 /* handle the aligned part */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001290#ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
wdenkbf9e3b32004-02-12 00:47:09 +00001291 buffered_size = (info->portwidth / info->chipwidth);
1292 buffered_size *= info->buffer_size;
1293 while (cnt >= info->portwidth) {
Stefan Roese79b4cda2006-02-28 15:29:58 +01001294 /* prohibit buffer write when buffer_size is 1 */
1295 if (info->buffer_size == 1) {
1296 cword.l = 0;
1297 for (i = 0; i < info->portwidth; i++)
1298 flash_add_byte (info, &cword, *src++);
1299 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
1300 return rc;
1301 wp += info->portwidth;
1302 cnt -= info->portwidth;
1303 continue;
1304 }
1305
1306 /* write buffer until next buffered_size aligned boundary */
1307 i = buffered_size - (wp % buffered_size);
1308 if (i > cnt)
1309 i = cnt;
wdenkbf9e3b32004-02-12 00:47:09 +00001310 if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK)
wdenk5653fc32004-02-08 22:55:38 +00001311 return rc;
Wolfgang Denk8d4ba3d2005-08-12 22:35:59 +02001312 i -= i & (info->portwidth - 1);
wdenk5653fc32004-02-08 22:55:38 +00001313 wp += i;
1314 src += i;
wdenkbf9e3b32004-02-12 00:47:09 +00001315 cnt -= i;
Stefan Roesef0105722008-03-19 07:09:26 +01001316 FLASH_SHOW_PROGRESS(scale, dots, digit, i);
wdenk5653fc32004-02-08 22:55:38 +00001317 }
1318#else
wdenkbf9e3b32004-02-12 00:47:09 +00001319 while (cnt >= info->portwidth) {
wdenk5653fc32004-02-08 22:55:38 +00001320 cword.l = 0;
wdenkbf9e3b32004-02-12 00:47:09 +00001321 for (i = 0; i < info->portwidth; i++) {
1322 flash_add_byte (info, &cword, *src++);
wdenk5653fc32004-02-08 22:55:38 +00001323 }
wdenkbf9e3b32004-02-12 00:47:09 +00001324 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
wdenk5653fc32004-02-08 22:55:38 +00001325 return rc;
1326 wp += info->portwidth;
1327 cnt -= info->portwidth;
Stefan Roesef0105722008-03-19 07:09:26 +01001328 FLASH_SHOW_PROGRESS(scale, dots, digit, info->portwidth);
wdenk5653fc32004-02-08 22:55:38 +00001329 }
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001330#endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
Jerry Van Baren9a042e92008-03-08 13:48:01 -05001331
wdenk5653fc32004-02-08 22:55:38 +00001332 if (cnt == 0) {
1333 return (0);
1334 }
1335
1336 /*
1337 * handle unaligned tail bytes
1338 */
1339 cword.l = 0;
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001340 p = map_physmem(wp, info->portwidth, MAP_NOCACHE);
1341 for (i = 0; (i < info->portwidth) && (cnt > 0); ++i) {
wdenkbf9e3b32004-02-12 00:47:09 +00001342 flash_add_byte (info, &cword, *src++);
wdenk5653fc32004-02-08 22:55:38 +00001343 --cnt;
1344 }
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001345 for (; i < info->portwidth; ++i)
1346 flash_add_byte (info, &cword, flash_read8(p + i));
1347 unmap_physmem(p, info->portwidth);
wdenk5653fc32004-02-08 22:55:38 +00001348
wdenkbf9e3b32004-02-12 00:47:09 +00001349 return flash_write_cfiword (info, wp, cword);
wdenk5653fc32004-02-08 22:55:38 +00001350}
1351
1352/*-----------------------------------------------------------------------
1353 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001354#ifdef CONFIG_SYS_FLASH_PROTECTION
wdenk5653fc32004-02-08 22:55:38 +00001355
wdenkbf9e3b32004-02-12 00:47:09 +00001356int flash_real_protect (flash_info_t * info, long sector, int prot)
wdenk5653fc32004-02-08 22:55:38 +00001357{
1358 int retcode = 0;
1359
Rafael Camposbc9019e2008-07-31 10:22:20 +02001360 switch (info->vendor) {
1361 case CFI_CMDSET_INTEL_PROG_REGIONS:
1362 case CFI_CMDSET_INTEL_STANDARD:
Nick Spence9e8e63c2008-08-19 22:21:16 -07001363 case CFI_CMDSET_INTEL_EXTENDED:
Rafael Camposbc9019e2008-07-31 10:22:20 +02001364 flash_write_cmd (info, sector, 0,
1365 FLASH_CMD_CLEAR_STATUS);
1366 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT);
1367 if (prot)
1368 flash_write_cmd (info, sector, 0,
1369 FLASH_CMD_PROTECT_SET);
1370 else
1371 flash_write_cmd (info, sector, 0,
1372 FLASH_CMD_PROTECT_CLEAR);
1373 break;
1374 case CFI_CMDSET_AMD_EXTENDED:
1375 case CFI_CMDSET_AMD_STANDARD:
Rafael Camposbc9019e2008-07-31 10:22:20 +02001376 /* U-Boot only checks the first byte */
1377 if (info->manufacturer_id == (uchar)ATM_MANUFACT) {
1378 if (prot) {
1379 flash_unlock_seq (info, 0);
1380 flash_write_cmd (info, 0,
1381 info->addr_unlock1,
1382 ATM_CMD_SOFTLOCK_START);
1383 flash_unlock_seq (info, 0);
1384 flash_write_cmd (info, sector, 0,
1385 ATM_CMD_LOCK_SECT);
1386 } else {
1387 flash_write_cmd (info, 0,
1388 info->addr_unlock1,
1389 AMD_CMD_UNLOCK_START);
1390 if (info->device_id == ATM_ID_BV6416)
1391 flash_write_cmd (info, sector,
1392 0, ATM_CMD_UNLOCK_SECT);
1393 }
1394 }
1395 break;
TsiChung Liew4e00acd2008-08-19 16:53:39 +00001396#ifdef CONFIG_FLASH_CFI_LEGACY
1397 case CFI_CMDSET_AMD_LEGACY:
1398 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
1399 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT);
1400 if (prot)
1401 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET);
1402 else
1403 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
1404#endif
Rafael Camposbc9019e2008-07-31 10:22:20 +02001405 };
wdenk5653fc32004-02-08 22:55:38 +00001406
wdenkbf9e3b32004-02-12 00:47:09 +00001407 if ((retcode =
1408 flash_full_status_check (info, sector, info->erase_blk_tout,
1409 prot ? "protect" : "unprotect")) == 0) {
wdenk5653fc32004-02-08 22:55:38 +00001410
1411 info->protect[sector] = prot;
Stefan Roese2662b402006-04-01 13:41:03 +02001412
1413 /*
1414 * On some of Intel's flash chips (marked via legacy_unlock)
1415 * unprotect unprotects all locking.
1416 */
1417 if ((prot == 0) && (info->legacy_unlock)) {
wdenk5653fc32004-02-08 22:55:38 +00001418 flash_sect_t i;
wdenkbf9e3b32004-02-12 00:47:09 +00001419
1420 for (i = 0; i < info->sector_count; i++) {
1421 if (info->protect[i])
1422 flash_real_protect (info, i, 1);
wdenk5653fc32004-02-08 22:55:38 +00001423 }
1424 }
1425 }
wdenk5653fc32004-02-08 22:55:38 +00001426 return retcode;
wdenkbf9e3b32004-02-12 00:47:09 +00001427}
1428
wdenk5653fc32004-02-08 22:55:38 +00001429/*-----------------------------------------------------------------------
1430 * flash_read_user_serial - read the OneTimeProgramming cells
1431 */
wdenkbf9e3b32004-02-12 00:47:09 +00001432void flash_read_user_serial (flash_info_t * info, void *buffer, int offset,
1433 int len)
wdenk5653fc32004-02-08 22:55:38 +00001434{
wdenkbf9e3b32004-02-12 00:47:09 +00001435 uchar *src;
1436 uchar *dst;
wdenk5653fc32004-02-08 22:55:38 +00001437
1438 dst = buffer;
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001439 src = flash_map (info, 0, FLASH_OFFSET_USER_PROTECTION);
wdenkbf9e3b32004-02-12 00:47:09 +00001440 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
1441 memcpy (dst, src + offset, len);
Wolfgang Denkdb421e62005-09-25 16:41:22 +02001442 flash_write_cmd (info, 0, 0, info->cmd_reset);
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001443 flash_unmap(info, 0, FLASH_OFFSET_USER_PROTECTION, src);
wdenk5653fc32004-02-08 22:55:38 +00001444}
wdenkbf9e3b32004-02-12 00:47:09 +00001445
wdenk5653fc32004-02-08 22:55:38 +00001446/*
1447 * flash_read_factory_serial - read the device Id from the protection area
1448 */
wdenkbf9e3b32004-02-12 00:47:09 +00001449void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset,
1450 int len)
wdenk5653fc32004-02-08 22:55:38 +00001451{
wdenkbf9e3b32004-02-12 00:47:09 +00001452 uchar *src;
wdenkcd37d9e2004-02-10 00:03:41 +00001453
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001454 src = flash_map (info, 0, FLASH_OFFSET_INTEL_PROTECTION);
wdenkbf9e3b32004-02-12 00:47:09 +00001455 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
1456 memcpy (buffer, src + offset, len);
Wolfgang Denkdb421e62005-09-25 16:41:22 +02001457 flash_write_cmd (info, 0, 0, info->cmd_reset);
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001458 flash_unmap(info, 0, FLASH_OFFSET_INTEL_PROTECTION, src);
wdenk5653fc32004-02-08 22:55:38 +00001459}
1460
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001461#endif /* CONFIG_SYS_FLASH_PROTECTION */
wdenk5653fc32004-02-08 22:55:38 +00001462
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001463/*-----------------------------------------------------------------------
1464 * Reverse the order of the erase regions in the CFI QRY structure.
1465 * This is needed for chips that are either a) correctly detected as
1466 * top-boot, or b) buggy.
1467 */
1468static void cfi_reverse_geometry(struct cfi_qry *qry)
1469{
1470 unsigned int i, j;
1471 u32 tmp;
1472
1473 for (i = 0, j = qry->num_erase_regions - 1; i < j; i++, j--) {
1474 tmp = qry->erase_region_info[i];
1475 qry->erase_region_info[i] = qry->erase_region_info[j];
1476 qry->erase_region_info[j] = tmp;
1477 }
1478}
wdenk5653fc32004-02-08 22:55:38 +00001479
1480/*-----------------------------------------------------------------------
Stefan Roese260421a2006-11-13 13:55:24 +01001481 * read jedec ids from device and set corresponding fields in info struct
1482 *
1483 * Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct
1484 *
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001485 */
1486static void cmdset_intel_read_jedec_ids(flash_info_t *info)
1487{
1488 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1489 flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
1490 udelay(1000); /* some flash are slow to respond */
1491 info->manufacturer_id = flash_read_uchar (info,
1492 FLASH_OFFSET_MANUFACTURER_ID);
1493 info->device_id = flash_read_uchar (info,
1494 FLASH_OFFSET_DEVICE_ID);
1495 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1496}
1497
1498static int cmdset_intel_init(flash_info_t *info, struct cfi_qry *qry)
1499{
1500 info->cmd_reset = FLASH_CMD_RESET;
1501
1502 cmdset_intel_read_jedec_ids(info);
1503 flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
1504
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001505#ifdef CONFIG_SYS_FLASH_PROTECTION
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001506 /* read legacy lock/unlock bit from intel flash */
1507 if (info->ext_addr) {
1508 info->legacy_unlock = flash_read_uchar (info,
1509 info->ext_addr + 5) & 0x08;
1510 }
1511#endif
1512
1513 return 0;
1514}
1515
1516static void cmdset_amd_read_jedec_ids(flash_info_t *info)
1517{
1518 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1519 flash_unlock_seq(info, 0);
1520 flash_write_cmd(info, 0, info->addr_unlock1, FLASH_CMD_READ_ID);
1521 udelay(1000); /* some flash are slow to respond */
Tor Krill90447ec2008-03-28 11:29:10 +01001522
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001523 info->manufacturer_id = flash_read_uchar (info,
1524 FLASH_OFFSET_MANUFACTURER_ID);
Tor Krill90447ec2008-03-28 11:29:10 +01001525
1526 switch (info->chipwidth){
1527 case FLASH_CFI_8BIT:
1528 info->device_id = flash_read_uchar (info,
1529 FLASH_OFFSET_DEVICE_ID);
1530 if (info->device_id == 0x7E) {
1531 /* AMD 3-byte (expanded) device ids */
1532 info->device_id2 = flash_read_uchar (info,
1533 FLASH_OFFSET_DEVICE_ID2);
1534 info->device_id2 <<= 8;
1535 info->device_id2 |= flash_read_uchar (info,
1536 FLASH_OFFSET_DEVICE_ID3);
1537 }
1538 break;
1539 case FLASH_CFI_16BIT:
1540 info->device_id = flash_read_word (info,
1541 FLASH_OFFSET_DEVICE_ID);
1542 break;
1543 default:
1544 break;
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001545 }
1546 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1547}
1548
1549static int cmdset_amd_init(flash_info_t *info, struct cfi_qry *qry)
1550{
1551 info->cmd_reset = AMD_CMD_RESET;
1552
1553 cmdset_amd_read_jedec_ids(info);
1554 flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
1555
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001556 return 0;
1557}
1558
1559#ifdef CONFIG_FLASH_CFI_LEGACY
Stefan Roese260421a2006-11-13 13:55:24 +01001560static void flash_read_jedec_ids (flash_info_t * info)
1561{
1562 info->manufacturer_id = 0;
1563 info->device_id = 0;
1564 info->device_id2 = 0;
1565
1566 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +04001567 case CFI_CMDSET_INTEL_PROG_REGIONS:
Stefan Roese260421a2006-11-13 13:55:24 +01001568 case CFI_CMDSET_INTEL_STANDARD:
1569 case CFI_CMDSET_INTEL_EXTENDED:
Michael Schwingen8225d1e2008-01-12 20:29:47 +01001570 cmdset_intel_read_jedec_ids(info);
Stefan Roese260421a2006-11-13 13:55:24 +01001571 break;
1572 case CFI_CMDSET_AMD_STANDARD:
1573 case CFI_CMDSET_AMD_EXTENDED:
Michael Schwingen8225d1e2008-01-12 20:29:47 +01001574 cmdset_amd_read_jedec_ids(info);
Stefan Roese260421a2006-11-13 13:55:24 +01001575 break;
1576 default:
1577 break;
1578 }
1579}
1580
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001581/*-----------------------------------------------------------------------
1582 * Call board code to request info about non-CFI flash.
1583 * board_flash_get_legacy needs to fill in at least:
1584 * info->portwidth, info->chipwidth and info->interface for Jedec probing.
1585 */
1586static int flash_detect_legacy(ulong base, int banknum)
1587{
1588 flash_info_t *info = &flash_info[banknum];
1589
1590 if (board_flash_get_legacy(base, banknum, info)) {
1591 /* board code may have filled info completely. If not, we
1592 use JEDEC ID probing. */
1593 if (!info->vendor) {
1594 int modes[] = {
1595 CFI_CMDSET_AMD_STANDARD,
1596 CFI_CMDSET_INTEL_STANDARD
1597 };
1598 int i;
1599
1600 for (i = 0; i < sizeof(modes) / sizeof(modes[0]); i++) {
1601 info->vendor = modes[i];
1602 info->start[0] = base;
1603 if (info->portwidth == FLASH_CFI_8BIT
1604 && info->interface == FLASH_CFI_X8X16) {
1605 info->addr_unlock1 = 0x2AAA;
1606 info->addr_unlock2 = 0x5555;
1607 } else {
1608 info->addr_unlock1 = 0x5555;
1609 info->addr_unlock2 = 0x2AAA;
1610 }
1611 flash_read_jedec_ids(info);
1612 debug("JEDEC PROBE: ID %x %x %x\n",
1613 info->manufacturer_id,
1614 info->device_id,
1615 info->device_id2);
1616 if (jedec_flash_match(info, base))
1617 break;
1618 }
1619 }
1620
1621 switch(info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +04001622 case CFI_CMDSET_INTEL_PROG_REGIONS:
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001623 case CFI_CMDSET_INTEL_STANDARD:
1624 case CFI_CMDSET_INTEL_EXTENDED:
1625 info->cmd_reset = FLASH_CMD_RESET;
1626 break;
1627 case CFI_CMDSET_AMD_STANDARD:
1628 case CFI_CMDSET_AMD_EXTENDED:
1629 case CFI_CMDSET_AMD_LEGACY:
1630 info->cmd_reset = AMD_CMD_RESET;
1631 break;
1632 }
1633 info->flash_id = FLASH_MAN_CFI;
1634 return 1;
1635 }
1636 return 0; /* use CFI */
1637}
1638#else
1639static inline int flash_detect_legacy(ulong base, int banknum)
1640{
1641 return 0; /* use CFI */
1642}
1643#endif
1644
Stefan Roese260421a2006-11-13 13:55:24 +01001645/*-----------------------------------------------------------------------
wdenk5653fc32004-02-08 22:55:38 +00001646 * detect if flash is compatible with the Common Flash Interface (CFI)
1647 * http://www.jedec.org/download/search/jesd68.pdf
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001648 */
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001649static void flash_read_cfi (flash_info_t *info, void *buf,
1650 unsigned int start, size_t len)
1651{
1652 u8 *p = buf;
1653 unsigned int i;
1654
1655 for (i = 0; i < len; i++)
1656 p[i] = flash_read_uchar(info, start + i);
1657}
1658
1659static int __flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)
wdenk5653fc32004-02-08 22:55:38 +00001660{
Wolfgang Denk92eb7292006-12-27 01:26:13 +01001661 int cfi_offset;
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001662
Michael Schwingen1ba639d2008-02-18 23:16:35 +01001663 /* We do not yet know what kind of commandset to use, so we issue
1664 the reset command in both Intel and AMD variants, in the hope
1665 that AMD flash roms ignore the Intel command. */
1666 flash_write_cmd (info, 0, 0, AMD_CMD_RESET);
1667 flash_write_cmd (info, 0, 0, FLASH_CMD_RESET);
1668
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001669 for (cfi_offset=0;
1670 cfi_offset < sizeof(flash_offset_cfi) / sizeof(uint);
1671 cfi_offset++) {
1672 flash_write_cmd (info, 0, flash_offset_cfi[cfi_offset],
1673 FLASH_CMD_CFI);
1674 if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q')
1675 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R')
1676 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001677 flash_read_cfi(info, qry, FLASH_OFFSET_CFI_RESP,
1678 sizeof(struct cfi_qry));
1679 info->interface = le16_to_cpu(qry->interface_desc);
1680
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001681 info->cfi_offset = flash_offset_cfi[cfi_offset];
1682 debug ("device interface is %d\n",
1683 info->interface);
1684 debug ("found port %d chip %d ",
1685 info->portwidth, info->chipwidth);
1686 debug ("port %d bits chip %d bits\n",
1687 info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1688 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1689
1690 /* calculate command offsets as in the Linux driver */
1691 info->addr_unlock1 = 0x555;
1692 info->addr_unlock2 = 0x2aa;
1693
1694 /*
1695 * modify the unlock address if we are
1696 * in compatibility mode
1697 */
1698 if ( /* x8/x16 in x8 mode */
1699 ((info->chipwidth == FLASH_CFI_BY8) &&
1700 (info->interface == FLASH_CFI_X8X16)) ||
1701 /* x16/x32 in x16 mode */
1702 ((info->chipwidth == FLASH_CFI_BY16) &&
1703 (info->interface == FLASH_CFI_X16X32)))
1704 {
1705 info->addr_unlock1 = 0xaaa;
1706 info->addr_unlock2 = 0x555;
1707 }
1708
1709 info->name = "CFI conformant";
1710 return 1;
1711 }
1712 }
1713
1714 return 0;
1715}
1716
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001717static int flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001718{
wdenkbf9e3b32004-02-12 00:47:09 +00001719 debug ("flash detect cfi\n");
wdenk5653fc32004-02-08 22:55:38 +00001720
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001721 for (info->portwidth = CONFIG_SYS_FLASH_CFI_WIDTH;
wdenkbf9e3b32004-02-12 00:47:09 +00001722 info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) {
1723 for (info->chipwidth = FLASH_CFI_BY8;
1724 info->chipwidth <= info->portwidth;
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001725 info->chipwidth <<= 1)
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001726 if (__flash_detect_cfi(info, qry))
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001727 return 1;
wdenk5653fc32004-02-08 22:55:38 +00001728 }
wdenkbf9e3b32004-02-12 00:47:09 +00001729 debug ("not found\n");
wdenk5653fc32004-02-08 22:55:38 +00001730 return 0;
1731}
wdenkbf9e3b32004-02-12 00:47:09 +00001732
wdenk5653fc32004-02-08 22:55:38 +00001733/*
Haavard Skinnemoen467bcee2007-12-14 15:36:18 +01001734 * Manufacturer-specific quirks. Add workarounds for geometry
1735 * reversal, etc. here.
1736 */
1737static void flash_fixup_amd(flash_info_t *info, struct cfi_qry *qry)
1738{
1739 /* check if flash geometry needs reversal */
1740 if (qry->num_erase_regions > 1) {
1741 /* reverse geometry if top boot part */
1742 if (info->cfi_version < 0x3131) {
1743 /* CFI < 1.1, try to guess from device id */
1744 if ((info->device_id & 0x80) != 0)
1745 cfi_reverse_geometry(qry);
1746 } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
1747 /* CFI >= 1.1, deduct from top/bottom flag */
1748 /* note: ext_addr is valid since cfi_version > 0 */
1749 cfi_reverse_geometry(qry);
1750 }
1751 }
1752}
1753
1754static void flash_fixup_atmel(flash_info_t *info, struct cfi_qry *qry)
1755{
1756 int reverse_geometry = 0;
1757
1758 /* Check the "top boot" bit in the PRI */
1759 if (info->ext_addr && !(flash_read_uchar(info, info->ext_addr + 6) & 1))
1760 reverse_geometry = 1;
1761
1762 /* AT49BV6416(T) list the erase regions in the wrong order.
1763 * However, the device ID is identical with the non-broken
1764 * AT49BV642D since u-boot only reads the low byte (they
1765 * differ in the high byte.) So leave out this fixup for now.
1766 */
1767#if 0
1768 if (info->device_id == 0xd6 || info->device_id == 0xd2)
1769 reverse_geometry = !reverse_geometry;
1770#endif
1771
1772 if (reverse_geometry)
1773 cfi_reverse_geometry(qry);
1774}
1775
1776/*
wdenk5653fc32004-02-08 22:55:38 +00001777 * The following code cannot be run from FLASH!
1778 *
1779 */
Marian Balakowicze6f2e902005-10-11 19:09:42 +02001780ulong flash_get_size (ulong base, int banknum)
wdenk5653fc32004-02-08 22:55:38 +00001781{
wdenkbf9e3b32004-02-12 00:47:09 +00001782 flash_info_t *info = &flash_info[banknum];
wdenk5653fc32004-02-08 22:55:38 +00001783 int i, j;
1784 flash_sect_t sect_cnt;
1785 unsigned long sector;
1786 unsigned long tmp;
1787 int size_ratio;
1788 uchar num_erase_regions;
wdenkbf9e3b32004-02-12 00:47:09 +00001789 int erase_region_size;
1790 int erase_region_count;
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001791 struct cfi_qry qry;
Stefan Roese260421a2006-11-13 13:55:24 +01001792
Kumar Galaf9796902008-05-15 15:13:08 -05001793 memset(&qry, 0, sizeof(qry));
1794
Stefan Roese260421a2006-11-13 13:55:24 +01001795 info->ext_addr = 0;
1796 info->cfi_version = 0;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001797#ifdef CONFIG_SYS_FLASH_PROTECTION
Stefan Roese2662b402006-04-01 13:41:03 +02001798 info->legacy_unlock = 0;
1799#endif
wdenk5653fc32004-02-08 22:55:38 +00001800
1801 info->start[0] = base;
1802
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001803 if (flash_detect_cfi (info, &qry)) {
1804 info->vendor = le16_to_cpu(qry.p_id);
1805 info->ext_addr = le16_to_cpu(qry.p_adr);
1806 num_erase_regions = qry.num_erase_regions;
1807
Stefan Roese260421a2006-11-13 13:55:24 +01001808 if (info->ext_addr) {
1809 info->cfi_version = (ushort) flash_read_uchar (info,
1810 info->ext_addr + 3) << 8;
1811 info->cfi_version |= (ushort) flash_read_uchar (info,
1812 info->ext_addr + 4);
1813 }
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001814
wdenkbf9e3b32004-02-12 00:47:09 +00001815#ifdef DEBUG
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001816 flash_printqry (&qry);
wdenkbf9e3b32004-02-12 00:47:09 +00001817#endif
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001818
wdenkbf9e3b32004-02-12 00:47:09 +00001819 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +04001820 case CFI_CMDSET_INTEL_PROG_REGIONS:
wdenk5653fc32004-02-08 22:55:38 +00001821 case CFI_CMDSET_INTEL_STANDARD:
1822 case CFI_CMDSET_INTEL_EXTENDED:
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001823 cmdset_intel_init(info, &qry);
wdenk5653fc32004-02-08 22:55:38 +00001824 break;
1825 case CFI_CMDSET_AMD_STANDARD:
1826 case CFI_CMDSET_AMD_EXTENDED:
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001827 cmdset_amd_init(info, &qry);
wdenk5653fc32004-02-08 22:55:38 +00001828 break;
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001829 default:
1830 printf("CFI: Unknown command set 0x%x\n",
1831 info->vendor);
1832 /*
1833 * Unfortunately, this means we don't know how
1834 * to get the chip back to Read mode. Might
1835 * as well try an Intel-style reset...
1836 */
1837 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1838 return 0;
wdenk5653fc32004-02-08 22:55:38 +00001839 }
wdenkcd37d9e2004-02-10 00:03:41 +00001840
Haavard Skinnemoen467bcee2007-12-14 15:36:18 +01001841 /* Do manufacturer-specific fixups */
1842 switch (info->manufacturer_id) {
1843 case 0x0001:
1844 flash_fixup_amd(info, &qry);
1845 break;
1846 case 0x001f:
1847 flash_fixup_atmel(info, &qry);
1848 break;
1849 }
1850
wdenkbf9e3b32004-02-12 00:47:09 +00001851 debug ("manufacturer is %d\n", info->vendor);
Stefan Roese260421a2006-11-13 13:55:24 +01001852 debug ("manufacturer id is 0x%x\n", info->manufacturer_id);
1853 debug ("device id is 0x%x\n", info->device_id);
1854 debug ("device id2 is 0x%x\n", info->device_id2);
1855 debug ("cfi version is 0x%04x\n", info->cfi_version);
1856
wdenk5653fc32004-02-08 22:55:38 +00001857 size_ratio = info->portwidth / info->chipwidth;
wdenkbf9e3b32004-02-12 00:47:09 +00001858 /* if the chip is x8/x16 reduce the ratio by half */
1859 if ((info->interface == FLASH_CFI_X8X16)
1860 && (info->chipwidth == FLASH_CFI_BY8)) {
1861 size_ratio >>= 1;
1862 }
wdenkbf9e3b32004-02-12 00:47:09 +00001863 debug ("size_ratio %d port %d bits chip %d bits\n",
1864 size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1865 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1866 debug ("found %d erase regions\n", num_erase_regions);
wdenk5653fc32004-02-08 22:55:38 +00001867 sect_cnt = 0;
1868 sector = base;
wdenkbf9e3b32004-02-12 00:47:09 +00001869 for (i = 0; i < num_erase_regions; i++) {
1870 if (i > NUM_ERASE_REGIONS) {
wdenk028ab6b2004-02-23 23:54:43 +00001871 printf ("%d erase regions found, only %d used\n",
1872 num_erase_regions, NUM_ERASE_REGIONS);
wdenk5653fc32004-02-08 22:55:38 +00001873 break;
1874 }
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001875
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001876 tmp = le32_to_cpu(qry.erase_region_info[i]);
1877 debug("erase region %u: 0x%08lx\n", i, tmp);
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001878
1879 erase_region_count = (tmp & 0xffff) + 1;
1880 tmp >>= 16;
wdenkbf9e3b32004-02-12 00:47:09 +00001881 erase_region_size =
1882 (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
wdenk4c0d4c32004-06-09 17:34:58 +00001883 debug ("erase_region_count = %d erase_region_size = %d\n",
wdenk028ab6b2004-02-23 23:54:43 +00001884 erase_region_count, erase_region_size);
wdenkbf9e3b32004-02-12 00:47:09 +00001885 for (j = 0; j < erase_region_count; j++) {
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001886 if (sect_cnt >= CONFIG_SYS_MAX_FLASH_SECT) {
Michael Schwingen81b20cc2007-12-07 23:35:02 +01001887 printf("ERROR: too many flash sectors\n");
1888 break;
1889 }
wdenk5653fc32004-02-08 22:55:38 +00001890 info->start[sect_cnt] = sector;
1891 sector += (erase_region_size * size_ratio);
wdenka1191902005-01-09 17:12:27 +00001892
1893 /*
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001894 * Only read protection status from
1895 * supported devices (intel...)
wdenka1191902005-01-09 17:12:27 +00001896 */
1897 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +04001898 case CFI_CMDSET_INTEL_PROG_REGIONS:
wdenka1191902005-01-09 17:12:27 +00001899 case CFI_CMDSET_INTEL_EXTENDED:
1900 case CFI_CMDSET_INTEL_STANDARD:
1901 info->protect[sect_cnt] =
1902 flash_isset (info, sect_cnt,
1903 FLASH_OFFSET_PROTECT,
1904 FLASH_STATUS_PROTECT);
1905 break;
1906 default:
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001907 /* default: not protected */
1908 info->protect[sect_cnt] = 0;
wdenka1191902005-01-09 17:12:27 +00001909 }
1910
wdenk5653fc32004-02-08 22:55:38 +00001911 sect_cnt++;
1912 }
1913 }
1914
1915 info->sector_count = sect_cnt;
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001916 info->size = 1 << qry.dev_size;
wdenk5653fc32004-02-08 22:55:38 +00001917 /* multiply the size by the number of chips */
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001918 info->size *= size_ratio;
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001919 info->buffer_size = 1 << le16_to_cpu(qry.max_buf_write_size);
1920 tmp = 1 << qry.block_erase_timeout_typ;
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001921 info->erase_blk_tout = tmp *
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001922 (1 << qry.block_erase_timeout_max);
1923 tmp = (1 << qry.buf_write_timeout_typ) *
1924 (1 << qry.buf_write_timeout_max);
1925
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001926 /* round up when converting to ms */
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001927 info->buffer_write_tout = (tmp + 999) / 1000;
1928 tmp = (1 << qry.word_write_timeout_typ) *
1929 (1 << qry.word_write_timeout_max);
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001930 /* round up when converting to ms */
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001931 info->write_tout = (tmp + 999) / 1000;
wdenk5653fc32004-02-08 22:55:38 +00001932 info->flash_id = FLASH_MAN_CFI;
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001933 if ((info->interface == FLASH_CFI_X8X16) &&
1934 (info->chipwidth == FLASH_CFI_BY8)) {
1935 /* XXX - Need to test on x8/x16 in parallel. */
1936 info->portwidth >>= 1;
wdenk855a4962004-03-14 18:23:55 +00001937 }
Mike Frysinger22159872008-10-02 01:55:38 -04001938
1939 flash_write_cmd (info, 0, 0, info->cmd_reset);
wdenk5653fc32004-02-08 22:55:38 +00001940 }
1941
wdenkbf9e3b32004-02-12 00:47:09 +00001942 return (info->size);
wdenk5653fc32004-02-08 22:55:38 +00001943}
1944
wdenk5653fc32004-02-08 22:55:38 +00001945/*-----------------------------------------------------------------------
1946 */
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001947unsigned long flash_init (void)
wdenk5653fc32004-02-08 22:55:38 +00001948{
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001949 unsigned long size = 0;
1950 int i;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001951#if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
Matthias Fuchsc63ad632008-04-18 16:29:40 +02001952 struct apl_s {
1953 ulong start;
1954 ulong size;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001955 } apl[] = CONFIG_SYS_FLASH_AUTOPROTECT_LIST;
Matthias Fuchsc63ad632008-04-18 16:29:40 +02001956#endif
wdenk5653fc32004-02-08 22:55:38 +00001957
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001958#ifdef CONFIG_SYS_FLASH_PROTECTION
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001959 char *s = getenv("unlock");
Michael Schwingen81b20cc2007-12-07 23:35:02 +01001960#endif
wdenk5653fc32004-02-08 22:55:38 +00001961
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001962#define BANK_BASE(i) (((unsigned long [CFI_MAX_FLASH_BANKS])CONFIG_SYS_FLASH_BANKS_LIST)[i])
Wolfgang Denk2a112b22008-08-08 16:39:54 +02001963
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001964 /* Init: no FLASHes known */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001965 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001966 flash_info[i].flash_id = FLASH_UNKNOWN;
wdenk5653fc32004-02-08 22:55:38 +00001967
Wolfgang Denk2a112b22008-08-08 16:39:54 +02001968 if (!flash_detect_legacy (BANK_BASE(i), i))
1969 flash_get_size (BANK_BASE(i), i);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001970 size += flash_info[i].size;
1971 if (flash_info[i].flash_id == FLASH_UNKNOWN) {
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001972#ifndef CONFIG_SYS_FLASH_QUIET_TEST
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001973 printf ("## Unknown FLASH on Bank %d "
1974 "- Size = 0x%08lx = %ld MB\n",
1975 i+1, flash_info[i].size,
1976 flash_info[i].size << 20);
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001977#endif /* CONFIG_SYS_FLASH_QUIET_TEST */
wdenk5653fc32004-02-08 22:55:38 +00001978 }
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001979#ifdef CONFIG_SYS_FLASH_PROTECTION
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001980 else if ((s != NULL) && (strcmp(s, "yes") == 0)) {
1981 /*
1982 * Only the U-Boot image and it's environment
1983 * is protected, all other sectors are
1984 * unprotected (unlocked) if flash hardware
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001985 * protection is used (CONFIG_SYS_FLASH_PROTECTION)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001986 * and the environment variable "unlock" is
1987 * set to "yes".
1988 */
1989 if (flash_info[i].legacy_unlock) {
1990 int k;
Stefan Roese79b4cda2006-02-28 15:29:58 +01001991
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001992 /*
1993 * Disable legacy_unlock temporarily,
1994 * since flash_real_protect would
1995 * relock all other sectors again
1996 * otherwise.
1997 */
1998 flash_info[i].legacy_unlock = 0;
Stefan Roese79b4cda2006-02-28 15:29:58 +01001999
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002000 /*
2001 * Legacy unlocking (e.g. Intel J3) ->
2002 * unlock only one sector. This will
2003 * unlock all sectors.
2004 */
2005 flash_real_protect (&flash_info[i], 0, 0);
Stefan Roese79b4cda2006-02-28 15:29:58 +01002006
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002007 flash_info[i].legacy_unlock = 1;
2008
2009 /*
2010 * Manually mark other sectors as
2011 * unlocked (unprotected)
2012 */
2013 for (k = 1; k < flash_info[i].sector_count; k++)
2014 flash_info[i].protect[k] = 0;
2015 } else {
2016 /*
2017 * No legancy unlocking -> unlock all sectors
2018 */
2019 flash_protect (FLAG_PROTECT_CLEAR,
2020 flash_info[i].start[0],
2021 flash_info[i].start[0]
2022 + flash_info[i].size - 1,
2023 &flash_info[i]);
2024 }
Stefan Roese79b4cda2006-02-28 15:29:58 +01002025 }
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002026#endif /* CONFIG_SYS_FLASH_PROTECTION */
wdenk5653fc32004-02-08 22:55:38 +00002027 }
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002028
2029 /* Monitor protection ON by default */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002030#if (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002031 flash_protect (FLAG_PROTECT_SET,
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002032 CONFIG_SYS_MONITOR_BASE,
2033 CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1,
2034 flash_get_info(CONFIG_SYS_MONITOR_BASE));
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002035#endif
2036
2037 /* Environment protection ON by default */
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +02002038#ifdef CONFIG_ENV_IS_IN_FLASH
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002039 flash_protect (FLAG_PROTECT_SET,
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +02002040 CONFIG_ENV_ADDR,
2041 CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1,
2042 flash_get_info(CONFIG_ENV_ADDR));
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002043#endif
2044
2045 /* Redundant environment protection ON by default */
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +02002046#ifdef CONFIG_ENV_ADDR_REDUND
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002047 flash_protect (FLAG_PROTECT_SET,
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +02002048 CONFIG_ENV_ADDR_REDUND,
2049 CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SIZE_REDUND - 1,
2050 flash_get_info(CONFIG_ENV_ADDR_REDUND));
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002051#endif
Matthias Fuchsc63ad632008-04-18 16:29:40 +02002052
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002053#if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
Matthias Fuchsc63ad632008-04-18 16:29:40 +02002054 for (i = 0; i < (sizeof(apl) / sizeof(struct apl_s)); i++) {
2055 debug("autoprotecting from %08x to %08x\n",
2056 apl[i].start, apl[i].start + apl[i].size - 1);
2057 flash_protect (FLAG_PROTECT_SET,
2058 apl[i].start,
2059 apl[i].start + apl[i].size - 1,
2060 flash_get_info(apl[i].start));
2061 }
2062#endif
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002063 return (size);
wdenk5653fc32004-02-08 22:55:38 +00002064}