Mike Frysinger | be853bf | 2008-10-06 04:16:47 -0400 | [diff] [blame] | 1 | /* |
Scott Jiang | fea9b69 | 2014-11-13 15:30:53 +0800 | [diff] [blame] | 2 | * i2c.c - driver for ADI TWI/I2C |
Mike Frysinger | be853bf | 2008-10-06 04:16:47 -0400 | [diff] [blame] | 3 | * |
Scott Jiang | fea9b69 | 2014-11-13 15:30:53 +0800 | [diff] [blame] | 4 | * Copyright (c) 2006-2014 Analog Devices Inc. |
Mike Frysinger | be853bf | 2008-10-06 04:16:47 -0400 | [diff] [blame] | 5 | * |
| 6 | * Licensed under the GPL-2 or later. |
| 7 | */ |
| 8 | |
| 9 | #include <common.h> |
| 10 | #include <i2c.h> |
| 11 | |
Sonic Zhang | d6a320d | 2014-01-28 13:53:34 +0800 | [diff] [blame] | 12 | #include <asm/clock.h> |
Scott Jiang | fea9b69 | 2014-11-13 15:30:53 +0800 | [diff] [blame] | 13 | #include <asm/twi.h> |
Scott Jiang | a6be70f | 2014-11-13 15:30:54 +0800 | [diff] [blame] | 14 | #include <asm/io.h> |
Mike Frysinger | be853bf | 2008-10-06 04:16:47 -0400 | [diff] [blame] | 15 | |
Scott Jiang | c469703 | 2014-11-13 15:30:55 +0800 | [diff] [blame] | 16 | static struct twi_regs *i2c_get_base(struct i2c_adapter *adap); |
| 17 | |
Mike Frysinger | b5cebb4 | 2010-05-05 03:20:30 -0400 | [diff] [blame] | 18 | /* Every register is 32bit aligned, but only 16bits in size */ |
| 19 | #define ureg(name) u16 name; u16 __pad_##name; |
| 20 | struct twi_regs { |
| 21 | ureg(clkdiv); |
| 22 | ureg(control); |
| 23 | ureg(slave_ctl); |
| 24 | ureg(slave_stat); |
| 25 | ureg(slave_addr); |
| 26 | ureg(master_ctl); |
| 27 | ureg(master_stat); |
| 28 | ureg(master_addr); |
| 29 | ureg(int_stat); |
| 30 | ureg(int_mask); |
| 31 | ureg(fifo_ctl); |
| 32 | ureg(fifo_stat); |
| 33 | char __pad[0x50]; |
| 34 | ureg(xmt_data8); |
| 35 | ureg(xmt_data16); |
| 36 | ureg(rcv_data8); |
| 37 | ureg(rcv_data16); |
| 38 | }; |
| 39 | #undef ureg |
| 40 | |
Mike Frysinger | b5cebb4 | 2010-05-05 03:20:30 -0400 | [diff] [blame] | 41 | #ifdef TWI_CLKDIV |
| 42 | #define TWI0_CLKDIV TWI_CLKDIV |
Scott Jiang | c469703 | 2014-11-13 15:30:55 +0800 | [diff] [blame] | 43 | # ifdef CONFIG_SYS_MAX_I2C_BUS |
| 44 | # undef CONFIG_SYS_MAX_I2C_BUS |
| 45 | # endif |
| 46 | #define CONFIG_SYS_MAX_I2C_BUS 1 |
Mike Frysinger | be853bf | 2008-10-06 04:16:47 -0400 | [diff] [blame] | 47 | #endif |
Mike Frysinger | 08a1c62 | 2009-10-14 19:27:27 -0400 | [diff] [blame] | 48 | |
| 49 | /* |
| 50 | * The way speed is changed into duty often results in integer truncation |
| 51 | * with 50% duty, so we'll force rounding up to the next duty by adding 1 |
| 52 | * to the max. In practice this will get us a speed of something like |
| 53 | * 385 KHz. The other limit is easy to handle as it is only 8 bits. |
| 54 | */ |
| 55 | #define I2C_SPEED_MAX 400000 |
| 56 | #define I2C_SPEED_TO_DUTY(speed) (5000000 / (speed)) |
| 57 | #define I2C_DUTY_MAX (I2C_SPEED_TO_DUTY(I2C_SPEED_MAX) + 1) |
| 58 | #define I2C_DUTY_MIN 0xff /* 8 bit limited */ |
| 59 | #define SYS_I2C_DUTY I2C_SPEED_TO_DUTY(CONFIG_SYS_I2C_SPEED) |
| 60 | /* Note: duty is inverse of speed, so the comparisons below are correct */ |
| 61 | #if SYS_I2C_DUTY < I2C_DUTY_MAX || SYS_I2C_DUTY > I2C_DUTY_MIN |
Scott Jiang | c469703 | 2014-11-13 15:30:55 +0800 | [diff] [blame] | 62 | # error "The I2C hardware can only operate 20KHz - 400KHz" |
Mike Frysinger | be853bf | 2008-10-06 04:16:47 -0400 | [diff] [blame] | 63 | #endif |
| 64 | |
| 65 | /* All transfers are described by this data structure */ |
Simon Glass | fffff72 | 2015-02-05 21:41:33 -0700 | [diff] [blame] | 66 | struct adi_i2c_msg { |
Mike Frysinger | be853bf | 2008-10-06 04:16:47 -0400 | [diff] [blame] | 67 | u8 flags; |
| 68 | #define I2C_M_COMBO 0x4 |
| 69 | #define I2C_M_STOP 0x2 |
| 70 | #define I2C_M_READ 0x1 |
| 71 | int len; /* msg length */ |
| 72 | u8 *buf; /* pointer to msg data */ |
| 73 | int alen; /* addr length */ |
| 74 | u8 *abuf; /* addr buffer */ |
| 75 | }; |
| 76 | |
Mike Frysinger | 3814ea4 | 2009-10-14 19:27:26 -0400 | [diff] [blame] | 77 | /* Allow msec timeout per ~byte transfer */ |
| 78 | #define I2C_TIMEOUT 10 |
| 79 | |
Mike Frysinger | be853bf | 2008-10-06 04:16:47 -0400 | [diff] [blame] | 80 | /** |
| 81 | * wait_for_completion - manage the actual i2c transfer |
| 82 | * @msg: the i2c msg |
| 83 | */ |
Simon Glass | fffff72 | 2015-02-05 21:41:33 -0700 | [diff] [blame] | 84 | static int wait_for_completion(struct twi_regs *twi, struct adi_i2c_msg *msg) |
Mike Frysinger | be853bf | 2008-10-06 04:16:47 -0400 | [diff] [blame] | 85 | { |
Scott Jiang | a6be70f | 2014-11-13 15:30:54 +0800 | [diff] [blame] | 86 | u16 int_stat, ctl; |
Mike Frysinger | 3814ea4 | 2009-10-14 19:27:26 -0400 | [diff] [blame] | 87 | ulong timebase = get_timer(0); |
Mike Frysinger | be853bf | 2008-10-06 04:16:47 -0400 | [diff] [blame] | 88 | |
Mike Frysinger | 3814ea4 | 2009-10-14 19:27:26 -0400 | [diff] [blame] | 89 | do { |
Scott Jiang | a6be70f | 2014-11-13 15:30:54 +0800 | [diff] [blame] | 90 | int_stat = readw(&twi->int_stat); |
Mike Frysinger | be853bf | 2008-10-06 04:16:47 -0400 | [diff] [blame] | 91 | |
| 92 | if (int_stat & XMTSERV) { |
Scott Jiang | a6be70f | 2014-11-13 15:30:54 +0800 | [diff] [blame] | 93 | writew(XMTSERV, &twi->int_stat); |
Mike Frysinger | be853bf | 2008-10-06 04:16:47 -0400 | [diff] [blame] | 94 | if (msg->alen) { |
Scott Jiang | a6be70f | 2014-11-13 15:30:54 +0800 | [diff] [blame] | 95 | writew(*(msg->abuf++), &twi->xmt_data8); |
Mike Frysinger | be853bf | 2008-10-06 04:16:47 -0400 | [diff] [blame] | 96 | --msg->alen; |
| 97 | } else if (!(msg->flags & I2C_M_COMBO) && msg->len) { |
Scott Jiang | a6be70f | 2014-11-13 15:30:54 +0800 | [diff] [blame] | 98 | writew(*(msg->buf++), &twi->xmt_data8); |
Mike Frysinger | be853bf | 2008-10-06 04:16:47 -0400 | [diff] [blame] | 99 | --msg->len; |
| 100 | } else { |
Scott Jiang | a6be70f | 2014-11-13 15:30:54 +0800 | [diff] [blame] | 101 | ctl = readw(&twi->master_ctl); |
| 102 | if (msg->flags & I2C_M_COMBO) |
| 103 | writew(ctl | RSTART | MDIR, |
| 104 | &twi->master_ctl); |
| 105 | else |
| 106 | writew(ctl | STOP, &twi->master_ctl); |
Mike Frysinger | be853bf | 2008-10-06 04:16:47 -0400 | [diff] [blame] | 107 | } |
| 108 | } |
| 109 | if (int_stat & RCVSERV) { |
Scott Jiang | a6be70f | 2014-11-13 15:30:54 +0800 | [diff] [blame] | 110 | writew(RCVSERV, &twi->int_stat); |
Mike Frysinger | be853bf | 2008-10-06 04:16:47 -0400 | [diff] [blame] | 111 | if (msg->len) { |
Scott Jiang | a6be70f | 2014-11-13 15:30:54 +0800 | [diff] [blame] | 112 | *(msg->buf++) = readw(&twi->rcv_data8); |
Mike Frysinger | be853bf | 2008-10-06 04:16:47 -0400 | [diff] [blame] | 113 | --msg->len; |
| 114 | } else if (msg->flags & I2C_M_STOP) { |
Scott Jiang | a6be70f | 2014-11-13 15:30:54 +0800 | [diff] [blame] | 115 | ctl = readw(&twi->master_ctl); |
| 116 | writew(ctl | STOP, &twi->master_ctl); |
Mike Frysinger | be853bf | 2008-10-06 04:16:47 -0400 | [diff] [blame] | 117 | } |
| 118 | } |
| 119 | if (int_stat & MERR) { |
Scott Jiang | a6be70f | 2014-11-13 15:30:54 +0800 | [diff] [blame] | 120 | writew(MERR, &twi->int_stat); |
Mike Frysinger | 3814ea4 | 2009-10-14 19:27:26 -0400 | [diff] [blame] | 121 | return msg->len; |
Mike Frysinger | be853bf | 2008-10-06 04:16:47 -0400 | [diff] [blame] | 122 | } |
| 123 | if (int_stat & MCOMP) { |
Scott Jiang | a6be70f | 2014-11-13 15:30:54 +0800 | [diff] [blame] | 124 | writew(MCOMP, &twi->int_stat); |
Mike Frysinger | be853bf | 2008-10-06 04:16:47 -0400 | [diff] [blame] | 125 | if (msg->flags & I2C_M_COMBO && msg->len) { |
Scott Jiang | a6be70f | 2014-11-13 15:30:54 +0800 | [diff] [blame] | 126 | ctl = readw(&twi->master_ctl); |
| 127 | ctl = (ctl & ~RSTART) | |
Mike Frysinger | b5cebb4 | 2010-05-05 03:20:30 -0400 | [diff] [blame] | 128 | (min(msg->len, 0xff) << 6) | MEN | MDIR; |
Scott Jiang | a6be70f | 2014-11-13 15:30:54 +0800 | [diff] [blame] | 129 | writew(ctl, &twi->master_ctl); |
Mike Frysinger | be853bf | 2008-10-06 04:16:47 -0400 | [diff] [blame] | 130 | } else |
| 131 | break; |
| 132 | } |
Mike Frysinger | 3814ea4 | 2009-10-14 19:27:26 -0400 | [diff] [blame] | 133 | |
| 134 | /* If we were able to do something, reset timeout */ |
| 135 | if (int_stat) |
| 136 | timebase = get_timer(0); |
| 137 | |
| 138 | } while (get_timer(timebase) < I2C_TIMEOUT); |
Mike Frysinger | be853bf | 2008-10-06 04:16:47 -0400 | [diff] [blame] | 139 | |
| 140 | return msg->len; |
| 141 | } |
| 142 | |
Scott Jiang | c469703 | 2014-11-13 15:30:55 +0800 | [diff] [blame] | 143 | static int i2c_transfer(struct i2c_adapter *adap, uint8_t chip, uint addr, |
| 144 | int alen, uint8_t *buffer, int len, uint8_t flags) |
Mike Frysinger | be853bf | 2008-10-06 04:16:47 -0400 | [diff] [blame] | 145 | { |
Scott Jiang | c469703 | 2014-11-13 15:30:55 +0800 | [diff] [blame] | 146 | struct twi_regs *twi = i2c_get_base(adap); |
Scott Jiang | a6be70f | 2014-11-13 15:30:54 +0800 | [diff] [blame] | 147 | int ret; |
| 148 | u16 ctl; |
Mike Frysinger | be853bf | 2008-10-06 04:16:47 -0400 | [diff] [blame] | 149 | uchar addr_buffer[] = { |
| 150 | (addr >> 0), |
| 151 | (addr >> 8), |
| 152 | (addr >> 16), |
| 153 | }; |
Simon Glass | fffff72 | 2015-02-05 21:41:33 -0700 | [diff] [blame] | 154 | struct adi_i2c_msg msg = { |
Mike Frysinger | be853bf | 2008-10-06 04:16:47 -0400 | [diff] [blame] | 155 | .flags = flags | (len >= 0xff ? I2C_M_STOP : 0), |
| 156 | .buf = buffer, |
| 157 | .len = len, |
| 158 | .abuf = addr_buffer, |
| 159 | .alen = alen, |
| 160 | }; |
Mike Frysinger | be853bf | 2008-10-06 04:16:47 -0400 | [diff] [blame] | 161 | |
Mike Frysinger | be853bf | 2008-10-06 04:16:47 -0400 | [diff] [blame] | 162 | /* wait for things to settle */ |
Scott Jiang | a6be70f | 2014-11-13 15:30:54 +0800 | [diff] [blame] | 163 | while (readw(&twi->master_stat) & BUSBUSY) |
Mike Frysinger | be853bf | 2008-10-06 04:16:47 -0400 | [diff] [blame] | 164 | if (ctrlc()) |
| 165 | return 1; |
| 166 | |
| 167 | /* Set Transmit device address */ |
Scott Jiang | a6be70f | 2014-11-13 15:30:54 +0800 | [diff] [blame] | 168 | writew(chip, &twi->master_addr); |
Mike Frysinger | be853bf | 2008-10-06 04:16:47 -0400 | [diff] [blame] | 169 | |
| 170 | /* Clear the FIFO before starting things */ |
Scott Jiang | a6be70f | 2014-11-13 15:30:54 +0800 | [diff] [blame] | 171 | writew(XMTFLUSH | RCVFLUSH, &twi->fifo_ctl); |
| 172 | writew(0, &twi->fifo_ctl); |
Mike Frysinger | be853bf | 2008-10-06 04:16:47 -0400 | [diff] [blame] | 173 | |
| 174 | /* prime the pump */ |
| 175 | if (msg.alen) { |
Peter Meerwald | 98ab14e | 2009-06-29 15:48:33 -0400 | [diff] [blame] | 176 | len = (msg.flags & I2C_M_COMBO) ? msg.alen : msg.alen + len; |
Scott Jiang | a6be70f | 2014-11-13 15:30:54 +0800 | [diff] [blame] | 177 | writew(*(msg.abuf++), &twi->xmt_data8); |
Mike Frysinger | be853bf | 2008-10-06 04:16:47 -0400 | [diff] [blame] | 178 | --msg.alen; |
| 179 | } else if (!(msg.flags & I2C_M_READ) && msg.len) { |
Scott Jiang | a6be70f | 2014-11-13 15:30:54 +0800 | [diff] [blame] | 180 | writew(*(msg.buf++), &twi->xmt_data8); |
Mike Frysinger | be853bf | 2008-10-06 04:16:47 -0400 | [diff] [blame] | 181 | --msg.len; |
| 182 | } |
| 183 | |
| 184 | /* clear int stat */ |
Scott Jiang | a6be70f | 2014-11-13 15:30:54 +0800 | [diff] [blame] | 185 | writew(-1, &twi->master_stat); |
| 186 | writew(-1, &twi->int_stat); |
| 187 | writew(0, &twi->int_mask); |
Mike Frysinger | be853bf | 2008-10-06 04:16:47 -0400 | [diff] [blame] | 188 | |
| 189 | /* Master enable */ |
Scott Jiang | a6be70f | 2014-11-13 15:30:54 +0800 | [diff] [blame] | 190 | ctl = readw(&twi->master_ctl); |
| 191 | ctl = (ctl & FAST) | (min(len, 0xff) << 6) | MEN | |
| 192 | ((msg.flags & I2C_M_READ) ? MDIR : 0); |
| 193 | writew(ctl, &twi->master_ctl); |
Mike Frysinger | be853bf | 2008-10-06 04:16:47 -0400 | [diff] [blame] | 194 | |
| 195 | /* process the rest */ |
Scott Jiang | c469703 | 2014-11-13 15:30:55 +0800 | [diff] [blame] | 196 | ret = wait_for_completion(twi, &msg); |
Mike Frysinger | be853bf | 2008-10-06 04:16:47 -0400 | [diff] [blame] | 197 | |
| 198 | if (ret) { |
Scott Jiang | a6be70f | 2014-11-13 15:30:54 +0800 | [diff] [blame] | 199 | ctl = readw(&twi->master_ctl) & ~MEN; |
| 200 | writew(ctl, &twi->master_ctl); |
| 201 | ctl = readw(&twi->control) & ~TWI_ENA; |
| 202 | writew(ctl, &twi->control); |
| 203 | ctl = readw(&twi->control) | TWI_ENA; |
| 204 | writew(ctl, &twi->control); |
Mike Frysinger | be853bf | 2008-10-06 04:16:47 -0400 | [diff] [blame] | 205 | } |
| 206 | |
| 207 | return ret; |
| 208 | } |
| 209 | |
Scott Jiang | c469703 | 2014-11-13 15:30:55 +0800 | [diff] [blame] | 210 | static uint adi_i2c_setspeed(struct i2c_adapter *adap, uint speed) |
Mike Frysinger | 08a1c62 | 2009-10-14 19:27:27 -0400 | [diff] [blame] | 211 | { |
Scott Jiang | c469703 | 2014-11-13 15:30:55 +0800 | [diff] [blame] | 212 | struct twi_regs *twi = i2c_get_base(adap); |
Mike Frysinger | 08a1c62 | 2009-10-14 19:27:27 -0400 | [diff] [blame] | 213 | u16 clkdiv = I2C_SPEED_TO_DUTY(speed); |
| 214 | |
| 215 | /* Set TWI interface clock */ |
| 216 | if (clkdiv < I2C_DUTY_MAX || clkdiv > I2C_DUTY_MIN) |
| 217 | return -1; |
Scott Jiang | a6be70f | 2014-11-13 15:30:54 +0800 | [diff] [blame] | 218 | clkdiv = (clkdiv << 8) | (clkdiv & 0xff); |
| 219 | writew(clkdiv, &twi->clkdiv); |
Mike Frysinger | 08a1c62 | 2009-10-14 19:27:27 -0400 | [diff] [blame] | 220 | |
| 221 | /* Don't turn it on */ |
Scott Jiang | a6be70f | 2014-11-13 15:30:54 +0800 | [diff] [blame] | 222 | writew(speed > 100000 ? FAST : 0, &twi->master_ctl); |
Mike Frysinger | 08a1c62 | 2009-10-14 19:27:27 -0400 | [diff] [blame] | 223 | |
| 224 | return 0; |
| 225 | } |
| 226 | |
Scott Jiang | c469703 | 2014-11-13 15:30:55 +0800 | [diff] [blame] | 227 | static void adi_i2c_init(struct i2c_adapter *adap, int speed, int slaveaddr) |
Mike Frysinger | 08a1c62 | 2009-10-14 19:27:27 -0400 | [diff] [blame] | 228 | { |
Scott Jiang | c469703 | 2014-11-13 15:30:55 +0800 | [diff] [blame] | 229 | struct twi_regs *twi = i2c_get_base(adap); |
| 230 | u16 prescale = ((get_i2c_clk() / 1000 / 1000 + 5) / 10) & 0x7F; |
Mike Frysinger | be853bf | 2008-10-06 04:16:47 -0400 | [diff] [blame] | 231 | |
| 232 | /* Set TWI internal clock as 10MHz */ |
Scott Jiang | a6be70f | 2014-11-13 15:30:54 +0800 | [diff] [blame] | 233 | writew(prescale, &twi->control); |
Mike Frysinger | be853bf | 2008-10-06 04:16:47 -0400 | [diff] [blame] | 234 | |
| 235 | /* Set TWI interface clock as specified */ |
Mike Frysinger | 08a1c62 | 2009-10-14 19:27:27 -0400 | [diff] [blame] | 236 | i2c_set_bus_speed(speed); |
Mike Frysinger | be853bf | 2008-10-06 04:16:47 -0400 | [diff] [blame] | 237 | |
Mike Frysinger | 08a1c62 | 2009-10-14 19:27:27 -0400 | [diff] [blame] | 238 | /* Enable it */ |
Scott Jiang | a6be70f | 2014-11-13 15:30:54 +0800 | [diff] [blame] | 239 | writew(TWI_ENA | prescale, &twi->control); |
Mike Frysinger | be853bf | 2008-10-06 04:16:47 -0400 | [diff] [blame] | 240 | } |
| 241 | |
Scott Jiang | c469703 | 2014-11-13 15:30:55 +0800 | [diff] [blame] | 242 | static int adi_i2c_read(struct i2c_adapter *adap, uint8_t chip, |
| 243 | uint addr, int alen, uint8_t *buffer, int len) |
| 244 | { |
| 245 | return i2c_transfer(adap, chip, addr, alen, buffer, |
| 246 | len, alen ? I2C_M_COMBO : I2C_M_READ); |
| 247 | } |
| 248 | |
| 249 | static int adi_i2c_write(struct i2c_adapter *adap, uint8_t chip, |
| 250 | uint addr, int alen, uint8_t *buffer, int len) |
| 251 | { |
| 252 | return i2c_transfer(adap, chip, addr, alen, buffer, len, 0); |
| 253 | } |
| 254 | |
| 255 | static int adi_i2c_probe(struct i2c_adapter *adap, uint8_t chip) |
Mike Frysinger | be853bf | 2008-10-06 04:16:47 -0400 | [diff] [blame] | 256 | { |
| 257 | u8 byte; |
Scott Jiang | c469703 | 2014-11-13 15:30:55 +0800 | [diff] [blame] | 258 | return adi_i2c_read(adap, chip, 0, 0, &byte, 1); |
Mike Frysinger | be853bf | 2008-10-06 04:16:47 -0400 | [diff] [blame] | 259 | } |
| 260 | |
Scott Jiang | c469703 | 2014-11-13 15:30:55 +0800 | [diff] [blame] | 261 | static struct twi_regs *i2c_get_base(struct i2c_adapter *adap) |
Mike Frysinger | be853bf | 2008-10-06 04:16:47 -0400 | [diff] [blame] | 262 | { |
Scott Jiang | c469703 | 2014-11-13 15:30:55 +0800 | [diff] [blame] | 263 | switch (adap->hwadapnr) { |
| 264 | #if CONFIG_SYS_MAX_I2C_BUS > 2 |
| 265 | case 2: |
| 266 | return (struct twi_regs *)TWI2_CLKDIV; |
Mike Frysinger | b5cebb4 | 2010-05-05 03:20:30 -0400 | [diff] [blame] | 267 | #endif |
| 268 | #if CONFIG_SYS_MAX_I2C_BUS > 1 |
Scott Jiang | a6be70f | 2014-11-13 15:30:54 +0800 | [diff] [blame] | 269 | case 1: |
Scott Jiang | c469703 | 2014-11-13 15:30:55 +0800 | [diff] [blame] | 270 | return (struct twi_regs *)TWI1_CLKDIV; |
Mike Frysinger | b5cebb4 | 2010-05-05 03:20:30 -0400 | [diff] [blame] | 271 | #endif |
Scott Jiang | c469703 | 2014-11-13 15:30:55 +0800 | [diff] [blame] | 272 | case 0: |
| 273 | return (struct twi_regs *)TWI0_CLKDIV; |
| 274 | |
| 275 | default: |
| 276 | printf("wrong hwadapnr: %d\n", adap->hwadapnr); |
Mike Frysinger | b5cebb4 | 2010-05-05 03:20:30 -0400 | [diff] [blame] | 277 | } |
Scott Jiang | c469703 | 2014-11-13 15:30:55 +0800 | [diff] [blame] | 278 | |
| 279 | return NULL; |
Mike Frysinger | b5cebb4 | 2010-05-05 03:20:30 -0400 | [diff] [blame] | 280 | } |
| 281 | |
Scott Jiang | c469703 | 2014-11-13 15:30:55 +0800 | [diff] [blame] | 282 | U_BOOT_I2C_ADAP_COMPLETE(adi_i2c0, adi_i2c_init, adi_i2c_probe, |
| 283 | adi_i2c_read, adi_i2c_write, |
| 284 | adi_i2c_setspeed, |
| 285 | CONFIG_SYS_I2C_SPEED, |
| 286 | 0, |
| 287 | 0) |
| 288 | |
Mike Frysinger | b5cebb4 | 2010-05-05 03:20:30 -0400 | [diff] [blame] | 289 | #if CONFIG_SYS_MAX_I2C_BUS > 1 |
Scott Jiang | c469703 | 2014-11-13 15:30:55 +0800 | [diff] [blame] | 290 | U_BOOT_I2C_ADAP_COMPLETE(adi_i2c1, adi_i2c_init, adi_i2c_probe, |
| 291 | adi_i2c_read, adi_i2c_write, |
| 292 | adi_i2c_setspeed, |
| 293 | CONFIG_SYS_I2C_SPEED, |
| 294 | 0, |
| 295 | 1) |
Mike Frysinger | b5cebb4 | 2010-05-05 03:20:30 -0400 | [diff] [blame] | 296 | #endif |
Scott Jiang | c469703 | 2014-11-13 15:30:55 +0800 | [diff] [blame] | 297 | |
Mike Frysinger | b5cebb4 | 2010-05-05 03:20:30 -0400 | [diff] [blame] | 298 | #if CONFIG_SYS_MAX_I2C_BUS > 2 |
Scott Jiang | c469703 | 2014-11-13 15:30:55 +0800 | [diff] [blame] | 299 | U_BOOT_I2C_ADAP_COMPLETE(adi_i2c2, adi_i2c_init, adi_i2c_probe, |
| 300 | adi_i2c_read, adi_i2c_write, |
| 301 | adi_i2c_setspeed, |
| 302 | CONFIG_SYS_I2C_SPEED, |
| 303 | 0, |
| 304 | 2) |
Mike Frysinger | b5cebb4 | 2010-05-05 03:20:30 -0400 | [diff] [blame] | 305 | #endif |