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wdenk42d1f032003-10-15 23:53:47 +00001/*
2 * linux/arch/ppc/kernel/traps.c
3 *
Andy Fleming61a21e92007-08-14 01:34:21 -05004 * Copyright 2007 Freescale Semiconductor.
wdenk42d1f032003-10-15 23:53:47 +00005 * Copyright (C) 2003 Motorola
6 * Modified by Xianghua Xiao(x.xiao@motorola.com)
7 *
8 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
9 *
10 * Modified by Cort Dougan (cort@cs.nmt.edu)
11 * and Paul Mackerras (paulus@cs.anu.edu.au)
12 *
13 * (C) Copyright 2000
14 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
15 *
16 * See file CREDITS for list of people who contributed to this
17 * project.
18 *
19 * This program is free software; you can redistribute it and/or
20 * modify it under the terms of the GNU General Public License as
21 * published by the Free Software Foundation; either version 2 of
22 * the License, or (at your option) any later version.
23 *
24 * This program is distributed in the hope that it will be useful,
25 * but WITHOUT ANY WARRANTY; without even the implied warranty of
wdenk9aea9532004-08-01 23:02:45 +000026 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
wdenk42d1f032003-10-15 23:53:47 +000027 * GNU General Public License for more details.
28 *
29 * You should have received a copy of the GNU General Public License
30 * along with this program; if not, write to the Free Software
31 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
32 * MA 02111-1307 USA
33 */
34
35/*
36 * This file handles the architecture-dependent parts of hardware exceptions
37 */
38
39#include <common.h>
40#include <command.h>
41#include <asm/processor.h>
42
Wolfgang Denkd87080b2006-03-31 18:32:53 +020043DECLARE_GLOBAL_DATA_PTR;
44
Jon Loeliger44312832007-07-09 19:06:00 -050045#if defined(CONFIG_CMD_KGDB)
wdenk42d1f032003-10-15 23:53:47 +000046int (*debugger_exception_handler)(struct pt_regs *) = 0;
47#endif
48
49/* Returns 0 if exception not found and fixup otherwise. */
50extern unsigned long search_exception_table(unsigned long);
51
wdenk9aea9532004-08-01 23:02:45 +000052/*
53 * End of memory as shown by board info and determined by DDR setup.
wdenk42d1f032003-10-15 23:53:47 +000054 */
wdenk9aea9532004-08-01 23:02:45 +000055#define END_OF_MEM (gd->bd->bi_memstart + gd->bd->bi_memsize)
wdenk42d1f032003-10-15 23:53:47 +000056
57
58static __inline__ void set_tsr(unsigned long val)
59{
60 asm volatile("mtspr 0x150, %0" : : "r" (val));
61}
62
63static __inline__ unsigned long get_esr(void)
64{
65 unsigned long val;
66 asm volatile("mfspr %0, 0x03e" : "=r" (val) :);
67 return val;
68}
69
70#define ESR_MCI 0x80000000
71#define ESR_PIL 0x08000000
72#define ESR_PPR 0x04000000
73#define ESR_PTR 0x02000000
74#define ESR_DST 0x00800000
75#define ESR_DIZ 0x00400000
76#define ESR_U0F 0x00008000
77
Jon Loeliger44312832007-07-09 19:06:00 -050078#if defined(CONFIG_CMD_BEDBUG)
wdenk42d1f032003-10-15 23:53:47 +000079extern void do_bedbug_breakpoint(struct pt_regs *);
80#endif
81
82/*
83 * Trap & Exception support
84 */
85
86void
87print_backtrace(unsigned long *sp)
88{
89 int cnt = 0;
90 unsigned long i;
91
92 printf("Call backtrace: ");
93 while (sp) {
94 if ((uint)sp > END_OF_MEM)
95 break;
96
97 i = sp[1];
98 if (cnt++ % 7 == 0)
99 printf("\n");
100 printf("%08lX ", i);
101 if (cnt > 32) break;
102 sp = (unsigned long *)*sp;
103 }
104 printf("\n");
105}
106
107void show_regs(struct pt_regs * regs)
108{
109 int i;
110
111 printf("NIP: %08lX XER: %08lX LR: %08lX REGS: %p TRAP: %04lx DAR: %08lX\n",
112 regs->nip, regs->xer, regs->link, regs, regs->trap, regs->dar);
113 printf("MSR: %08lx EE: %01x PR: %01x FP: %01x ME: %01x IR/DR: %01x%01x\n",
114 regs->msr, regs->msr&MSR_EE ? 1 : 0, regs->msr&MSR_PR ? 1 : 0,
115 regs->msr & MSR_FP ? 1 : 0,regs->msr&MSR_ME ? 1 : 0,
116 regs->msr&MSR_IR ? 1 : 0,
117 regs->msr&MSR_DR ? 1 : 0);
118
119 printf("\n");
120 for (i = 0; i < 32; i++) {
121 if ((i % 8) == 0)
122 {
123 printf("GPR%02d: ", i);
124 }
125
126 printf("%08lX ", regs->gpr[i]);
127 if ((i % 8) == 7)
128 {
129 printf("\n");
130 }
131 }
132}
133
134
135void
136_exception(int signr, struct pt_regs *regs)
137{
138 show_regs(regs);
139 print_backtrace((unsigned long *)regs->gpr[1]);
140 panic("Exception in kernel pc %lx signal %d",regs->nip,signr);
141}
142
143void
144CritcalInputException(struct pt_regs *regs)
145{
146 panic("Critical Input Exception");
147}
148
Andy Fleming61a21e92007-08-14 01:34:21 -0500149int machinecheck_count = 0;
150int machinecheck_error = 0;
wdenk42d1f032003-10-15 23:53:47 +0000151void
152MachineCheckException(struct pt_regs *regs)
153{
154 unsigned long fixup;
Andy Fleming61a21e92007-08-14 01:34:21 -0500155 unsigned int mcsr, mcsrr0, mcsrr1, mcar;
wdenk42d1f032003-10-15 23:53:47 +0000156
157 /* Probing PCI using config cycles cause this exception
158 * when a device is not present. Catch it and return to
159 * the PCI exception handler.
160 */
161 if ((fixup = search_exception_table(regs->nip)) != 0) {
162 regs->nip = fixup;
163 return;
164 }
165
Andy Fleming61a21e92007-08-14 01:34:21 -0500166 mcsrr0 = mfspr(SPRN_MCSRR0);
167 mcsrr1 = mfspr(SPRN_MCSRR1);
168 mcsr = mfspr(SPRN_MCSR);
169 mcar = mfspr(SPRN_MCAR);
170
171 machinecheck_count++;
172 machinecheck_error=1;
173
Jon Loeliger44312832007-07-09 19:06:00 -0500174#if defined(CONFIG_CMD_KGDB)
wdenk42d1f032003-10-15 23:53:47 +0000175 if (debugger_exception_handler && (*debugger_exception_handler)(regs))
176 return;
177#endif
178
179 printf("Machine check in kernel mode.\n");
Andy Fleming61a21e92007-08-14 01:34:21 -0500180 printf("Caused by (from mcsr): ");
181 printf("mcsr = 0x%08x\n", mcsr);
182 if (mcsr & 0x80000000)
183 printf("Machine check input pin\n");
184 if (mcsr & 0x40000000)
185 printf("Instruction cache parity error\n");
186 if (mcsr & 0x20000000)
187 printf("Data cache push parity error\n");
188 if (mcsr & 0x10000000)
189 printf("Data cache parity error\n");
190 if (mcsr & 0x00000080)
191 printf("Bus instruction address error\n");
192 if (mcsr & 0x00000040)
193 printf("Bus Read address error\n");
194 if (mcsr & 0x00000020)
195 printf("Bus Write address error\n");
196 if (mcsr & 0x00000010)
197 printf("Bus Instruction data bus error\n");
198 if (mcsr & 0x00000008)
199 printf("Bus Read data bus error\n");
200 if (mcsr & 0x00000004)
201 printf("Bus Write bus error\n");
202 if (mcsr & 0x00000002)
203 printf("Bus Instruction parity error\n");
204 if (mcsr & 0x00000001)
205 printf("Bus Read parity error\n");
206
wdenk42d1f032003-10-15 23:53:47 +0000207 show_regs(regs);
Andy Fleming61a21e92007-08-14 01:34:21 -0500208 printf("MCSR=0x%08x \tMCSRR0=0x%08x \nMCSRR1=0x%08x \tMCAR=0x%08x\n",
209 mcsr, mcsrr0, mcsrr1, mcar);
wdenk42d1f032003-10-15 23:53:47 +0000210 print_backtrace((unsigned long *)regs->gpr[1]);
Andy Fleming61a21e92007-08-14 01:34:21 -0500211 if (machinecheck_count > 10) {
212 panic("machine check count too high\n");
213 }
214
215 if (machinecheck_count > 1) {
216 regs->nip += 4; /* skip offending instruction */
217 printf("Skipping current instr, Returning to 0x%08x\n",
218 regs->nip);
219 } else {
220 printf("Returning back to 0x%08x\n",regs->nip);
221 }
wdenk42d1f032003-10-15 23:53:47 +0000222}
223
224void
225AlignmentException(struct pt_regs *regs)
226{
Jon Loeliger44312832007-07-09 19:06:00 -0500227#if defined(CONFIG_CMD_KGDB)
wdenk42d1f032003-10-15 23:53:47 +0000228 if (debugger_exception_handler && (*debugger_exception_handler)(regs))
229 return;
230#endif
231
232 show_regs(regs);
233 print_backtrace((unsigned long *)regs->gpr[1]);
234 panic("Alignment Exception");
235}
236
237void
238ProgramCheckException(struct pt_regs *regs)
239{
240 long esr_val;
241
Jon Loeliger44312832007-07-09 19:06:00 -0500242#if defined(CONFIG_CMD_KGDB)
wdenk42d1f032003-10-15 23:53:47 +0000243 if (debugger_exception_handler && (*debugger_exception_handler)(regs))
244 return;
245#endif
246
247 show_regs(regs);
248
249 esr_val = get_esr();
250 if( esr_val & ESR_PIL )
251 printf( "** Illegal Instruction **\n" );
252 else if( esr_val & ESR_PPR )
253 printf( "** Privileged Instruction **\n" );
254 else if( esr_val & ESR_PTR )
255 printf( "** Trap Instruction **\n" );
256
257 print_backtrace((unsigned long *)regs->gpr[1]);
258 panic("Program Check Exception");
259}
260
261void
262PITException(struct pt_regs *regs)
263{
264 /*
265 * Reset PIT interrupt
266 */
267 set_tsr(0x0c000000);
268
269 /*
270 * Call timer_interrupt routine in interrupts.c
271 */
272 timer_interrupt(NULL);
273}
274
275
276void
277UnknownException(struct pt_regs *regs)
278{
Jon Loeliger44312832007-07-09 19:06:00 -0500279#if defined(CONFIG_CMD_KGDB)
wdenk42d1f032003-10-15 23:53:47 +0000280 if (debugger_exception_handler && (*debugger_exception_handler)(regs))
281 return;
282#endif
283
284 printf("Bad trap at PC: %lx, SR: %lx, vector=%lx\n",
285 regs->nip, regs->msr, regs->trap);
286 _exception(0, regs);
287}
Andy Fleming61a21e92007-08-14 01:34:21 -0500288void
289ExtIntException(struct pt_regs *regs)
290{
291 volatile immap_t *immap = (immap_t *)CFG_IMMR;
292 volatile ccsr_pic_t *pic = &immap->im_pic;
293 uint vect;
294
295#if defined(CONFIG_CMD_KGDB)
296 if (debugger_exception_handler && (*debugger_exception_handler)(regs))
297 return;
298#endif
299
300 printf("External Interrupt Exception at PC: %lx, SR: %lx, vector=%lx",
301 regs->nip, regs->msr, regs->trap);
302 vect = pic->iack0;
303 printf(" irq IACK0@%05x=%d\n",&pic->iack0,vect);
304 show_regs(regs);
305 print_backtrace((unsigned long *)regs->gpr[1]);
306 machinecheck_count++;
307#ifdef EXTINT_NOSKIP
308 printf("Returning back to 0x%08x\n",regs->nip);
309#else
310 regs->nip += 4; /* skip offending instruction */
311 printf("Skipping current instr, Returning to 0x%08x\n",regs->nip);
312#endif
313
314}
wdenk42d1f032003-10-15 23:53:47 +0000315
316void
317DebugException(struct pt_regs *regs)
318{
319 printf("Debugger trap at @ %lx\n", regs->nip );
320 show_regs(regs);
Jon Loeliger44312832007-07-09 19:06:00 -0500321#if defined(CONFIG_CMD_BEDBUG)
wdenk42d1f032003-10-15 23:53:47 +0000322 do_bedbug_breakpoint( regs );
323#endif
324}
325
wdenk9aea9532004-08-01 23:02:45 +0000326/* Probe an address by reading. If not present, return -1, otherwise
wdenk42d1f032003-10-15 23:53:47 +0000327 * return 0.
328 */
329int
330addr_probe(uint *addr)
331{
332 return 0;
333}