Patch by Jon Loeliger, 16 Jul 2004:
- support larger DDR memories up to 2G on the PC8540/8560ADS and
STXGP3 boards
- Made MPC8540/8560ADS be 33Mhz PCI by default.
- Removed moldy CONFIG_RAM_AS_FLASH, CFG_FLASH_PORT_WIDTH_16
and CONFIG_L2_INIT_RAM options.
- Refactor Local Bus initialization out of SDRAM setup.
- Re-implement new version of LBC11/DDR11 errata workarounds.
- Moved board specific PCI init parts out of CPU directory.
- Added TLB entry for PCI-1 IO Memory
- Updated README.mpc85xxads
diff --git a/cpu/mpc85xx/traps.c b/cpu/mpc85xx/traps.c
index a348eab..a87eed2 100644
--- a/cpu/mpc85xx/traps.c
+++ b/cpu/mpc85xx/traps.c
@@ -22,7 +22,7 @@
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
@@ -46,9 +46,10 @@
/* Returns 0 if exception not found and fixup otherwise. */
extern unsigned long search_exception_table(unsigned long);
-/* THIS NEEDS CHANGING to use the board info structure.
+/*
+ * End of memory as shown by board info and determined by DDR setup.
*/
-#define END_OF_MEM (CFG_SDRAM_SIZE * 1024 * 1024)
+#define END_OF_MEM (gd->bd->bi_memstart + gd->bd->bi_memsize)
static __inline__ void set_tsr(unsigned long val)
@@ -82,6 +83,7 @@
void
print_backtrace(unsigned long *sp)
{
+ DECLARE_GLOBAL_DATA_PTR;
int cnt = 0;
unsigned long i;
@@ -261,7 +263,7 @@
#endif
}
-/* Probe an address by reading. If not present, return -1, otherwise
+/* Probe an address by reading. If not present, return -1, otherwise
* return 0.
*/
int