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Heiko Schochere379c032014-07-18 06:07:22 +02001/*
Heiko Schocherb4b39a72015-01-20 10:06:18 +01002 * (C) Copyright 2015
Heiko Schochere379c032014-07-18 06:07:22 +02003 * (C) Copyright 2014
4 * Heiko Schocher, DENX Software Engineering, hs@denx.de.
5 *
6 * Based on:
7 * Copyright (C) 2012 Freescale Semiconductor, Inc.
8 *
9 * Configuration settings for the Freescale i.MX6Q SabreSD board.
10 *
11 * SPDX-License-Identifier: GPL-2.0+
12 */
13#ifndef __ARISTAINETOS_CONFIG_H
14#define __ARISTAINETOS_CONFIG_H
15
16#define CONFIG_MX6
17
18#include "mx6_common.h"
19#include <linux/sizes.h>
20
21#define CONFIG_DISPLAY_CPUINFO
22#define CONFIG_DISPLAY_BOARDINFO
23
24#include <asm/arch/imx-regs.h>
25#include <asm/imx-common/gpio.h>
26
27#define CONFIG_MACH_TYPE 4501
Heiko Schocherb4b39a72015-01-20 10:06:18 +010028#define CONFIG_MMCROOT "/dev/mmcblk0p1"
Heiko Schochere379c032014-07-18 06:07:22 +020029#define CONFIG_HOSTNAME aristainetos
30#define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
31
32#define CONFIG_SYS_GENERIC_BOARD
33
34/* Size of malloc() pool */
35#define CONFIG_SYS_MALLOC_LEN (64 * SZ_1M)
36
37#define CONFIG_BOARD_EARLY_INIT_F
38#define CONFIG_MXC_GPIO
39
40#define CONFIG_MXC_UART
41#define CONFIG_MXC_UART_BASE UART5_BASE
42#define CONFIG_CONSOLE_DEV "ttymxc4"
43
44#define CONFIG_CMD_FUSE
45#define CONFIG_MXC_OCOTP
46
47/* MMC Configs */
48#define CONFIG_FSL_ESDHC
49#define CONFIG_FSL_USDHC
50#define CONFIG_SYS_FSL_ESDHC_ADDR 0
51
52#define CONFIG_MMC
53#define CONFIG_CMD_MMC
54#define CONFIG_GENERIC_MMC
55#define CONFIG_BOUNCE_BUFFER
56#define CONFIG_CMD_EXT2
57#define CONFIG_CMD_FAT
58#define CONFIG_DOS_PARTITION
59
60#define CONFIG_CMD_PING
61#define CONFIG_CMD_DHCP
62#define CONFIG_CMD_MII
63#define CONFIG_CMD_NET
64#define CONFIG_FEC_MXC
65#define CONFIG_MII
66#define IMX_FEC_BASE ENET_BASE_ADDR
67#define CONFIG_FEC_XCV_TYPE RMII
68#define CONFIG_ETHPRIME "FEC"
69#define CONFIG_FEC_MXC_PHYADDR 0
70
71#define CONFIG_PHYLIB
72#define CONFIG_PHY_MICREL
73
74#define CONFIG_CMD_SF
75#define CONFIG_SPI_FLASH
76#define CONFIG_SPI_FLASH_MTD
77#define CONFIG_SPI_FLASH_STMICRO
78#define CONFIG_MXC_SPI
79#define CONFIG_SF_DEFAULT_BUS 3
Heiko Schocher2f6bb0a2014-10-30 13:14:03 +010080#define CONFIG_SF_DEFAULT_CS 0
Heiko Schochere379c032014-07-18 06:07:22 +020081#define CONFIG_SF_DEFAULT_SPEED 20000000
82#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
83#define CONFIG_SYS_SPI_ST_ENABLE_WP_PIN
Heiko Schochere379c032014-07-18 06:07:22 +020084/* allow to overwrite serial and ethaddr */
85#define CONFIG_ENV_OVERWRITE
86#define CONFIG_CONS_INDEX 1
87#define CONFIG_BAUDRATE 115200
88
89/* Command definition */
90#include <config_cmd_default.h>
91
92#define CONFIG_CMD_BMODE
93#define CONFIG_CMD_BOOTZ
94#define CONFIG_CMD_SETEXPR
95#undef CONFIG_CMD_IMLS
96
97#define CONFIG_BOOTDELAY 3
98
99#define CONFIG_LOADADDR 0x12000000
100#define CONFIG_SYS_TEXT_BASE 0x17800000
101
102#define CONFIG_EXTRA_ENV_SETTINGS \
Heiko Schocherb4b39a72015-01-20 10:06:18 +0100103 "script=u-boot.scr\0" \
104 "fit_file=/boot/system.itb\0" \
105 "loadaddr=0x12000000\0" \
106 "fit_addr_r=0x14000000\0" \
107 "uboot=/boot/u-boot.imx\0" \
108 "uboot_sz=d0000\0" \
109 "rescue_sys_addr=f0000\0" \
110 "rescue_sys_length=f10000\0" \
111 "board_type=aristainetos7@1\0" \
112 "panel=lb07wv8\0" \
113 "splashpos=m,m\0" \
Heiko Schochere379c032014-07-18 06:07:22 +0200114 "console=" CONFIG_CONSOLE_DEV "\0" \
115 "fdt_high=0xffffffff\0" \
116 "initrd_high=0xffffffff\0" \
Heiko Schocherb4b39a72015-01-20 10:06:18 +0100117 "mtdids=nand0=gpmi-nand,nor0=spi3.0\0" \
118 "mtdparts=mtdparts=spi3.0:832k(u-boot),64k(env),64k(env-red)," \
119 "-(rescue-system);gpmi-nand:-(ubi)\0" \
120 "addmisc=setenv bootargs ${bootargs} consoleblank=0\0" \
121 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
122 "set_fit_default=fdt addr ${fit_addr_r};fdt set /configurations " \
123 "default ${board_type}\0" \
124 "get_env=mw ${loadaddr} 0 0x20000;" \
125 "mmc rescan;" \
126 "ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} env.txt;" \
127 "env import -t ${loadaddr}\0" \
128 "default_env=mw ${loadaddr} 0 0x20000;" \
129 "env export -t ${loadaddr} serial# ethaddr eth1addr " \
130 "board_type panel;" \
131 "env default -a;" \
132 "env import -t ${loadaddr}\0" \
133 "loadbootscript=" \
134 "ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
135 "bootscript=echo Running bootscript from mmc ...; " \
136 "source\0" \
Heiko Schochere379c032014-07-18 06:07:22 +0200137 "mmcpart=1\0" \
Heiko Schocherb4b39a72015-01-20 10:06:18 +0100138 "mmcdev=0\0" \
Heiko Schochere379c032014-07-18 06:07:22 +0200139 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
140 "mmcargs=setenv bootargs console=${console},${baudrate} " \
141 "root=${mmcroot}\0" \
Heiko Schochere379c032014-07-18 06:07:22 +0200142 "mmcboot=echo Booting from mmc ...; " \
Heiko Schocherb4b39a72015-01-20 10:06:18 +0100143 "run mmcargs addmtd addmisc set_fit_default;" \
144 "bootm ${fit_addr_r}\0" \
145 "mmc_load_fit=ext2load mmc ${mmcdev}:${mmcpart} ${fit_addr_r} " \
146 "${fit_file}\0" \
147 "mmc_load_uboot=ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} " \
148 "${uboot}\0" \
149 "mmc_upd_uboot=mw.b ${loadaddr} 0xff ${uboot_sz};" \
150 "setexpr cmp_buf ${loadaddr} + ${uboot_sz};" \
151 "setexpr uboot_maxsize ${uboot_sz} - 400;" \
152 "mw.b ${cmp_buf} 0x00 ${uboot_sz};" \
153 "run mmc_load_uboot;sf probe;sf erase 0 ${uboot_sz};" \
Heiko Schochere379c032014-07-18 06:07:22 +0200154 "sf write ${loadaddr} 400 ${filesize};" \
Heiko Schocherb4b39a72015-01-20 10:06:18 +0100155 "sf read ${cmp_buf} 400 ${uboot_sz};" \
156 "cmp.b ${loadaddr} ${cmp_buf} ${uboot_maxsize}\0" \
157 "ubiargs=setenv bootargs console=${console},${baudrate} " \
158 "ubi.mtd=0,2048 root=ubi0:rootfs rootfstype=ubifs\0 " \
159 "ubiboot=echo Booting from ubi ...; " \
160 "run ubiargs addmtd addmisc set_fit_default;" \
161 "bootm ${fit_addr_r}\0" \
162 "ubifs_load_fit=sf probe;ubi part ubi 2048;ubifsmount ubi:rootfs;" \
163 "ubifsload ${fit_addr_r} /boot/system.itb; " \
164 "imi ${fit_addr_r}\0 " \
165 "rescueargs=setenv bootargs console=${console},${baudrate} " \
166 "root=/dev/ram rw\0 " \
167 "rescueboot=echo Booting rescue system from NOR ...; " \
168 "run rescueargs addmtd addmisc set_fit_default;" \
169 "bootm ${fit_addr_r}\0" \
170 "rescue_load_fit=sf probe;sf read ${fit_addr_r} ${rescue_sys_addr} " \
171 "${rescue_sys_length}; imi ${fit_addr_r}\0 "
Heiko Schochere379c032014-07-18 06:07:22 +0200172
173#define CONFIG_BOOTCOMMAND \
174 "mmc dev ${mmcdev};" \
175 "if mmc rescan; then " \
Heiko Schocherb4b39a72015-01-20 10:06:18 +0100176 "if run loadbootscript; then " \
177 "run bootscript; " \
178 "else " \
179 "if run mmc_load_fit; then " \
180 "run mmcboot; " \
181 "else " \
182 "if run ubifs_load_fit; then " \
183 "run ubiboot; " \
184 "else " \
185 "if run rescue_load_fit; then " \
186 "run rescueboot; " \
187 "else " \
188 "echo RESCUE SYSTEM BOOT " \
189 "FAILURE;" \
190 "fi; " \
191 "fi; " \
192 "fi; " \
193 "fi; " \
194 "else " \
195 "if run ubifs_load_fit; then " \
196 "run ubiboot; " \
197 "else " \
198 "if run rescue_load_fit; then " \
199 "run rescueboot; " \
200 "else " \
201 "echo RESCUE SYSTEM BOOT FAILURE;" \
202 "fi; " \
203 "fi; " \
204 "fi"
Heiko Schochere379c032014-07-18 06:07:22 +0200205
206#define CONFIG_ARP_TIMEOUT 200UL
207
208/* Miscellaneous configurable options */
209#define CONFIG_SYS_LONGHELP
210#define CONFIG_SYS_HUSH_PARSER
211#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
212#define CONFIG_AUTO_COMPLETE
213#define CONFIG_SYS_CBSIZE 256
214
215/* Print Buffer Size */
216#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
217#define CONFIG_SYS_MAXARGS 16
218#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
219
220#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
221#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x100000)
222#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
223
224#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
225
226#define CONFIG_CMDLINE_EDITING
227#define CONFIG_STACKSIZE (128 * 1024)
228
229/* Physical Memory Map */
230#define CONFIG_NR_DRAM_BANKS 1
231#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
232
233#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
234#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
235#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
236
237#define CONFIG_SYS_INIT_SP_OFFSET \
238 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
239#define CONFIG_SYS_INIT_SP_ADDR \
240 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
241
242/* FLASH and environment organization */
243#define CONFIG_SYS_NO_FLASH
244
245#define CONFIG_ENV_SIZE (12 * 1024)
246#define CONFIG_ENV_IS_IN_SPI_FLASH
247#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
248#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
249#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
250#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
251#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
252#define CONFIG_ENV_SECT_SIZE (0x010000)
Heiko Schocherb4b39a72015-01-20 10:06:18 +0100253#define CONFIG_ENV_OFFSET (0x0d0000)
254#define CONFIG_ENV_OFFSET_REDUND (0x0e0000)
Heiko Schochere379c032014-07-18 06:07:22 +0200255
256#define CONFIG_OF_LIBFDT
257
258#define CONFIG_CMD_CACHE
259
260#define CONFIG_SYS_FSL_USDHC_NUM 2
261
262#define CONFIG_CMD_I2C
263#define CONFIG_SYS_I2C
264#define CONFIG_SYS_I2C_MXC
265#define CONFIG_SYS_I2C_SPEED 100000
266#define CONFIG_SYS_I2C_SLAVE 0x7f
267#define CONFIG_SYS_I2C_NOPROBES { {0, 0x00} }
268
269#define CONFIG_CMD_GPIO
270#define CONFIG_GPIO_ENABLE_SPI_FLASH IMX_GPIO_NR(2, 15)
271
272/* NAND stuff */
273#define CONFIG_CMD_NAND
274#define CONFIG_CMD_NAND_TRIMFFS
275#define CONFIG_NAND_MXS
276#define CONFIG_SYS_MAX_NAND_DEVICE 1
277#define CONFIG_SYS_NAND_BASE 0x40000000
278#define CONFIG_SYS_NAND_5_ADDR_CYCLE
279#define CONFIG_SYS_NAND_ONFI_DETECTION
280
281/* DMA stuff, needed for GPMI/MXS NAND support */
282#define CONFIG_APBH_DMA
283#define CONFIG_APBH_DMA_BURST
284#define CONFIG_APBH_DMA_BURST8
285
286/* RTC */
287#define CONFIG_SYS_I2C_RTC_ADDR 0x68
288#define CONFIG_SYS_RTC_BUS_NUM 2
289#define CONFIG_RTC_M41T11
290#define CONFIG_CMD_DATE
291
292/* USB Configs */
293#define CONFIG_CMD_USB
294#define CONFIG_CMD_FAT
295#define CONFIG_USB_EHCI
296#define CONFIG_USB_EHCI_MX6
297#define CONFIG_USB_STORAGE
298#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
299#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */
300#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
301#define CONFIG_MXC_USB_FLAGS 0
302
303#define ARISTAINETOS_USB_OTG_PWR IMX_GPIO_NR(4, 15)
304#define ARISTAINETOS_USB_H1_PWR IMX_GPIO_NR(3, 31)
305
306/* UBI support */
307#define CONFIG_CMD_MTDPARTS
308#define CONFIG_MTD_PARTITIONS
309#define CONFIG_MTD_DEVICE
310#define CONFIG_RBTREE
311#define CONFIG_LZO
312#define CONFIG_CMD_UBI
313#define CONFIG_CMD_UBIFS
314
Heiko Schochere379c032014-07-18 06:07:22 +0200315#define CONFIG_MTD_UBI_FASTMAP
316#define CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT 1
317
318#define CONFIG_HW_WATCHDOG
319#define CONFIG_IMX_WATCHDOG
320
321#define CONFIG_FIT
322
323/* Framebuffer */
324#define CONFIG_VIDEO
325#define CONFIG_VIDEO_IPUV3
326/* check this console not needed, after test remove it */
327#define CONFIG_CFB_CONSOLE
328#define CONFIG_VGA_AS_SINGLE_DEVICE
329#define CONFIG_SYS_CONSOLE_IS_IN_ENV
330#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
331#define CONFIG_VIDEO_BMP_RLE8
332#define CONFIG_SPLASH_SCREEN
333#define CONFIG_SPLASH_SCREEN_ALIGN
334#define CONFIG_BMP_16BPP
335#define CONFIG_VIDEO_LOGO
336#define CONFIG_VIDEO_BMP_LOGO
337#define CONFIG_IPUV3_CLK 198000000
338#define CONFIG_IMX_VIDEO_SKIP
339
340#define CONFIG_CMD_BMP
341
342#define CONFIG_PWM_IMX
343#define CONFIG_IMX6_PWM_PER_CLK 66000000
Heiko Schochere379c032014-07-18 06:07:22 +0200344#endif /* __ARISTAINETOS_CONFIG_H */