Tom Rini | 83d290c | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Timur Tabi | 2ad6b51 | 2006-10-31 18:44:42 -0600 | [diff] [blame] | 2 | /* |
Kumar Gala | 4c2e3da | 2009-07-28 21:49:52 -0500 | [diff] [blame] | 3 | * Copyright (C) Freescale Semiconductor, Inc. 2006. |
Timur Tabi | 2ad6b51 | 2006-10-31 18:44:42 -0600 | [diff] [blame] | 4 | */ |
| 5 | |
| 6 | /* |
Timur Tabi | 7a78f14 | 2007-01-31 15:54:29 -0600 | [diff] [blame] | 7 | MPC8349E-mITX and MPC8349E-mITX-GP board configuration file |
Timur Tabi | 2ad6b51 | 2006-10-31 18:44:42 -0600 | [diff] [blame] | 8 | |
| 9 | Memory map: |
| 10 | |
| 11 | 0x0000_0000-0x0FFF_FFFF DDR SDRAM (256 MB) |
| 12 | 0x8000_0000-0x9FFF_FFFF PCI1 memory space (512 MB) |
| 13 | 0xA000_0000-0xBFFF_FFFF PCI2 memory space (512 MB) |
| 14 | 0xE000_0000-0xEFFF_FFFF IMMR (1 MB) |
| 15 | 0xE200_0000-0xE2FF_FFFF PCI1 I/O space (16 MB) |
| 16 | 0xE300_0000-0xE3FF_FFFF PCI2 I/O space (16 MB) |
Timur Tabi | 7a78f14 | 2007-01-31 15:54:29 -0600 | [diff] [blame] | 17 | 0xF000_0000-0xF000_FFFF Compact Flash (MPC8349E-mITX only) |
Timur Tabi | 2ad6b51 | 2006-10-31 18:44:42 -0600 | [diff] [blame] | 18 | 0xF001_0000-0xF001_FFFF Local bus expansion slot |
Timur Tabi | 7a78f14 | 2007-01-31 15:54:29 -0600 | [diff] [blame] | 19 | 0xF800_0000-0xF801_FFFF Vitesse 7385 Parallel Interface (MPC8349E-mITX only) |
| 20 | 0xFE00_0000-0xFE7F_FFFF First 8MB bank of Flash memory |
| 21 | 0xFE80_0000-0xFEFF_FFFF Second 8MB bank of Flash memory (MPC8349E-mITX only) |
Timur Tabi | 2ad6b51 | 2006-10-31 18:44:42 -0600 | [diff] [blame] | 22 | |
| 23 | I2C address list: |
Wolfgang Denk | dd520bf | 2006-11-30 18:02:20 +0100 | [diff] [blame] | 24 | Align. Board |
| 25 | Bus Addr Part No. Description Length Location |
Timur Tabi | 2ad6b51 | 2006-10-31 18:44:42 -0600 | [diff] [blame] | 26 | ---------------------------------------------------------------- |
Wolfgang Denk | dd520bf | 2006-11-30 18:02:20 +0100 | [diff] [blame] | 27 | I2C0 0x50 M24256-BWMN6P Board EEPROM 2 U64 |
Timur Tabi | 2ad6b51 | 2006-10-31 18:44:42 -0600 | [diff] [blame] | 28 | |
Wolfgang Denk | dd520bf | 2006-11-30 18:02:20 +0100 | [diff] [blame] | 29 | I2C1 0x20 PCF8574 I2C Expander 0 U8 |
| 30 | I2C1 0x21 PCF8574 I2C Expander 0 U10 |
| 31 | I2C1 0x38 PCF8574A I2C Expander 0 U8 |
| 32 | I2C1 0x39 PCF8574A I2C Expander 0 U10 |
| 33 | I2C1 0x51 (DDR) DDR EEPROM 1 U1 |
| 34 | I2C1 0x68 DS1339 RTC 1 U68 |
Timur Tabi | 2ad6b51 | 2006-10-31 18:44:42 -0600 | [diff] [blame] | 35 | |
| 36 | Note that a given board has *either* a pair of 8574s or a pair of 8574As. |
| 37 | */ |
| 38 | |
| 39 | #ifndef __CONFIG_H |
| 40 | #define __CONFIG_H |
| 41 | |
Timur Tabi | 2ad6b51 | 2006-10-31 18:44:42 -0600 | [diff] [blame] | 42 | /* |
| 43 | * High Level Configuration Options |
| 44 | */ |
Joe Hershberger | 396abba | 2011-10-11 23:57:15 -0500 | [diff] [blame] | 45 | #define CONFIG_SYS_IMMR 0xE0000000 /* The IMMR is relocated to here */ |
Timur Tabi | 2ad6b51 | 2006-10-31 18:44:42 -0600 | [diff] [blame] | 46 | |
Timur Tabi | 89c7784 | 2008-02-08 13:15:55 -0600 | [diff] [blame] | 47 | #define CONFIG_MISC_INIT_F |
Timur Tabi | 7a78f14 | 2007-01-31 15:54:29 -0600 | [diff] [blame] | 48 | |
Timur Tabi | 89c7784 | 2008-02-08 13:15:55 -0600 | [diff] [blame] | 49 | /* |
| 50 | * On-board devices |
| 51 | */ |
Timur Tabi | 7a78f14 | 2007-01-31 15:54:29 -0600 | [diff] [blame] | 52 | |
Mario Six | 4cb06d3 | 2019-01-21 09:17:44 +0100 | [diff] [blame] | 53 | #ifdef CONFIG_TARGET_MPC8349ITX |
Joe Hershberger | 396abba | 2011-10-11 23:57:15 -0500 | [diff] [blame] | 54 | /* The CF card interface on the back of the board */ |
| 55 | #define CONFIG_COMPACT_FLASH |
Timur Tabi | 89c7784 | 2008-02-08 13:15:55 -0600 | [diff] [blame] | 56 | #define CONFIG_VSC7385_ENET /* VSC7385 ethernet support */ |
Valeriy Glushkov | c31e132 | 2009-06-30 15:48:41 +0300 | [diff] [blame] | 57 | #define CONFIG_SYS_USB_HOST /* use the EHCI USB controller */ |
Timur Tabi | 7a78f14 | 2007-01-31 15:54:29 -0600 | [diff] [blame] | 58 | #endif |
| 59 | |
Timur Tabi | 2ad6b51 | 2006-10-31 18:44:42 -0600 | [diff] [blame] | 60 | #define CONFIG_RTC_DS1337 |
Heiko Schocher | 00f792e | 2012-10-24 13:48:22 +0200 | [diff] [blame] | 61 | #define CONFIG_SYS_I2C |
Timur Tabi | 7a78f14 | 2007-01-31 15:54:29 -0600 | [diff] [blame] | 62 | |
| 63 | /* |
| 64 | * Device configurations |
| 65 | */ |
Timur Tabi | 2ad6b51 | 2006-10-31 18:44:42 -0600 | [diff] [blame] | 66 | |
| 67 | /* I2C */ |
Heiko Schocher | 00f792e | 2012-10-24 13:48:22 +0200 | [diff] [blame] | 68 | #ifdef CONFIG_SYS_I2C |
| 69 | #define CONFIG_SYS_I2C_FSL |
| 70 | #define CONFIG_SYS_FSL_I2C_SPEED 400000 |
| 71 | #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F |
| 72 | #define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 |
| 73 | #define CONFIG_SYS_FSL_I2C2_SPEED 400000 |
| 74 | #define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F |
| 75 | #define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100 |
Timur Tabi | 2ad6b51 | 2006-10-31 18:44:42 -0600 | [diff] [blame] | 76 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 77 | #define CONFIG_SYS_SPD_BUS_NUM 1 /* The I2C bus for SPD */ |
Valeriy Glushkov | b7be63a | 2009-02-04 18:27:49 +0200 | [diff] [blame] | 78 | #define CONFIG_SYS_RTC_BUS_NUM 1 /* The I2C bus for RTC */ |
Timur Tabi | 2ad6b51 | 2006-10-31 18:44:42 -0600 | [diff] [blame] | 79 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 80 | #define CONFIG_SYS_I2C_8574_ADDR1 0x20 /* I2C1, PCF8574 */ |
| 81 | #define CONFIG_SYS_I2C_8574_ADDR2 0x21 /* I2C1, PCF8574 */ |
| 82 | #define CONFIG_SYS_I2C_8574A_ADDR1 0x38 /* I2C1, PCF8574A */ |
| 83 | #define CONFIG_SYS_I2C_8574A_ADDR2 0x39 /* I2C1, PCF8574A */ |
| 84 | #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* I2C0, Board EEPROM */ |
Joe Hershberger | 396abba | 2011-10-11 23:57:15 -0500 | [diff] [blame] | 85 | #define CONFIG_SYS_I2C_RTC_ADDR 0x68 /* I2C1, DS1339 RTC*/ |
| 86 | #define SPD_EEPROM_ADDRESS 0x51 /* I2C1, DDR */ |
Timur Tabi | 2ad6b51 | 2006-10-31 18:44:42 -0600 | [diff] [blame] | 87 | |
Timur Tabi | 2ad6b51 | 2006-10-31 18:44:42 -0600 | [diff] [blame] | 88 | /* Don't probe these addresses: */ |
Joe Hershberger | 396abba | 2011-10-11 23:57:15 -0500 | [diff] [blame] | 89 | #define CONFIG_SYS_I2C_NOPROBES { {1, CONFIG_SYS_I2C_8574_ADDR1}, \ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 90 | {1, CONFIG_SYS_I2C_8574_ADDR2}, \ |
| 91 | {1, CONFIG_SYS_I2C_8574A_ADDR1}, \ |
Joe Hershberger | 396abba | 2011-10-11 23:57:15 -0500 | [diff] [blame] | 92 | {1, CONFIG_SYS_I2C_8574A_ADDR2} } |
Timur Tabi | 2ad6b51 | 2006-10-31 18:44:42 -0600 | [diff] [blame] | 93 | /* Bit definitions for the 8574[A] I2C expander */ |
Joe Hershberger | 396abba | 2011-10-11 23:57:15 -0500 | [diff] [blame] | 94 | /* Board revision, 00=0.0, 01=0.1, 10=1.0 */ |
| 95 | #define I2C_8574_REVISION 0x03 |
Timur Tabi | 2ad6b51 | 2006-10-31 18:44:42 -0600 | [diff] [blame] | 96 | #define I2C_8574_CF 0x08 /* 1=Compact flash absent, 0=present */ |
| 97 | #define I2C_8574_MPCICLKRN 0x10 /* MiniPCI Clk Run */ |
| 98 | #define I2C_8574_PCI66 0x20 /* 0=33MHz PCI, 1=66MHz PCI */ |
| 99 | #define I2C_8574_FLASHSIDE 0x40 /* 0=Reset vector from U4, 1=from U7*/ |
| 100 | |
Timur Tabi | 2ad6b51 | 2006-10-31 18:44:42 -0600 | [diff] [blame] | 101 | #endif |
| 102 | |
Timur Tabi | 7a78f14 | 2007-01-31 15:54:29 -0600 | [diff] [blame] | 103 | /* Compact Flash */ |
Timur Tabi | 2ad6b51 | 2006-10-31 18:44:42 -0600 | [diff] [blame] | 104 | #ifdef CONFIG_COMPACT_FLASH |
| 105 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 106 | #define CONFIG_SYS_IDE_MAXBUS 1 |
| 107 | #define CONFIG_SYS_IDE_MAXDEVICE 1 |
Timur Tabi | 2ad6b51 | 2006-10-31 18:44:42 -0600 | [diff] [blame] | 108 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 109 | #define CONFIG_SYS_ATA_IDE0_OFFSET 0x0000 |
| 110 | #define CONFIG_SYS_ATA_BASE_ADDR CONFIG_SYS_CF_BASE |
| 111 | #define CONFIG_SYS_ATA_DATA_OFFSET 0x0000 |
| 112 | #define CONFIG_SYS_ATA_REG_OFFSET 0 |
| 113 | #define CONFIG_SYS_ATA_ALT_OFFSET 0x0200 |
| 114 | #define CONFIG_SYS_ATA_STRIDE 2 |
Timur Tabi | 2ad6b51 | 2006-10-31 18:44:42 -0600 | [diff] [blame] | 115 | |
Joe Hershberger | 396abba | 2011-10-11 23:57:15 -0500 | [diff] [blame] | 116 | /* If a CF card is not inserted, time out quickly */ |
| 117 | #define ATA_RESET_TIME 1 |
Timur Tabi | 2ad6b51 | 2006-10-31 18:44:42 -0600 | [diff] [blame] | 118 | |
Valeriy Glushkov | c9e34fe | 2009-02-05 14:35:21 +0200 | [diff] [blame] | 119 | #endif |
| 120 | |
| 121 | /* |
| 122 | * SATA |
| 123 | */ |
| 124 | #ifdef CONFIG_SATA_SIL3114 |
| 125 | |
| 126 | #define CONFIG_SYS_SATA_MAX_DEVICE 4 |
Valeriy Glushkov | c9e34fe | 2009-02-05 14:35:21 +0200 | [diff] [blame] | 127 | #define CONFIG_LBA48 |
Timur Tabi | 2ad6b51 | 2006-10-31 18:44:42 -0600 | [diff] [blame] | 128 | |
Timur Tabi | 7a78f14 | 2007-01-31 15:54:29 -0600 | [diff] [blame] | 129 | #endif |
Timur Tabi | 2ad6b51 | 2006-10-31 18:44:42 -0600 | [diff] [blame] | 130 | |
Valeriy Glushkov | c31e132 | 2009-06-30 15:48:41 +0300 | [diff] [blame] | 131 | #ifdef CONFIG_SYS_USB_HOST |
| 132 | /* |
| 133 | * Support USB |
| 134 | */ |
Valeriy Glushkov | c31e132 | 2009-06-30 15:48:41 +0300 | [diff] [blame] | 135 | #define CONFIG_USB_EHCI_FSL |
| 136 | |
| 137 | /* Current USB implementation supports the only USB controller, |
| 138 | * so we have to choose between the MPH or the DR ones */ |
| 139 | #if 1 |
| 140 | #define CONFIG_HAS_FSL_MPH_USB |
| 141 | #else |
| 142 | #define CONFIG_HAS_FSL_DR_USB |
| 143 | #endif |
| 144 | |
| 145 | #endif |
| 146 | |
Timur Tabi | 7a78f14 | 2007-01-31 15:54:29 -0600 | [diff] [blame] | 147 | /* |
| 148 | * DDR Setup |
| 149 | */ |
Joe Hershberger | 396abba | 2011-10-11 23:57:15 -0500 | [diff] [blame] | 150 | #define CONFIG_SYS_DDR_BASE 0x00000000 /* DDR is system memory*/ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 151 | #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_BASE |
| 152 | #define CONFIG_SYS_DDR_SDRAM_BASE CONFIG_SYS_DDR_BASE |
| 153 | #define CONFIG_SYS_83XX_DDR_USES_CS0 |
Joe Hershberger | 396abba | 2011-10-11 23:57:15 -0500 | [diff] [blame] | 154 | #define CONFIG_SYS_MEMTEST_START 0x1000 /* memtest region */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 155 | #define CONFIG_SYS_MEMTEST_END 0x2000 |
Timur Tabi | 7a78f14 | 2007-01-31 15:54:29 -0600 | [diff] [blame] | 156 | |
Joe Hershberger | 396abba | 2011-10-11 23:57:15 -0500 | [diff] [blame] | 157 | #define CONFIG_SYS_DDR_SDRAM_CLK_CNTL (DDR_SDRAM_CLK_CNTL_SS_EN \ |
| 158 | | DDR_SDRAM_CLK_CNTL_CLK_ADJUST_075) |
Timur Tabi | f64702b | 2007-04-30 13:59:50 -0500 | [diff] [blame] | 159 | |
Valeriy Glushkov | b7be63a | 2009-02-04 18:27:49 +0200 | [diff] [blame] | 160 | #define CONFIG_VERY_BIG_RAM |
| 161 | #define CONFIG_MAX_MEM_MAPPED ((phys_size_t)256 << 20) |
| 162 | |
Heiko Schocher | 00f792e | 2012-10-24 13:48:22 +0200 | [diff] [blame] | 163 | #ifdef CONFIG_SYS_I2C |
Timur Tabi | 7a78f14 | 2007-01-31 15:54:29 -0600 | [diff] [blame] | 164 | #define CONFIG_SPD_EEPROM /* use SPD EEPROM for DDR setup*/ |
| 165 | #endif |
| 166 | |
Joe Hershberger | 396abba | 2011-10-11 23:57:15 -0500 | [diff] [blame] | 167 | /* No SPD? Then manually set up DDR parameters */ |
| 168 | #ifndef CONFIG_SPD_EEPROM |
| 169 | #define CONFIG_SYS_DDR_SIZE 256 /* Mb */ |
Joe Hershberger | 2e651b2 | 2011-10-11 23:57:31 -0500 | [diff] [blame] | 170 | #define CONFIG_SYS_DDR_CS0_CONFIG (CSCONFIG_EN \ |
Joe Hershberger | 396abba | 2011-10-11 23:57:15 -0500 | [diff] [blame] | 171 | | CSCONFIG_ROW_BIT_13 \ |
| 172 | | CSCONFIG_COL_BIT_10) |
Timur Tabi | 7a78f14 | 2007-01-31 15:54:29 -0600 | [diff] [blame] | 173 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 174 | #define CONFIG_SYS_DDR_TIMING_1 0x26242321 |
| 175 | #define CONFIG_SYS_DDR_TIMING_2 0x00000800 /* P9-45, may need tuning */ |
Timur Tabi | 7a78f14 | 2007-01-31 15:54:29 -0600 | [diff] [blame] | 176 | #endif |
| 177 | |
| 178 | /* |
| 179 | *Flash on the Local Bus |
| 180 | */ |
| 181 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 182 | #define CONFIG_SYS_FLASH_BASE 0xFE000000 /* start of FLASH */ |
| 183 | #define CONFIG_SYS_FLASH_EMPTY_INFO |
Joe Hershberger | 396abba | 2011-10-11 23:57:15 -0500 | [diff] [blame] | 184 | /* 127 64KB sectors + 8 8KB sectors per device */ |
| 185 | #define CONFIG_SYS_MAX_FLASH_SECT 135 |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 186 | #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ |
| 187 | #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ |
| 188 | #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT |
Timur Tabi | 7a78f14 | 2007-01-31 15:54:29 -0600 | [diff] [blame] | 189 | |
| 190 | /* The ITX has two flash chips, but the ITX-GP has only one. To support both |
| 191 | boards, we say we have two, but don't display a message if we find only one. */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 192 | #define CONFIG_SYS_FLASH_QUIET_TEST |
Joe Hershberger | 396abba | 2011-10-11 23:57:15 -0500 | [diff] [blame] | 193 | #define CONFIG_SYS_MAX_FLASH_BANKS 2 /* number of banks */ |
| 194 | #define CONFIG_SYS_FLASH_BANKS_LIST \ |
| 195 | {CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH_BASE + 0x800000} |
| 196 | #define CONFIG_SYS_FLASH_SIZE 16 /* FLASH size in MB */ |
Timur Tabi | 7a78f14 | 2007-01-31 15:54:29 -0600 | [diff] [blame] | 197 | |
Timur Tabi | 89c7784 | 2008-02-08 13:15:55 -0600 | [diff] [blame] | 198 | /* Vitesse 7385 */ |
| 199 | |
| 200 | #ifdef CONFIG_VSC7385_ENET |
| 201 | |
| 202 | #define CONFIG_TSEC2 |
| 203 | |
| 204 | /* The flash address and size of the VSC7385 firmware image */ |
| 205 | #define CONFIG_VSC7385_IMAGE 0xFEFFE000 |
| 206 | #define CONFIG_VSC7385_IMAGE_SIZE 8192 |
| 207 | |
| 208 | #endif |
| 209 | |
Timur Tabi | 7a78f14 | 2007-01-31 15:54:29 -0600 | [diff] [blame] | 210 | /* |
| 211 | * BRx, ORx, LBLAWBARx, and LBLAWARx |
| 212 | */ |
| 213 | |
| 214 | /* Flash */ |
| 215 | |
Joe Hershberger | 7d6a098 | 2011-10-11 23:57:30 -0500 | [diff] [blame] | 216 | #define CONFIG_SYS_BR0_PRELIM (CONFIG_SYS_FLASH_BASE \ |
| 217 | | BR_PS_16 \ |
| 218 | | BR_MS_GPCM \ |
| 219 | | BR_V) |
Mario Six | 5d2f4c9 | 2019-01-21 09:17:59 +0100 | [diff] [blame^] | 220 | #define CONFIG_SYS_OR0_PRELIM (OR_AM_16MB \ |
Joe Hershberger | 396abba | 2011-10-11 23:57:15 -0500 | [diff] [blame] | 221 | | OR_UPM_XAM \ |
| 222 | | OR_GPCM_CSNT \ |
| 223 | | OR_GPCM_ACS_DIV2 \ |
| 224 | | OR_GPCM_XACS \ |
| 225 | | OR_GPCM_SCY_15 \ |
Joe Hershberger | 7d6a098 | 2011-10-11 23:57:30 -0500 | [diff] [blame] | 226 | | OR_GPCM_TRLX_SET \ |
| 227 | | OR_GPCM_EHTR_SET \ |
Joe Hershberger | 396abba | 2011-10-11 23:57:15 -0500 | [diff] [blame] | 228 | | OR_GPCM_EAD) |
Timur Tabi | 7a78f14 | 2007-01-31 15:54:29 -0600 | [diff] [blame] | 229 | /* Vitesse 7385 */ |
| 230 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 231 | #define CONFIG_SYS_VSC7385_BASE 0xF8000000 |
Timur Tabi | 7a78f14 | 2007-01-31 15:54:29 -0600 | [diff] [blame] | 232 | |
Timur Tabi | 89c7784 | 2008-02-08 13:15:55 -0600 | [diff] [blame] | 233 | #ifdef CONFIG_VSC7385_ENET |
| 234 | |
Joe Hershberger | 7d6a098 | 2011-10-11 23:57:30 -0500 | [diff] [blame] | 235 | #define CONFIG_SYS_BR1_PRELIM (CONFIG_SYS_VSC7385_BASE \ |
| 236 | | BR_PS_8 \ |
| 237 | | BR_MS_GPCM \ |
| 238 | | BR_V) |
Joe Hershberger | 396abba | 2011-10-11 23:57:15 -0500 | [diff] [blame] | 239 | #define CONFIG_SYS_OR1_PRELIM (OR_AM_128KB \ |
| 240 | | OR_GPCM_CSNT \ |
| 241 | | OR_GPCM_XACS \ |
| 242 | | OR_GPCM_SCY_15 \ |
| 243 | | OR_GPCM_SETA \ |
Joe Hershberger | 7d6a098 | 2011-10-11 23:57:30 -0500 | [diff] [blame] | 244 | | OR_GPCM_TRLX_SET \ |
| 245 | | OR_GPCM_EHTR_SET \ |
Joe Hershberger | 396abba | 2011-10-11 23:57:15 -0500 | [diff] [blame] | 246 | | OR_GPCM_EAD) |
Timur Tabi | 7a78f14 | 2007-01-31 15:54:29 -0600 | [diff] [blame] | 247 | #endif |
| 248 | |
| 249 | /* LED */ |
| 250 | |
Joe Hershberger | 396abba | 2011-10-11 23:57:15 -0500 | [diff] [blame] | 251 | #define CONFIG_SYS_LED_BASE 0xF9000000 |
Joe Hershberger | 7d6a098 | 2011-10-11 23:57:30 -0500 | [diff] [blame] | 252 | #define CONFIG_SYS_BR2_PRELIM (CONFIG_SYS_LED_BASE \ |
| 253 | | BR_PS_8 \ |
| 254 | | BR_MS_GPCM \ |
| 255 | | BR_V) |
Joe Hershberger | 396abba | 2011-10-11 23:57:15 -0500 | [diff] [blame] | 256 | #define CONFIG_SYS_OR2_PRELIM (OR_AM_2MB \ |
| 257 | | OR_GPCM_CSNT \ |
| 258 | | OR_GPCM_ACS_DIV2 \ |
| 259 | | OR_GPCM_XACS \ |
| 260 | | OR_GPCM_SCY_9 \ |
Joe Hershberger | 7d6a098 | 2011-10-11 23:57:30 -0500 | [diff] [blame] | 261 | | OR_GPCM_TRLX_SET \ |
| 262 | | OR_GPCM_EHTR_SET \ |
Joe Hershberger | 396abba | 2011-10-11 23:57:15 -0500 | [diff] [blame] | 263 | | OR_GPCM_EAD) |
Timur Tabi | 7a78f14 | 2007-01-31 15:54:29 -0600 | [diff] [blame] | 264 | |
| 265 | /* Compact Flash */ |
| 266 | |
| 267 | #ifdef CONFIG_COMPACT_FLASH |
| 268 | |
Joe Hershberger | 396abba | 2011-10-11 23:57:15 -0500 | [diff] [blame] | 269 | #define CONFIG_SYS_CF_BASE 0xF0000000 |
Timur Tabi | 7a78f14 | 2007-01-31 15:54:29 -0600 | [diff] [blame] | 270 | |
Joe Hershberger | 396abba | 2011-10-11 23:57:15 -0500 | [diff] [blame] | 271 | #define CONFIG_SYS_BR3_PRELIM (CONFIG_SYS_CF_BASE \ |
| 272 | | BR_PS_16 \ |
| 273 | | BR_MS_UPMA \ |
| 274 | | BR_V) |
| 275 | #define CONFIG_SYS_OR3_PRELIM (OR_UPM_AM | OR_UPM_BI) |
Timur Tabi | 7a78f14 | 2007-01-31 15:54:29 -0600 | [diff] [blame] | 276 | |
Timur Tabi | 7a78f14 | 2007-01-31 15:54:29 -0600 | [diff] [blame] | 277 | #endif |
| 278 | |
| 279 | /* |
| 280 | * U-Boot memory configuration |
| 281 | */ |
Wolfgang Denk | 14d0a02 | 2010-10-07 21:51:12 +0200 | [diff] [blame] | 282 | #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ |
Timur Tabi | 2ad6b51 | 2006-10-31 18:44:42 -0600 | [diff] [blame] | 283 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 284 | #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) |
| 285 | #define CONFIG_SYS_RAMBOOT |
Timur Tabi | 2ad6b51 | 2006-10-31 18:44:42 -0600 | [diff] [blame] | 286 | #else |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 287 | #undef CONFIG_SYS_RAMBOOT |
Timur Tabi | 2ad6b51 | 2006-10-31 18:44:42 -0600 | [diff] [blame] | 288 | #endif |
| 289 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 290 | #define CONFIG_SYS_INIT_RAM_LOCK |
Joe Hershberger | 396abba | 2011-10-11 23:57:15 -0500 | [diff] [blame] | 291 | #define CONFIG_SYS_INIT_RAM_ADDR 0xFD000000 /* Initial RAM addr */ |
| 292 | #define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* Size of used area in RAM*/ |
Timur Tabi | 2ad6b51 | 2006-10-31 18:44:42 -0600 | [diff] [blame] | 293 | |
Joe Hershberger | 396abba | 2011-10-11 23:57:15 -0500 | [diff] [blame] | 294 | #define CONFIG_SYS_GBL_DATA_OFFSET \ |
| 295 | (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 296 | #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET |
Timur Tabi | 2ad6b51 | 2006-10-31 18:44:42 -0600 | [diff] [blame] | 297 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 298 | /* CONFIG_SYS_MONITOR_LEN must be a multiple of CONFIG_ENV_SECT_SIZE */ |
Kevin Hao | 16c8c17 | 2016-07-08 11:25:14 +0800 | [diff] [blame] | 299 | #define CONFIG_SYS_MONITOR_LEN (512 * 1024) /* Reserve 512 kB for Mon */ |
Kim Phillips | c8a9064 | 2012-06-30 18:29:20 -0500 | [diff] [blame] | 300 | #define CONFIG_SYS_MALLOC_LEN (256 * 1024) /* Reserved for malloc */ |
Timur Tabi | 2ad6b51 | 2006-10-31 18:44:42 -0600 | [diff] [blame] | 301 | |
| 302 | /* |
| 303 | * Local Bus LCRR and LBCR regs |
| 304 | * LCRR: DLL bypass, Clock divider is 4 |
| 305 | * External Local Bus rate is |
| 306 | * CLKIN * HRCWL_CSB_TO_CLKIN / HRCWL_LCL_BUS_TO_SCB_CLK / LCRR_CLKDIV |
| 307 | */ |
Kim Phillips | c7190f0 | 2009-09-25 18:19:44 -0500 | [diff] [blame] | 308 | #define CONFIG_SYS_LCRR_DBYP LCRR_DBYP |
| 309 | #define CONFIG_SYS_LCRR_CLKDIV LCRR_CLKDIV_4 |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 310 | #define CONFIG_SYS_LBC_LBCR 0x00000000 |
Timur Tabi | 2ad6b51 | 2006-10-31 18:44:42 -0600 | [diff] [blame] | 311 | |
Joe Hershberger | 396abba | 2011-10-11 23:57:15 -0500 | [diff] [blame] | 312 | /* LB sdram refresh timer, about 6us */ |
| 313 | #define CONFIG_SYS_LBC_LSRT 0x32000000 |
| 314 | /* LB refresh timer prescal, 266MHz/32*/ |
| 315 | #define CONFIG_SYS_LBC_MRTPR 0x20000000 |
Timur Tabi | 2ad6b51 | 2006-10-31 18:44:42 -0600 | [diff] [blame] | 316 | |
| 317 | /* |
Timur Tabi | 2ad6b51 | 2006-10-31 18:44:42 -0600 | [diff] [blame] | 318 | * Serial Port |
| 319 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 320 | #define CONFIG_SYS_NS16550_SERIAL |
| 321 | #define CONFIG_SYS_NS16550_REG_SIZE 1 |
| 322 | #define CONFIG_SYS_NS16550_CLK get_bus_freq(0) |
Timur Tabi | 2ad6b51 | 2006-10-31 18:44:42 -0600 | [diff] [blame] | 323 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 324 | #define CONFIG_SYS_BAUDRATE_TABLE \ |
Joe Hershberger | 396abba | 2011-10-11 23:57:15 -0500 | [diff] [blame] | 325 | {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 115200} |
Timur Tabi | 7a78f14 | 2007-01-31 15:54:29 -0600 | [diff] [blame] | 326 | |
Simon Glass | 83302fb | 2016-10-17 20:12:38 -0600 | [diff] [blame] | 327 | #define CONSOLE ttyS0 |
Timur Tabi | 2ad6b51 | 2006-10-31 18:44:42 -0600 | [diff] [blame] | 328 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 329 | #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_IMMR + 0x4500) |
| 330 | #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR + 0x4600) |
Timur Tabi | 2ad6b51 | 2006-10-31 18:44:42 -0600 | [diff] [blame] | 331 | |
Timur Tabi | 7a78f14 | 2007-01-31 15:54:29 -0600 | [diff] [blame] | 332 | /* |
| 333 | * PCI |
| 334 | */ |
Timur Tabi | 2ad6b51 | 2006-10-31 18:44:42 -0600 | [diff] [blame] | 335 | #ifdef CONFIG_PCI |
Gabor Juhos | 842033e | 2013-05-30 07:06:12 +0000 | [diff] [blame] | 336 | #define CONFIG_PCI_INDIRECT_BRIDGE |
Timur Tabi | 2ad6b51 | 2006-10-31 18:44:42 -0600 | [diff] [blame] | 337 | |
| 338 | #define CONFIG_MPC83XX_PCI2 |
| 339 | |
| 340 | /* |
| 341 | * General PCI |
| 342 | * Addresses are mapped 1-1. |
| 343 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 344 | #define CONFIG_SYS_PCI1_MEM_BASE 0x80000000 |
| 345 | #define CONFIG_SYS_PCI1_MEM_PHYS CONFIG_SYS_PCI1_MEM_BASE |
| 346 | #define CONFIG_SYS_PCI1_MEM_SIZE 0x10000000 /* 256M */ |
Joe Hershberger | 396abba | 2011-10-11 23:57:15 -0500 | [diff] [blame] | 347 | #define CONFIG_SYS_PCI1_MMIO_BASE \ |
| 348 | (CONFIG_SYS_PCI1_MEM_BASE + CONFIG_SYS_PCI1_MEM_SIZE) |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 349 | #define CONFIG_SYS_PCI1_MMIO_PHYS CONFIG_SYS_PCI1_MMIO_BASE |
| 350 | #define CONFIG_SYS_PCI1_MMIO_SIZE 0x10000000 /* 256M */ |
Joe Hershberger | 396abba | 2011-10-11 23:57:15 -0500 | [diff] [blame] | 351 | #define CONFIG_SYS_PCI1_IO_BASE 0x00000000 |
| 352 | #define CONFIG_SYS_PCI1_IO_PHYS 0xE2000000 |
| 353 | #define CONFIG_SYS_PCI1_IO_SIZE 0x01000000 /* 16M */ |
Timur Tabi | 2ad6b51 | 2006-10-31 18:44:42 -0600 | [diff] [blame] | 354 | |
| 355 | #ifdef CONFIG_MPC83XX_PCI2 |
Joe Hershberger | 396abba | 2011-10-11 23:57:15 -0500 | [diff] [blame] | 356 | #define CONFIG_SYS_PCI2_MEM_BASE \ |
| 357 | (CONFIG_SYS_PCI1_MMIO_BASE + CONFIG_SYS_PCI1_MMIO_SIZE) |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 358 | #define CONFIG_SYS_PCI2_MEM_PHYS CONFIG_SYS_PCI2_MEM_BASE |
| 359 | #define CONFIG_SYS_PCI2_MEM_SIZE 0x10000000 /* 256M */ |
Joe Hershberger | 396abba | 2011-10-11 23:57:15 -0500 | [diff] [blame] | 360 | #define CONFIG_SYS_PCI2_MMIO_BASE \ |
| 361 | (CONFIG_SYS_PCI2_MEM_BASE + CONFIG_SYS_PCI2_MEM_SIZE) |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 362 | #define CONFIG_SYS_PCI2_MMIO_PHYS CONFIG_SYS_PCI2_MMIO_BASE |
| 363 | #define CONFIG_SYS_PCI2_MMIO_SIZE 0x10000000 /* 256M */ |
Joe Hershberger | 396abba | 2011-10-11 23:57:15 -0500 | [diff] [blame] | 364 | #define CONFIG_SYS_PCI2_IO_BASE 0x00000000 |
| 365 | #define CONFIG_SYS_PCI2_IO_PHYS \ |
| 366 | (CONFIG_SYS_PCI1_IO_PHYS + CONFIG_SYS_PCI1_IO_SIZE) |
| 367 | #define CONFIG_SYS_PCI2_IO_SIZE 0x01000000 /* 16M */ |
Timur Tabi | 2ad6b51 | 2006-10-31 18:44:42 -0600 | [diff] [blame] | 368 | #endif |
| 369 | |
Timur Tabi | 2ad6b51 | 2006-10-31 18:44:42 -0600 | [diff] [blame] | 370 | #ifndef CONFIG_PCI_PNP |
| 371 | #define PCI_ENET0_IOADDR 0x00000000 |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 372 | #define PCI_ENET0_MEMADDR CONFIG_SYS_PCI2_MEM_BASE |
Timur Tabi | 2ad6b51 | 2006-10-31 18:44:42 -0600 | [diff] [blame] | 373 | #define PCI_IDSEL_NUMBER 0x0f /* IDSEL = AD15 */ |
| 374 | #endif |
| 375 | |
| 376 | #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ |
| 377 | |
| 378 | #endif |
| 379 | |
| 380 | /* TSEC */ |
| 381 | |
| 382 | #ifdef CONFIG_TSEC_ENET |
Kim Phillips | 255a3577 | 2007-05-16 16:52:19 -0500 | [diff] [blame] | 383 | #define CONFIG_TSEC1 |
Timur Tabi | 2ad6b51 | 2006-10-31 18:44:42 -0600 | [diff] [blame] | 384 | |
Kim Phillips | 255a3577 | 2007-05-16 16:52:19 -0500 | [diff] [blame] | 385 | #ifdef CONFIG_TSEC1 |
Andy Fleming | 10327dc | 2007-08-16 16:35:02 -0500 | [diff] [blame] | 386 | #define CONFIG_HAS_ETH0 |
Kim Phillips | 255a3577 | 2007-05-16 16:52:19 -0500 | [diff] [blame] | 387 | #define CONFIG_TSEC1_NAME "TSEC0" |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 388 | #define CONFIG_SYS_TSEC1_OFFSET 0x24000 |
Wolfgang Denk | dd520bf | 2006-11-30 18:02:20 +0100 | [diff] [blame] | 389 | #define TSEC1_PHY_ADDR 0x1c /* VSC8201 uses address 0x1c */ |
Timur Tabi | 2ad6b51 | 2006-10-31 18:44:42 -0600 | [diff] [blame] | 390 | #define TSEC1_PHYIDX 0 |
Andy Fleming | 3a79013 | 2007-08-15 20:03:25 -0500 | [diff] [blame] | 391 | #define TSEC1_FLAGS TSEC_GIGABIT |
Timur Tabi | 2ad6b51 | 2006-10-31 18:44:42 -0600 | [diff] [blame] | 392 | #endif |
| 393 | |
Kim Phillips | 255a3577 | 2007-05-16 16:52:19 -0500 | [diff] [blame] | 394 | #ifdef CONFIG_TSEC2 |
Timur Tabi | 7a78f14 | 2007-01-31 15:54:29 -0600 | [diff] [blame] | 395 | #define CONFIG_HAS_ETH1 |
Kim Phillips | 255a3577 | 2007-05-16 16:52:19 -0500 | [diff] [blame] | 396 | #define CONFIG_TSEC2_NAME "TSEC1" |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 397 | #define CONFIG_SYS_TSEC2_OFFSET 0x25000 |
Timur Tabi | 89c7784 | 2008-02-08 13:15:55 -0600 | [diff] [blame] | 398 | |
Timur Tabi | 2ad6b51 | 2006-10-31 18:44:42 -0600 | [diff] [blame] | 399 | #define TSEC2_PHY_ADDR 4 |
| 400 | #define TSEC2_PHYIDX 0 |
Andy Fleming | 3a79013 | 2007-08-15 20:03:25 -0500 | [diff] [blame] | 401 | #define TSEC2_FLAGS TSEC_GIGABIT |
Timur Tabi | 2ad6b51 | 2006-10-31 18:44:42 -0600 | [diff] [blame] | 402 | #endif |
| 403 | |
| 404 | #define CONFIG_ETHPRIME "Freescale TSEC" |
| 405 | |
| 406 | #endif |
| 407 | |
Timur Tabi | 2ad6b51 | 2006-10-31 18:44:42 -0600 | [diff] [blame] | 408 | /* |
| 409 | * Environment |
| 410 | */ |
Timur Tabi | 7a78f14 | 2007-01-31 15:54:29 -0600 | [diff] [blame] | 411 | #define CONFIG_ENV_OVERWRITE |
| 412 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 413 | #ifndef CONFIG_SYS_RAMBOOT |
Joe Hershberger | 396abba | 2011-10-11 23:57:15 -0500 | [diff] [blame] | 414 | #define CONFIG_ENV_ADDR \ |
| 415 | (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN) |
Jean-Christophe PLAGNIOL-VILLARD | 0e8d158 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 416 | #define CONFIG_ENV_SECT_SIZE 0x10000 /* 64K (one sector) for environment */ |
Joe Hershberger | 396abba | 2011-10-11 23:57:15 -0500 | [diff] [blame] | 417 | #define CONFIG_ENV_SIZE 0x2000 |
Timur Tabi | 2ad6b51 | 2006-10-31 18:44:42 -0600 | [diff] [blame] | 418 | #else |
Joe Hershberger | 396abba | 2011-10-11 23:57:15 -0500 | [diff] [blame] | 419 | #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - 0x1000) |
| 420 | #define CONFIG_ENV_SIZE 0x2000 |
Timur Tabi | 2ad6b51 | 2006-10-31 18:44:42 -0600 | [diff] [blame] | 421 | #endif |
| 422 | |
| 423 | #define CONFIG_LOADS_ECHO /* echo on for serial download */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 424 | #define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */ |
Timur Tabi | 2ad6b51 | 2006-10-31 18:44:42 -0600 | [diff] [blame] | 425 | |
Jon Loeliger | 8ea5499 | 2007-07-04 22:30:06 -0500 | [diff] [blame] | 426 | /* |
Jon Loeliger | 659e2f6 | 2007-07-10 09:10:49 -0500 | [diff] [blame] | 427 | * BOOTP options |
| 428 | */ |
| 429 | #define CONFIG_BOOTP_BOOTFILESIZE |
Jon Loeliger | 659e2f6 | 2007-07-10 09:10:49 -0500 | [diff] [blame] | 430 | |
Timur Tabi | 2ad6b51 | 2006-10-31 18:44:42 -0600 | [diff] [blame] | 431 | /* Watchdog */ |
Timur Tabi | 2ad6b51 | 2006-10-31 18:44:42 -0600 | [diff] [blame] | 432 | #undef CONFIG_WATCHDOG /* watchdog disabled */ |
Timur Tabi | 2ad6b51 | 2006-10-31 18:44:42 -0600 | [diff] [blame] | 433 | |
| 434 | /* |
| 435 | * Miscellaneous configurable options |
| 436 | */ |
Timur Tabi | 7a78f14 | 2007-01-31 15:54:29 -0600 | [diff] [blame] | 437 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 438 | #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ |
Kim Phillips | 05f91a6 | 2009-08-26 21:27:37 -0500 | [diff] [blame] | 439 | #define CONFIG_LOADADDR 800000 /* default location for tftp and bootm */ |
Timur Tabi | 7a78f14 | 2007-01-31 15:54:29 -0600 | [diff] [blame] | 440 | |
Timur Tabi | 2ad6b51 | 2006-10-31 18:44:42 -0600 | [diff] [blame] | 441 | /* |
| 442 | * For booting Linux, the board info and command line data |
Ira W. Snyder | 9f530d5 | 2010-09-10 15:42:32 -0700 | [diff] [blame] | 443 | * have to be in the first 256 MB of memory, since this is |
Timur Tabi | 2ad6b51 | 2006-10-31 18:44:42 -0600 | [diff] [blame] | 444 | * the maximum mapped by the Linux kernel during initialization. |
| 445 | */ |
Joe Hershberger | 396abba | 2011-10-11 23:57:15 -0500 | [diff] [blame] | 446 | /* Initial Memory map for Linux*/ |
| 447 | #define CONFIG_SYS_BOOTMAPSZ (256 << 20) |
Kevin Hao | 6386527 | 2016-07-08 11:25:15 +0800 | [diff] [blame] | 448 | #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ |
Timur Tabi | 2ad6b51 | 2006-10-31 18:44:42 -0600 | [diff] [blame] | 449 | |
Timur Tabi | 7a78f14 | 2007-01-31 15:54:29 -0600 | [diff] [blame] | 450 | /* |
| 451 | * System performance |
| 452 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 453 | #define CONFIG_SYS_ACR_PIPE_DEP 3 /* Arbiter pipeline depth (0-3) */ |
Joe Hershberger | 396abba | 2011-10-11 23:57:15 -0500 | [diff] [blame] | 454 | #define CONFIG_SYS_ACR_RPTCNT 3 /* Arbiter repeat count (0-7) */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 455 | #define CONFIG_SYS_SPCR_TSEC1EP 3 /* TSEC1 emergency priority (0-3) */ |
| 456 | #define CONFIG_SYS_SPCR_TSEC2EP 3 /* TSEC2 emergency priority (0-3) */ |
| 457 | #define CONFIG_SYS_SCCR_TSEC1CM 1 /* TSEC1 clock mode (0-3) */ |
| 458 | #define CONFIG_SYS_SCCR_TSEC2CM 1 /* TSEC2 & I2C0 clock mode (0-3) */ |
Valeriy Glushkov | c31e132 | 2009-06-30 15:48:41 +0300 | [diff] [blame] | 459 | #define CONFIG_SYS_SCCR_USBMPHCM 3 /* USB MPH controller's clock */ |
| 460 | #define CONFIG_SYS_SCCR_USBDRCM 0 /* USB DR controller's clock */ |
Timur Tabi | 2ad6b51 | 2006-10-31 18:44:42 -0600 | [diff] [blame] | 461 | |
Timur Tabi | 7a78f14 | 2007-01-31 15:54:29 -0600 | [diff] [blame] | 462 | /* |
| 463 | * System IO Config |
| 464 | */ |
Joe Hershberger | 396abba | 2011-10-11 23:57:15 -0500 | [diff] [blame] | 465 | /* Needed for gigabit to work on TSEC 1 */ |
| 466 | #define CONFIG_SYS_SICRH SICRH_TSOBI1 |
| 467 | /* USB DR as device + USB MPH as host */ |
| 468 | #define CONFIG_SYS_SICRL (SICRL_LDP_A | SICRL_USB1) |
Timur Tabi | 2ad6b51 | 2006-10-31 18:44:42 -0600 | [diff] [blame] | 469 | |
Kim Phillips | 1a2e203 | 2010-04-20 19:37:54 -0500 | [diff] [blame] | 470 | #define CONFIG_SYS_HID0_INIT 0x00000000 |
| 471 | #define CONFIG_SYS_HID0_FINAL HID0_ENABLE_INSTRUCTION_CACHE |
Timur Tabi | 2ad6b51 | 2006-10-31 18:44:42 -0600 | [diff] [blame] | 472 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 473 | #define CONFIG_SYS_HID2 HID2_HBE |
Timur Tabi | 2ad6b51 | 2006-10-31 18:44:42 -0600 | [diff] [blame] | 474 | |
Jon Loeliger | 8ea5499 | 2007-07-04 22:30:06 -0500 | [diff] [blame] | 475 | #if defined(CONFIG_CMD_KGDB) |
Timur Tabi | 2ad6b51 | 2006-10-31 18:44:42 -0600 | [diff] [blame] | 476 | #define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */ |
Timur Tabi | 2ad6b51 | 2006-10-31 18:44:42 -0600 | [diff] [blame] | 477 | #endif |
| 478 | |
Timur Tabi | 2ad6b51 | 2006-10-31 18:44:42 -0600 | [diff] [blame] | 479 | /* |
| 480 | * Environment Configuration |
| 481 | */ |
| 482 | #define CONFIG_ENV_OVERWRITE |
| 483 | |
Joe Hershberger | 396abba | 2011-10-11 23:57:15 -0500 | [diff] [blame] | 484 | #define CONFIG_NETDEV "eth0" |
Timur Tabi | 2ad6b51 | 2006-10-31 18:44:42 -0600 | [diff] [blame] | 485 | |
Timur Tabi | 7a78f14 | 2007-01-31 15:54:29 -0600 | [diff] [blame] | 486 | /* Default path and filenames */ |
Joe Hershberger | 8b3637c | 2011-10-13 13:03:47 +0000 | [diff] [blame] | 487 | #define CONFIG_ROOTPATH "/nfsroot/rootfs" |
Joe Hershberger | b3f44c2 | 2011-10-13 13:03:48 +0000 | [diff] [blame] | 488 | #define CONFIG_BOOTFILE "uImage" |
Joe Hershberger | 396abba | 2011-10-11 23:57:15 -0500 | [diff] [blame] | 489 | /* U-Boot image on TFTP server */ |
| 490 | #define CONFIG_UBOOTPATH "u-boot.bin" |
Timur Tabi | 2ad6b51 | 2006-10-31 18:44:42 -0600 | [diff] [blame] | 491 | |
Mario Six | 4cb06d3 | 2019-01-21 09:17:44 +0100 | [diff] [blame] | 492 | #ifdef CONFIG_TARGET_MPC8349ITX |
Joe Hershberger | 396abba | 2011-10-11 23:57:15 -0500 | [diff] [blame] | 493 | #define CONFIG_FDTFILE "mpc8349emitx.dtb" |
Timur Tabi | 2ad6b51 | 2006-10-31 18:44:42 -0600 | [diff] [blame] | 494 | #else |
Joe Hershberger | 396abba | 2011-10-11 23:57:15 -0500 | [diff] [blame] | 495 | #define CONFIG_FDTFILE "mpc8349emitxgp.dtb" |
Timur Tabi | 2ad6b51 | 2006-10-31 18:44:42 -0600 | [diff] [blame] | 496 | #endif |
| 497 | |
Timur Tabi | 7a78f14 | 2007-01-31 15:54:29 -0600 | [diff] [blame] | 498 | |
Wolfgang Denk | dd520bf | 2006-11-30 18:02:20 +0100 | [diff] [blame] | 499 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
Simon Glass | 83302fb | 2016-10-17 20:12:38 -0600 | [diff] [blame] | 500 | "console=" __stringify(CONSOLE) "\0" \ |
Joe Hershberger | 396abba | 2011-10-11 23:57:15 -0500 | [diff] [blame] | 501 | "netdev=" CONFIG_NETDEV "\0" \ |
| 502 | "uboot=" CONFIG_UBOOTPATH "\0" \ |
Wolfgang Denk | 53677ef | 2008-05-20 16:00:29 +0200 | [diff] [blame] | 503 | "tftpflash=tftpboot $loadaddr $uboot; " \ |
Marek Vasut | 5368c55 | 2012-09-23 17:41:24 +0200 | [diff] [blame] | 504 | "protect off " __stringify(CONFIG_SYS_TEXT_BASE) \ |
| 505 | " +$filesize; " \ |
| 506 | "erase " __stringify(CONFIG_SYS_TEXT_BASE) \ |
| 507 | " +$filesize; " \ |
| 508 | "cp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE) \ |
| 509 | " $filesize; " \ |
| 510 | "protect on " __stringify(CONFIG_SYS_TEXT_BASE) \ |
| 511 | " +$filesize; " \ |
| 512 | "cmp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE) \ |
| 513 | " $filesize\0" \ |
Kim Phillips | 05f91a6 | 2009-08-26 21:27:37 -0500 | [diff] [blame] | 514 | "fdtaddr=780000\0" \ |
Joe Hershberger | 396abba | 2011-10-11 23:57:15 -0500 | [diff] [blame] | 515 | "fdtfile=" CONFIG_FDTFILE "\0" |
Kim Phillips | bf0b542 | 2006-11-01 00:10:40 -0600 | [diff] [blame] | 516 | |
Wolfgang Denk | dd520bf | 2006-11-30 18:02:20 +0100 | [diff] [blame] | 517 | #define CONFIG_NFSBOOTCOMMAND \ |
Timur Tabi | 7a78f14 | 2007-01-31 15:54:29 -0600 | [diff] [blame] | 518 | "setenv bootargs root=/dev/nfs rw nfsroot=$serverip:$rootpath" \ |
Joe Hershberger | 396abba | 2011-10-11 23:57:15 -0500 | [diff] [blame] | 519 | " ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off "\ |
Timur Tabi | 7a78f14 | 2007-01-31 15:54:29 -0600 | [diff] [blame] | 520 | " console=$console,$baudrate $othbootargs; " \ |
| 521 | "tftp $loadaddr $bootfile;" \ |
| 522 | "tftp $fdtaddr $fdtfile;" \ |
| 523 | "bootm $loadaddr - $fdtaddr" |
Kim Phillips | bf0b542 | 2006-11-01 00:10:40 -0600 | [diff] [blame] | 524 | |
Wolfgang Denk | dd520bf | 2006-11-30 18:02:20 +0100 | [diff] [blame] | 525 | #define CONFIG_RAMBOOTCOMMAND \ |
Timur Tabi | 7a78f14 | 2007-01-31 15:54:29 -0600 | [diff] [blame] | 526 | "setenv bootargs root=/dev/ram rw" \ |
| 527 | " console=$console,$baudrate $othbootargs; " \ |
| 528 | "tftp $ramdiskaddr $ramdiskfile;" \ |
| 529 | "tftp $loadaddr $bootfile;" \ |
| 530 | "tftp $fdtaddr $fdtfile;" \ |
| 531 | "bootm $loadaddr $ramdiskaddr $fdtaddr" |
Timur Tabi | 2ad6b51 | 2006-10-31 18:44:42 -0600 | [diff] [blame] | 532 | |
Timur Tabi | 2ad6b51 | 2006-10-31 18:44:42 -0600 | [diff] [blame] | 533 | #endif |