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Haavard Skinnemoend25ce7d2008-05-16 11:10:33 +02001/*
2 * SPI flash internal definitions
3 *
4 * Copyright (C) 2008 Atmel Corporation
5 */
6
Mike Frysinger1abe3652009-04-02 08:11:31 -04007/* Common parameters -- kind of high, but they should only occur when there
8 * is a problem (and well your system already is broken), so err on the side
9 * of caution in case we're dealing with slower SPI buses and/or processors.
10 */
11#define SPI_FLASH_PROG_TIMEOUT (2 * CONFIG_SYS_HZ)
12#define SPI_FLASH_PAGE_ERASE_TIMEOUT (5 * CONFIG_SYS_HZ)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020013#define SPI_FLASH_SECTOR_ERASE_TIMEOUT (10 * CONFIG_SYS_HZ)
Haavard Skinnemoend25ce7d2008-05-16 11:10:33 +020014
15/* Common commands */
16#define CMD_READ_ID 0x9f
17
18#define CMD_READ_ARRAY_SLOW 0x03
19#define CMD_READ_ARRAY_FAST 0x0b
Haavard Skinnemoend25ce7d2008-05-16 11:10:33 +020020
Mike Frysingerb4c87d62012-01-28 16:26:03 -080021#define CMD_WRITE_STATUS 0x01
Mike Frysingerd4aa5002011-04-25 06:58:29 +000022#define CMD_PAGE_PROGRAM 0x02
Mike Frysinger66ecb7c2011-04-25 06:59:53 +000023#define CMD_WRITE_DISABLE 0x04
Mike Frysinger61630452011-01-10 02:20:12 -050024#define CMD_READ_STATUS 0x05
Jagannadha Sutradharudu Teki615a1562013-06-21 15:56:30 +053025#define CMD_FLAG_STATUS 0x70
Mike Frysingere7b44ed2011-01-10 02:20:13 -050026#define CMD_WRITE_ENABLE 0x06
Mike Frysingerc4e932c2012-03-04 22:35:50 -050027#define CMD_ERASE_4K 0x20
28#define CMD_ERASE_32K 0x52
29#define CMD_ERASE_64K 0xd8
30#define CMD_ERASE_CHIP 0xc7
Mike Frysinger61630452011-01-10 02:20:12 -050031
Jagannadha Sutradharudu Tekie612ddf2013-06-19 15:37:09 +053032#define SPI_FLASH_16MB_BOUN 0x1000000
33
Jagannadha Sutradharudu Tekicf6b11d2013-06-19 15:31:23 +053034/* Manufacture ID's */
35#define SPI_FLASH_SPANSION_IDCODE0 0x01
36#define SPI_FLASH_STMICRO_IDCODE0 0x20
37#define SPI_FLASH_WINBOND_IDCODE0 0xef
38
Jagannadha Sutradharudu Teki1dcd6d02013-06-19 15:33:58 +053039#ifdef CONFIG_SPI_FLASH_BAR
Jagannadha Sutradharudu Tekicf6b11d2013-06-19 15:31:23 +053040/* Bank addr access commands */
Jagannadha Sutradharudu Teki1dcd6d02013-06-19 15:33:58 +053041# define CMD_BANKADDR_BRWR 0x17
42# define CMD_BANKADDR_BRRD 0x16
43# define CMD_EXTNADDR_WREAR 0xC5
44# define CMD_EXTNADDR_RDEAR 0xC8
45#endif
Jagannadha Sutradharudu Tekicf6b11d2013-06-19 15:31:23 +053046
Mike Frysinger61630452011-01-10 02:20:12 -050047/* Common status */
48#define STATUS_WIP 0x01
Jagannadha Sutradharudu Teki615a1562013-06-21 15:56:30 +053049#define STATUS_PEC 0x80
Mike Frysinger61630452011-01-10 02:20:12 -050050
Haavard Skinnemoend25ce7d2008-05-16 11:10:33 +020051/* Send a single-byte command to the device and read the response */
52int spi_flash_cmd(struct spi_slave *spi, u8 cmd, void *response, size_t len);
53
54/*
55 * Send a multi-byte command to the device and read the response. Used
56 * for flash array reads, etc.
57 */
58int spi_flash_cmd_read(struct spi_slave *spi, const u8 *cmd,
59 size_t cmd_len, void *data, size_t data_len);
60
Mike Frysingera4c3b402011-01-10 02:20:14 -050061int spi_flash_cmd_read_fast(struct spi_flash *flash, u32 offset,
62 size_t len, void *data);
63
Haavard Skinnemoend25ce7d2008-05-16 11:10:33 +020064/*
65 * Send a multi-byte command to the device followed by (optional)
66 * data. Used for programming the flash array, etc.
67 */
68int spi_flash_cmd_write(struct spi_slave *spi, const u8 *cmd, size_t cmd_len,
69 const void *data, size_t data_len);
70
71/*
Mike Frysingerd4aa5002011-04-25 06:58:29 +000072 * Write the requested data out breaking it up into multiple write
73 * commands as needed per the write size.
74 */
75int spi_flash_cmd_write_multi(struct spi_flash *flash, u32 offset,
76 size_t len, const void *buf);
77
78/*
Mike Frysinger2744a4e2011-04-23 23:05:55 +000079 * Enable writing on the SPI flash.
80 */
81static inline int spi_flash_cmd_write_enable(struct spi_flash *flash)
82{
83 return spi_flash_cmd(flash->spi, CMD_WRITE_ENABLE, NULL, 0);
84}
85
86/*
Mike Frysinger66ecb7c2011-04-25 06:59:53 +000087 * Disable writing on the SPI flash.
88 */
89static inline int spi_flash_cmd_write_disable(struct spi_flash *flash)
90{
91 return spi_flash_cmd(flash->spi, CMD_WRITE_DISABLE, NULL, 0);
92}
93
Mike Frysinger41e17132012-03-04 23:18:17 -050094/* Program the status register. */
95int spi_flash_cmd_write_status(struct spi_flash *flash, u8 sr);
96
Jagannadha Sutradharudu Teki1dcd6d02013-06-19 15:33:58 +053097#ifdef CONFIG_SPI_FLASH_BAR
Jagannadha Sutradharudu Tekic9fcb592013-06-13 20:37:19 +053098/* Program the bank address register */
99int spi_flash_cmd_bankaddr_write(struct spi_flash *flash, u8 bank_sel);
100
Jagannadha Sutradharudu Tekicf6b11d2013-06-19 15:31:23 +0530101/* Configure the BAR - discover the bank cmds */
102int spi_flash_bank_config(struct spi_flash *flash, u8 idcode0);
Jagannadha Sutradharudu Teki1dcd6d02013-06-19 15:33:58 +0530103#endif
Jagannadha Sutradharudu Tekicf6b11d2013-06-19 15:31:23 +0530104
Mike Frysinger66ecb7c2011-04-25 06:59:53 +0000105/*
Haavard Skinnemoend25ce7d2008-05-16 11:10:33 +0200106 * Same as spi_flash_cmd_read() except it also claims/releases the SPI
107 * bus. Used as common part of the ->read() operation.
108 */
109int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd,
110 size_t cmd_len, void *data, size_t data_len);
Jagannadha Sutradharudu Tekiacc23752013-06-21 19:19:00 +0530111/*
112 * Used for spi_flash write operation
113 * - SPI claim
114 * - spi_flash_cmd_write_enable
115 * - spi_flash_cmd_write
116 * - spi_flash_cmd_wait_ready
117 * - SPI release
118 */
119int spi_flash_write_common(struct spi_flash *flash, const u8 *cmd,
120 size_t cmd_len, const void *buf, size_t buf_len);
Mike Frysinger61630452011-01-10 02:20:12 -0500121
122/*
123 * Send the read status command to the device and wait for the wip
124 * (write-in-progress) bit to clear itself.
125 */
126int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout);
127
Mike Frysingere7b44ed2011-01-10 02:20:13 -0500128/* Erase sectors. */
Mike Frysingerc4e932c2012-03-04 22:35:50 -0500129int spi_flash_cmd_erase(struct spi_flash *flash, u32 offset, size_t len);
Mike Frysingere7b44ed2011-01-10 02:20:13 -0500130
Haavard Skinnemoend25ce7d2008-05-16 11:10:33 +0200131/* Manufacturer-specific probe functions */
132struct spi_flash *spi_flash_probe_spansion(struct spi_slave *spi, u8 *idcode);
133struct spi_flash *spi_flash_probe_atmel(struct spi_slave *spi, u8 *idcode);
Chong Huangd1d906562010-11-30 03:33:25 -0500134struct spi_flash *spi_flash_probe_eon(struct spi_slave *spi, u8 *idcode);
Prafulla Wadaskar7ce60312009-04-06 21:24:43 +0530135struct spi_flash *spi_flash_probe_macronix(struct spi_slave *spi, u8 *idcode);
Mike Frysinger1c587432009-03-27 19:27:58 -0400136struct spi_flash *spi_flash_probe_sst(struct spi_slave *spi, u8 *idcode);
TsiChung Liew7b7a8692008-08-06 16:08:41 -0500137struct spi_flash *spi_flash_probe_stmicro(struct spi_slave *spi, u8 *idcode);
Jason McMulland394a772009-10-09 17:12:23 -0400138struct spi_flash *spi_flash_probe_winbond(struct spi_slave *spi, u8 *idcode);
Reinhard Meyere0987e22010-10-05 16:56:40 +0200139struct spi_flash *spi_fram_probe_ramtron(struct spi_slave *spi, u8 *idcode);
Rajeshwari Shindef10b4c02013-01-22 20:30:18 +0000140struct spi_flash *spi_flash_probe_gigadevice(struct spi_slave *spi, u8 *idcode);