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wdenkc6097192002-11-03 00:24:07 +00001/*
2 * (C) Copyright 2001
3 * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com.
4 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
wdenkc6097192002-11-03 00:24:07 +00006 */
7
8/*
9 * This provides a bit-banged interface to the ethernet MII management
10 * channel.
11 */
12
13#include <common.h>
14#include <miiphy.h>
Andy Fleming5f184712011-04-08 02:10:27 -050015#include <phy.h>
wdenkc6097192002-11-03 00:24:07 +000016
Marian Balakowicz63ff0042005-10-28 22:30:33 +020017#include <asm/types.h>
18#include <linux/list.h>
19#include <malloc.h>
20#include <net.h>
21
22/* local debug macro */
Marian Balakowicz63ff0042005-10-28 22:30:33 +020023#undef MII_DEBUG
24
25#undef debug
26#ifdef MII_DEBUG
Andy Fleming16a53232011-04-07 14:38:35 -050027#define debug(fmt, args...) printf(fmt, ##args)
Marian Balakowicz63ff0042005-10-28 22:30:33 +020028#else
Andy Fleming16a53232011-04-07 14:38:35 -050029#define debug(fmt, args...)
Marian Balakowicz63ff0042005-10-28 22:30:33 +020030#endif /* MII_DEBUG */
31
Marian Balakowicz63ff0042005-10-28 22:30:33 +020032static struct list_head mii_devs;
33static struct mii_dev *current_mii;
34
Mike Frysinger0daac972010-07-27 18:35:09 -040035/*
36 * Lookup the mii_dev struct by the registered device name.
37 */
Andy Fleming5f184712011-04-08 02:10:27 -050038struct mii_dev *miiphy_get_dev_by_name(const char *devname)
Mike Frysinger0daac972010-07-27 18:35:09 -040039{
40 struct list_head *entry;
41 struct mii_dev *dev;
42
43 if (!devname) {
44 printf("NULL device name!\n");
45 return NULL;
46 }
47
48 list_for_each(entry, &mii_devs) {
49 dev = list_entry(entry, struct mii_dev, link);
50 if (strcmp(dev->name, devname) == 0)
51 return dev;
52 }
53
Mike Frysinger0daac972010-07-27 18:35:09 -040054 return NULL;
55}
56
Marian Balakowicz63ff0042005-10-28 22:30:33 +020057/*****************************************************************************
58 *
Marian Balakowiczd9785c12005-11-30 18:06:04 +010059 * Initialize global data. Need to be called before any other miiphy routine.
60 */
Mike Frysinger5700bb62010-07-27 18:35:08 -040061void miiphy_init(void)
Marian Balakowiczd9785c12005-11-30 18:06:04 +010062{
Andy Fleming16a53232011-04-07 14:38:35 -050063 INIT_LIST_HEAD(&mii_devs);
Larry Johnson298035d2007-10-31 11:21:29 -050064 current_mii = NULL;
Marian Balakowiczd9785c12005-11-30 18:06:04 +010065}
66
Andy Fleming5f184712011-04-08 02:10:27 -050067static int legacy_miiphy_read(struct mii_dev *bus, int addr, int devad, int reg)
68{
69 unsigned short val;
70 int ret;
71 struct legacy_mii_dev *ldev = bus->priv;
72
73 ret = ldev->read(bus->name, addr, reg, &val);
74
75 return ret ? -1 : (int)val;
76}
77
78static int legacy_miiphy_write(struct mii_dev *bus, int addr, int devad,
79 int reg, u16 val)
80{
81 struct legacy_mii_dev *ldev = bus->priv;
82
83 return ldev->write(bus->name, addr, reg, val);
84}
85
Marian Balakowiczd9785c12005-11-30 18:06:04 +010086/*****************************************************************************
87 *
Marian Balakowicz63ff0042005-10-28 22:30:33 +020088 * Register read and write MII access routines for the device <name>.
Andy Fleming1cdabc42011-10-31 09:46:13 -050089 * This API is now deprecated. Please use mdio_alloc and mdio_register, instead.
Marian Balakowicz63ff0042005-10-28 22:30:33 +020090 */
Mike Frysinger5700bb62010-07-27 18:35:08 -040091void miiphy_register(const char *name,
Andy Fleming16a53232011-04-07 14:38:35 -050092 int (*read)(const char *devname, unsigned char addr,
Wolfgang Denkf915c932011-12-07 08:35:14 +010093 unsigned char reg, unsigned short *value),
Andy Fleming16a53232011-04-07 14:38:35 -050094 int (*write)(const char *devname, unsigned char addr,
Wolfgang Denkf915c932011-12-07 08:35:14 +010095 unsigned char reg, unsigned short value))
Marian Balakowicz63ff0042005-10-28 22:30:33 +020096{
Marian Balakowicz63ff0042005-10-28 22:30:33 +020097 struct mii_dev *new_dev;
Andy Fleming5f184712011-04-08 02:10:27 -050098 struct legacy_mii_dev *ldev;
Laurence Withers07c07632011-07-14 23:21:45 +000099
100 BUG_ON(strlen(name) >= MDIO_NAME_LEN);
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200101
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200102 /* check if we have unique name */
Andy Fleming5f184712011-04-08 02:10:27 -0500103 new_dev = miiphy_get_dev_by_name(name);
Mike Frysinger0daac972010-07-27 18:35:09 -0400104 if (new_dev) {
105 printf("miiphy_register: non unique device name '%s'\n", name);
106 return;
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200107 }
108
109 /* allocate memory */
Andy Fleming5f184712011-04-08 02:10:27 -0500110 new_dev = mdio_alloc();
111 ldev = malloc(sizeof(*ldev));
112
113 if (new_dev == NULL || ldev == NULL) {
Andy Fleming16a53232011-04-07 14:38:35 -0500114 printf("miiphy_register: cannot allocate memory for '%s'\n",
Larry Johnson298035d2007-10-31 11:21:29 -0500115 name);
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200116 return;
117 }
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200118
119 /* initalize mii_dev struct fields */
Andy Fleming5f184712011-04-08 02:10:27 -0500120 new_dev->read = legacy_miiphy_read;
121 new_dev->write = legacy_miiphy_write;
Laurence Withers07c07632011-07-14 23:21:45 +0000122 strncpy(new_dev->name, name, MDIO_NAME_LEN);
123 new_dev->name[MDIO_NAME_LEN - 1] = 0;
Andy Fleming5f184712011-04-08 02:10:27 -0500124 ldev->read = read;
125 ldev->write = write;
126 new_dev->priv = ldev;
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200127
Andy Fleming16a53232011-04-07 14:38:35 -0500128 debug("miiphy_register: added '%s', read=0x%08lx, write=0x%08lx\n",
Andy Fleming5f184712011-04-08 02:10:27 -0500129 new_dev->name, ldev->read, ldev->write);
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200130
131 /* add it to the list */
Andy Fleming16a53232011-04-07 14:38:35 -0500132 list_add_tail(&new_dev->link, &mii_devs);
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200133
134 if (!current_mii)
135 current_mii = new_dev;
136}
137
Andy Fleming5f184712011-04-08 02:10:27 -0500138struct mii_dev *mdio_alloc(void)
139{
140 struct mii_dev *bus;
141
142 bus = malloc(sizeof(*bus));
143 if (!bus)
144 return bus;
145
146 memset(bus, 0, sizeof(*bus));
147
148 /* initalize mii_dev struct fields */
149 INIT_LIST_HEAD(&bus->link);
150
151 return bus;
152}
153
154int mdio_register(struct mii_dev *bus)
155{
156 if (!bus || !bus->name || !bus->read || !bus->write)
157 return -1;
158
159 /* check if we have unique name */
160 if (miiphy_get_dev_by_name(bus->name)) {
161 printf("mdio_register: non unique device name '%s'\n",
162 bus->name);
163 return -1;
164 }
165
166 /* add it to the list */
167 list_add_tail(&bus->link, &mii_devs);
168
169 if (!current_mii)
170 current_mii = bus;
171
172 return 0;
173}
174
175void mdio_list_devices(void)
176{
177 struct list_head *entry;
178
179 list_for_each(entry, &mii_devs) {
180 int i;
181 struct mii_dev *bus = list_entry(entry, struct mii_dev, link);
182
183 printf("%s:\n", bus->name);
184
185 for (i = 0; i < PHY_MAX_ADDR; i++) {
186 struct phy_device *phydev = bus->phymap[i];
187
188 if (phydev) {
189 printf("%d - %s", i, phydev->drv->name);
190
191 if (phydev->dev)
192 printf(" <--> %s\n", phydev->dev->name);
193 else
194 printf("\n");
195 }
196 }
197 }
198}
199
Mike Frysinger5700bb62010-07-27 18:35:08 -0400200int miiphy_set_current_dev(const char *devname)
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200201{
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200202 struct mii_dev *dev;
203
Andy Fleming5f184712011-04-08 02:10:27 -0500204 dev = miiphy_get_dev_by_name(devname);
Mike Frysinger0daac972010-07-27 18:35:09 -0400205 if (dev) {
206 current_mii = dev;
207 return 0;
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200208 }
209
Andy Fleming5f184712011-04-08 02:10:27 -0500210 printf("No such device: %s\n", devname);
211
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200212 return 1;
213}
214
Andy Fleming5f184712011-04-08 02:10:27 -0500215struct mii_dev *mdio_get_current_dev(void)
216{
217 return current_mii;
218}
219
220struct phy_device *mdio_phydev_for_ethname(const char *ethname)
221{
222 struct list_head *entry;
223 struct mii_dev *bus;
224
225 list_for_each(entry, &mii_devs) {
226 int i;
227 bus = list_entry(entry, struct mii_dev, link);
228
229 for (i = 0; i < PHY_MAX_ADDR; i++) {
230 if (!bus->phymap[i] || !bus->phymap[i]->dev)
231 continue;
232
233 if (strcmp(bus->phymap[i]->dev->name, ethname) == 0)
234 return bus->phymap[i];
235 }
236 }
237
238 printf("%s is not a known ethernet\n", ethname);
239 return NULL;
240}
241
Mike Frysinger5700bb62010-07-27 18:35:08 -0400242const char *miiphy_get_current_dev(void)
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200243{
244 if (current_mii)
245 return current_mii->name;
246
247 return NULL;
248}
249
Mike Frysingerede16ea2010-07-27 18:35:10 -0400250static struct mii_dev *miiphy_get_active_dev(const char *devname)
251{
252 /* If the current mii is the one we want, return it */
253 if (current_mii)
254 if (strcmp(current_mii->name, devname) == 0)
255 return current_mii;
256
257 /* Otherwise, set the active one to the one we want */
258 if (miiphy_set_current_dev(devname))
259 return NULL;
260 else
261 return current_mii;
262}
263
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200264/*****************************************************************************
265 *
266 * Read to variable <value> from the PHY attached to device <devname>,
267 * use PHY address <addr> and register <reg>.
268 *
Andy Fleming1cdabc42011-10-31 09:46:13 -0500269 * This API is deprecated. Use phy_read on a phy_device found via phy_connect
270 *
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200271 * Returns:
272 * 0 on success
273 */
Wolfgang Denkf915c932011-12-07 08:35:14 +0100274int miiphy_read(const char *devname, unsigned char addr, unsigned char reg,
Larry Johnson298035d2007-10-31 11:21:29 -0500275 unsigned short *value)
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200276{
Andy Fleming5f184712011-04-08 02:10:27 -0500277 struct mii_dev *bus;
Anatolij Gustschind67d5d52011-04-30 02:17:44 +0000278 int ret;
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200279
Andy Fleming5f184712011-04-08 02:10:27 -0500280 bus = miiphy_get_active_dev(devname);
Anatolij Gustschind67d5d52011-04-30 02:17:44 +0000281 if (!bus)
Andy Fleming5f184712011-04-08 02:10:27 -0500282 return 1;
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200283
Anatolij Gustschind67d5d52011-04-30 02:17:44 +0000284 ret = bus->read(bus, addr, MDIO_DEVAD_NONE, reg);
285 if (ret < 0)
286 return 1;
287
288 *value = (unsigned short)ret;
289 return 0;
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200290}
291
292/*****************************************************************************
293 *
294 * Write <value> to the PHY attached to device <devname>,
295 * use PHY address <addr> and register <reg>.
296 *
Andy Fleming1cdabc42011-10-31 09:46:13 -0500297 * This API is deprecated. Use phy_write on a phy_device found by phy_connect
298 *
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200299 * Returns:
300 * 0 on success
301 */
Wolfgang Denkf915c932011-12-07 08:35:14 +0100302int miiphy_write(const char *devname, unsigned char addr, unsigned char reg,
Larry Johnson298035d2007-10-31 11:21:29 -0500303 unsigned short value)
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200304{
Andy Fleming5f184712011-04-08 02:10:27 -0500305 struct mii_dev *bus;
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200306
Andy Fleming5f184712011-04-08 02:10:27 -0500307 bus = miiphy_get_active_dev(devname);
308 if (bus)
309 return bus->write(bus, addr, MDIO_DEVAD_NONE, reg, value);
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200310
Mike Frysinger0daac972010-07-27 18:35:09 -0400311 return 1;
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200312}
313
314/*****************************************************************************
315 *
316 * Print out list of registered MII capable devices.
317 */
Andy Fleming16a53232011-04-07 14:38:35 -0500318void miiphy_listdev(void)
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200319{
320 struct list_head *entry;
321 struct mii_dev *dev;
322
Andy Fleming16a53232011-04-07 14:38:35 -0500323 puts("MII devices: ");
324 list_for_each(entry, &mii_devs) {
325 dev = list_entry(entry, struct mii_dev, link);
326 printf("'%s' ", dev->name);
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200327 }
Andy Fleming16a53232011-04-07 14:38:35 -0500328 puts("\n");
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200329
330 if (current_mii)
Andy Fleming16a53232011-04-07 14:38:35 -0500331 printf("Current device: '%s'\n", current_mii->name);
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200332}
333
wdenkc6097192002-11-03 00:24:07 +0000334/*****************************************************************************
335 *
336 * Read the OUI, manufacture's model number, and revision number.
337 *
338 * OUI: 22 bits (unsigned int)
339 * Model: 6 bits (unsigned char)
340 * Revision: 4 bits (unsigned char)
341 *
Andy Fleming1cdabc42011-10-31 09:46:13 -0500342 * This API is deprecated.
343 *
wdenkc6097192002-11-03 00:24:07 +0000344 * Returns:
345 * 0 on success
346 */
Mike Frysinger5700bb62010-07-27 18:35:08 -0400347int miiphy_info(const char *devname, unsigned char addr, unsigned int *oui,
wdenkc6097192002-11-03 00:24:07 +0000348 unsigned char *model, unsigned char *rev)
349{
350 unsigned int reg = 0;
wdenk8bf3b002003-12-06 23:20:41 +0000351 unsigned short tmp;
wdenkc6097192002-11-03 00:24:07 +0000352
Andy Fleming16a53232011-04-07 14:38:35 -0500353 if (miiphy_read(devname, addr, MII_PHYSID2, &tmp) != 0) {
354 debug("PHY ID register 2 read failed\n");
355 return -1;
wdenkc6097192002-11-03 00:24:07 +0000356 }
wdenk8bf3b002003-12-06 23:20:41 +0000357 reg = tmp;
wdenkc6097192002-11-03 00:24:07 +0000358
Andy Fleming16a53232011-04-07 14:38:35 -0500359 debug("MII_PHYSID2 @ 0x%x = 0x%04x\n", addr, reg);
Shinya Kuribayashi26c7bab2008-01-19 10:25:59 +0900360
wdenkc6097192002-11-03 00:24:07 +0000361 if (reg == 0xFFFF) {
362 /* No physical device present at this address */
Andy Fleming16a53232011-04-07 14:38:35 -0500363 return -1;
wdenkc6097192002-11-03 00:24:07 +0000364 }
365
Andy Fleming16a53232011-04-07 14:38:35 -0500366 if (miiphy_read(devname, addr, MII_PHYSID1, &tmp) != 0) {
367 debug("PHY ID register 1 read failed\n");
368 return -1;
wdenkc6097192002-11-03 00:24:07 +0000369 }
wdenk8bf3b002003-12-06 23:20:41 +0000370 reg |= tmp << 16;
Andy Fleming16a53232011-04-07 14:38:35 -0500371 debug("PHY_PHYIDR[1,2] @ 0x%x = 0x%08x\n", addr, reg);
Shinya Kuribayashi26c7bab2008-01-19 10:25:59 +0900372
Larry Johnson298035d2007-10-31 11:21:29 -0500373 *oui = (reg >> 10);
374 *model = (unsigned char)((reg >> 4) & 0x0000003F);
375 *rev = (unsigned char)(reg & 0x0000000F);
Andy Fleming16a53232011-04-07 14:38:35 -0500376 return 0;
wdenkc6097192002-11-03 00:24:07 +0000377}
378
Andy Fleming5f184712011-04-08 02:10:27 -0500379#ifndef CONFIG_PHYLIB
wdenkc6097192002-11-03 00:24:07 +0000380/*****************************************************************************
381 *
382 * Reset the PHY.
Andy Fleming1cdabc42011-10-31 09:46:13 -0500383 *
384 * This API is deprecated. Use PHYLIB.
385 *
wdenkc6097192002-11-03 00:24:07 +0000386 * Returns:
387 * 0 on success
388 */
Mike Frysinger5700bb62010-07-27 18:35:08 -0400389int miiphy_reset(const char *devname, unsigned char addr)
wdenkc6097192002-11-03 00:24:07 +0000390{
391 unsigned short reg;
Stefan Roeseab5a0dc2010-02-02 13:43:48 +0100392 int timeout = 500;
wdenkc6097192002-11-03 00:24:07 +0000393
Andy Fleming16a53232011-04-07 14:38:35 -0500394 if (miiphy_read(devname, addr, MII_BMCR, &reg) != 0) {
395 debug("PHY status read failed\n");
396 return -1;
Wolfgang Denkf89920c2005-08-12 23:15:53 +0200397 }
Andy Fleming16a53232011-04-07 14:38:35 -0500398 if (miiphy_write(devname, addr, MII_BMCR, reg | BMCR_RESET) != 0) {
399 debug("PHY reset failed\n");
400 return -1;
wdenkc6097192002-11-03 00:24:07 +0000401 }
wdenk5653fc32004-02-08 22:55:38 +0000402#ifdef CONFIG_PHY_RESET_DELAY
Andy Fleming16a53232011-04-07 14:38:35 -0500403 udelay(CONFIG_PHY_RESET_DELAY); /* Intel LXT971A needs this */
wdenk5653fc32004-02-08 22:55:38 +0000404#endif
wdenkc6097192002-11-03 00:24:07 +0000405 /*
406 * Poll the control register for the reset bit to go to 0 (it is
407 * auto-clearing). This should happen within 0.5 seconds per the
408 * IEEE spec.
409 */
wdenkc6097192002-11-03 00:24:07 +0000410 reg = 0x8000;
Stefan Roeseab5a0dc2010-02-02 13:43:48 +0100411 while (((reg & 0x8000) != 0) && timeout--) {
Mike Frysinger8ef583a2010-12-23 15:40:12 -0500412 if (miiphy_read(devname, addr, MII_BMCR, &reg) != 0) {
Stefan Roeseab5a0dc2010-02-02 13:43:48 +0100413 debug("PHY status read failed\n");
414 return -1;
wdenkc6097192002-11-03 00:24:07 +0000415 }
Stefan Roeseab5a0dc2010-02-02 13:43:48 +0100416 udelay(1000);
wdenkc6097192002-11-03 00:24:07 +0000417 }
418 if ((reg & 0x8000) == 0) {
Andy Fleming16a53232011-04-07 14:38:35 -0500419 return 0;
wdenkc6097192002-11-03 00:24:07 +0000420 } else {
Andy Fleming16a53232011-04-07 14:38:35 -0500421 puts("PHY reset timed out\n");
422 return -1;
wdenkc6097192002-11-03 00:24:07 +0000423 }
Andy Fleming16a53232011-04-07 14:38:35 -0500424 return 0;
wdenkc6097192002-11-03 00:24:07 +0000425}
Andy Fleming5f184712011-04-08 02:10:27 -0500426#endif /* !PHYLIB */
wdenkc6097192002-11-03 00:24:07 +0000427
wdenkc6097192002-11-03 00:24:07 +0000428/*****************************************************************************
429 *
Larry Johnson71bc6e62007-11-01 08:46:50 -0500430 * Determine the ethernet speed (10/100/1000). Return 10 on error.
wdenkc6097192002-11-03 00:24:07 +0000431 */
Mike Frysinger5700bb62010-07-27 18:35:08 -0400432int miiphy_speed(const char *devname, unsigned char addr)
wdenkc6097192002-11-03 00:24:07 +0000433{
Larry Johnson71bc6e62007-11-01 08:46:50 -0500434 u16 bmcr, anlpar;
wdenkc6097192002-11-03 00:24:07 +0000435
wdenk6fb6af62004-03-23 23:20:24 +0000436#if defined(CONFIG_PHY_GIGE)
Larry Johnson71bc6e62007-11-01 08:46:50 -0500437 u16 btsr;
438
439 /*
440 * Check for 1000BASE-X. If it is supported, then assume that the speed
441 * is 1000.
442 */
Andy Fleming16a53232011-04-07 14:38:35 -0500443 if (miiphy_is_1000base_x(devname, addr))
Larry Johnson71bc6e62007-11-01 08:46:50 -0500444 return _1000BASET;
Andy Fleming16a53232011-04-07 14:38:35 -0500445
Larry Johnson71bc6e62007-11-01 08:46:50 -0500446 /*
447 * No 1000BASE-X, so assume 1000BASE-T/100BASE-TX/10BASE-T register set.
448 */
449 /* Check for 1000BASE-T. */
Andy Fleming16a53232011-04-07 14:38:35 -0500450 if (miiphy_read(devname, addr, MII_STAT1000, &btsr)) {
451 printf("PHY 1000BT status");
Larry Johnson71bc6e62007-11-01 08:46:50 -0500452 goto miiphy_read_failed;
453 }
454 if (btsr != 0xFFFF &&
Andy Fleming16a53232011-04-07 14:38:35 -0500455 (btsr & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD)))
Larry Johnson71bc6e62007-11-01 08:46:50 -0500456 return _1000BASET;
wdenk6fb6af62004-03-23 23:20:24 +0000457#endif /* CONFIG_PHY_GIGE */
wdenk855a4962004-03-14 18:23:55 +0000458
wdenka56bd922004-06-06 23:13:55 +0000459 /* Check Basic Management Control Register first. */
Andy Fleming16a53232011-04-07 14:38:35 -0500460 if (miiphy_read(devname, addr, MII_BMCR, &bmcr)) {
461 printf("PHY speed");
Larry Johnson71bc6e62007-11-01 08:46:50 -0500462 goto miiphy_read_failed;
wdenkc6097192002-11-03 00:24:07 +0000463 }
wdenka56bd922004-06-06 23:13:55 +0000464 /* Check if auto-negotiation is on. */
Mike Frysinger8ef583a2010-12-23 15:40:12 -0500465 if (bmcr & BMCR_ANENABLE) {
wdenka56bd922004-06-06 23:13:55 +0000466 /* Get auto-negotiation results. */
Andy Fleming16a53232011-04-07 14:38:35 -0500467 if (miiphy_read(devname, addr, MII_LPA, &anlpar)) {
468 printf("PHY AN speed");
Larry Johnson71bc6e62007-11-01 08:46:50 -0500469 goto miiphy_read_failed;
wdenka56bd922004-06-06 23:13:55 +0000470 }
Mike Frysinger8ef583a2010-12-23 15:40:12 -0500471 return (anlpar & LPA_100) ? _100BASET : _10BASET;
wdenka56bd922004-06-06 23:13:55 +0000472 }
473 /* Get speed from basic control settings. */
Mike Frysinger8ef583a2010-12-23 15:40:12 -0500474 return (bmcr & BMCR_SPEED100) ? _100BASET : _10BASET;
wdenka56bd922004-06-06 23:13:55 +0000475
Michael Zaidman5f841952010-02-28 16:28:25 +0200476miiphy_read_failed:
Andy Fleming16a53232011-04-07 14:38:35 -0500477 printf(" read failed, assuming 10BASE-T\n");
Larry Johnson71bc6e62007-11-01 08:46:50 -0500478 return _10BASET;
wdenkc6097192002-11-03 00:24:07 +0000479}
480
wdenkc6097192002-11-03 00:24:07 +0000481/*****************************************************************************
482 *
Larry Johnson71bc6e62007-11-01 08:46:50 -0500483 * Determine full/half duplex. Return half on error.
wdenkc6097192002-11-03 00:24:07 +0000484 */
Mike Frysinger5700bb62010-07-27 18:35:08 -0400485int miiphy_duplex(const char *devname, unsigned char addr)
wdenkc6097192002-11-03 00:24:07 +0000486{
Larry Johnson71bc6e62007-11-01 08:46:50 -0500487 u16 bmcr, anlpar;
wdenkc6097192002-11-03 00:24:07 +0000488
wdenk6fb6af62004-03-23 23:20:24 +0000489#if defined(CONFIG_PHY_GIGE)
Larry Johnson71bc6e62007-11-01 08:46:50 -0500490 u16 btsr;
491
492 /* Check for 1000BASE-X. */
Andy Fleming16a53232011-04-07 14:38:35 -0500493 if (miiphy_is_1000base_x(devname, addr)) {
Larry Johnson71bc6e62007-11-01 08:46:50 -0500494 /* 1000BASE-X */
Andy Fleming16a53232011-04-07 14:38:35 -0500495 if (miiphy_read(devname, addr, MII_LPA, &anlpar)) {
496 printf("1000BASE-X PHY AN duplex");
Larry Johnson71bc6e62007-11-01 08:46:50 -0500497 goto miiphy_read_failed;
498 }
499 }
500 /*
501 * No 1000BASE-X, so assume 1000BASE-T/100BASE-TX/10BASE-T register set.
502 */
503 /* Check for 1000BASE-T. */
Andy Fleming16a53232011-04-07 14:38:35 -0500504 if (miiphy_read(devname, addr, MII_STAT1000, &btsr)) {
505 printf("PHY 1000BT status");
Larry Johnson71bc6e62007-11-01 08:46:50 -0500506 goto miiphy_read_failed;
507 }
508 if (btsr != 0xFFFF) {
509 if (btsr & PHY_1000BTSR_1000FD) {
510 return FULL;
511 } else if (btsr & PHY_1000BTSR_1000HD) {
512 return HALF;
wdenk855a4962004-03-14 18:23:55 +0000513 }
514 }
wdenk6fb6af62004-03-23 23:20:24 +0000515#endif /* CONFIG_PHY_GIGE */
wdenk855a4962004-03-14 18:23:55 +0000516
wdenka56bd922004-06-06 23:13:55 +0000517 /* Check Basic Management Control Register first. */
Andy Fleming16a53232011-04-07 14:38:35 -0500518 if (miiphy_read(devname, addr, MII_BMCR, &bmcr)) {
519 puts("PHY duplex");
Larry Johnson71bc6e62007-11-01 08:46:50 -0500520 goto miiphy_read_failed;
wdenkc6097192002-11-03 00:24:07 +0000521 }
wdenka56bd922004-06-06 23:13:55 +0000522 /* Check if auto-negotiation is on. */
Mike Frysinger8ef583a2010-12-23 15:40:12 -0500523 if (bmcr & BMCR_ANENABLE) {
wdenka56bd922004-06-06 23:13:55 +0000524 /* Get auto-negotiation results. */
Andy Fleming16a53232011-04-07 14:38:35 -0500525 if (miiphy_read(devname, addr, MII_LPA, &anlpar)) {
526 puts("PHY AN duplex");
Larry Johnson71bc6e62007-11-01 08:46:50 -0500527 goto miiphy_read_failed;
wdenka56bd922004-06-06 23:13:55 +0000528 }
Mike Frysinger8ef583a2010-12-23 15:40:12 -0500529 return (anlpar & (LPA_10FULL | LPA_100FULL)) ?
Larry Johnson71bc6e62007-11-01 08:46:50 -0500530 FULL : HALF;
wdenka56bd922004-06-06 23:13:55 +0000531 }
532 /* Get speed from basic control settings. */
Mike Frysinger8ef583a2010-12-23 15:40:12 -0500533 return (bmcr & BMCR_FULLDPLX) ? FULL : HALF;
wdenka56bd922004-06-06 23:13:55 +0000534
Michael Zaidman5f841952010-02-28 16:28:25 +0200535miiphy_read_failed:
Andy Fleming16a53232011-04-07 14:38:35 -0500536 printf(" read failed, assuming half duplex\n");
Larry Johnson71bc6e62007-11-01 08:46:50 -0500537 return HALF;
538}
539
540/*****************************************************************************
541 *
542 * Return 1 if PHY supports 1000BASE-X, 0 if PHY supports 10BASE-T/100BASE-TX/
543 * 1000BASE-T, or on error.
544 */
Mike Frysinger5700bb62010-07-27 18:35:08 -0400545int miiphy_is_1000base_x(const char *devname, unsigned char addr)
Larry Johnson71bc6e62007-11-01 08:46:50 -0500546{
547#if defined(CONFIG_PHY_GIGE)
548 u16 exsr;
549
Andy Fleming16a53232011-04-07 14:38:35 -0500550 if (miiphy_read(devname, addr, MII_ESTATUS, &exsr)) {
551 printf("PHY extended status read failed, assuming no "
Larry Johnson71bc6e62007-11-01 08:46:50 -0500552 "1000BASE-X\n");
553 return 0;
554 }
Mike Frysinger8ef583a2010-12-23 15:40:12 -0500555 return 0 != (exsr & (ESTATUS_1000XF | ESTATUS_1000XH));
Larry Johnson71bc6e62007-11-01 08:46:50 -0500556#else
557 return 0;
558#endif
wdenkc6097192002-11-03 00:24:07 +0000559}
560
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200561#ifdef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
wdenkfc3e2162003-10-08 22:33:00 +0000562/*****************************************************************************
563 *
564 * Determine link status
565 */
Mike Frysinger5700bb62010-07-27 18:35:08 -0400566int miiphy_link(const char *devname, unsigned char addr)
wdenkfc3e2162003-10-08 22:33:00 +0000567{
568 unsigned short reg;
569
wdenka3d991b2004-04-15 21:48:45 +0000570 /* dummy read; needed to latch some phys */
Andy Fleming16a53232011-04-07 14:38:35 -0500571 (void)miiphy_read(devname, addr, MII_BMSR, &reg);
572 if (miiphy_read(devname, addr, MII_BMSR, &reg)) {
573 puts("MII_BMSR read failed, assuming no link\n");
574 return 0;
wdenkfc3e2162003-10-08 22:33:00 +0000575 }
576
577 /* Determine if a link is active */
Mike Frysinger8ef583a2010-12-23 15:40:12 -0500578 if ((reg & BMSR_LSTATUS) != 0) {
Andy Fleming16a53232011-04-07 14:38:35 -0500579 return 1;
wdenkfc3e2162003-10-08 22:33:00 +0000580 } else {
Andy Fleming16a53232011-04-07 14:38:35 -0500581 return 0;
wdenkfc3e2162003-10-08 22:33:00 +0000582 }
583}
584#endif