wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2001 |
| 3 | * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com. |
| 4 | * |
Wolfgang Denk | 1a45966 | 2013-07-08 09:37:19 +0200 | [diff] [blame^] | 5 | * SPDX-License-Identifier: GPL-2.0+ |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 6 | */ |
| 7 | |
| 8 | /* |
| 9 | * This provides a bit-banged interface to the ethernet MII management |
| 10 | * channel. |
| 11 | */ |
| 12 | |
| 13 | #include <common.h> |
| 14 | #include <miiphy.h> |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 15 | #include <phy.h> |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 16 | |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 17 | #include <asm/types.h> |
| 18 | #include <linux/list.h> |
| 19 | #include <malloc.h> |
| 20 | #include <net.h> |
| 21 | |
| 22 | /* local debug macro */ |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 23 | #undef MII_DEBUG |
| 24 | |
| 25 | #undef debug |
| 26 | #ifdef MII_DEBUG |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 27 | #define debug(fmt, args...) printf(fmt, ##args) |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 28 | #else |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 29 | #define debug(fmt, args...) |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 30 | #endif /* MII_DEBUG */ |
| 31 | |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 32 | static struct list_head mii_devs; |
| 33 | static struct mii_dev *current_mii; |
| 34 | |
Mike Frysinger | 0daac97 | 2010-07-27 18:35:09 -0400 | [diff] [blame] | 35 | /* |
| 36 | * Lookup the mii_dev struct by the registered device name. |
| 37 | */ |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 38 | struct mii_dev *miiphy_get_dev_by_name(const char *devname) |
Mike Frysinger | 0daac97 | 2010-07-27 18:35:09 -0400 | [diff] [blame] | 39 | { |
| 40 | struct list_head *entry; |
| 41 | struct mii_dev *dev; |
| 42 | |
| 43 | if (!devname) { |
| 44 | printf("NULL device name!\n"); |
| 45 | return NULL; |
| 46 | } |
| 47 | |
| 48 | list_for_each(entry, &mii_devs) { |
| 49 | dev = list_entry(entry, struct mii_dev, link); |
| 50 | if (strcmp(dev->name, devname) == 0) |
| 51 | return dev; |
| 52 | } |
| 53 | |
Mike Frysinger | 0daac97 | 2010-07-27 18:35:09 -0400 | [diff] [blame] | 54 | return NULL; |
| 55 | } |
| 56 | |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 57 | /***************************************************************************** |
| 58 | * |
Marian Balakowicz | d9785c1 | 2005-11-30 18:06:04 +0100 | [diff] [blame] | 59 | * Initialize global data. Need to be called before any other miiphy routine. |
| 60 | */ |
Mike Frysinger | 5700bb6 | 2010-07-27 18:35:08 -0400 | [diff] [blame] | 61 | void miiphy_init(void) |
Marian Balakowicz | d9785c1 | 2005-11-30 18:06:04 +0100 | [diff] [blame] | 62 | { |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 63 | INIT_LIST_HEAD(&mii_devs); |
Larry Johnson | 298035d | 2007-10-31 11:21:29 -0500 | [diff] [blame] | 64 | current_mii = NULL; |
Marian Balakowicz | d9785c1 | 2005-11-30 18:06:04 +0100 | [diff] [blame] | 65 | } |
| 66 | |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 67 | static int legacy_miiphy_read(struct mii_dev *bus, int addr, int devad, int reg) |
| 68 | { |
| 69 | unsigned short val; |
| 70 | int ret; |
| 71 | struct legacy_mii_dev *ldev = bus->priv; |
| 72 | |
| 73 | ret = ldev->read(bus->name, addr, reg, &val); |
| 74 | |
| 75 | return ret ? -1 : (int)val; |
| 76 | } |
| 77 | |
| 78 | static int legacy_miiphy_write(struct mii_dev *bus, int addr, int devad, |
| 79 | int reg, u16 val) |
| 80 | { |
| 81 | struct legacy_mii_dev *ldev = bus->priv; |
| 82 | |
| 83 | return ldev->write(bus->name, addr, reg, val); |
| 84 | } |
| 85 | |
Marian Balakowicz | d9785c1 | 2005-11-30 18:06:04 +0100 | [diff] [blame] | 86 | /***************************************************************************** |
| 87 | * |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 88 | * Register read and write MII access routines for the device <name>. |
Andy Fleming | 1cdabc4 | 2011-10-31 09:46:13 -0500 | [diff] [blame] | 89 | * This API is now deprecated. Please use mdio_alloc and mdio_register, instead. |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 90 | */ |
Mike Frysinger | 5700bb6 | 2010-07-27 18:35:08 -0400 | [diff] [blame] | 91 | void miiphy_register(const char *name, |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 92 | int (*read)(const char *devname, unsigned char addr, |
Wolfgang Denk | f915c93 | 2011-12-07 08:35:14 +0100 | [diff] [blame] | 93 | unsigned char reg, unsigned short *value), |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 94 | int (*write)(const char *devname, unsigned char addr, |
Wolfgang Denk | f915c93 | 2011-12-07 08:35:14 +0100 | [diff] [blame] | 95 | unsigned char reg, unsigned short value)) |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 96 | { |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 97 | struct mii_dev *new_dev; |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 98 | struct legacy_mii_dev *ldev; |
Laurence Withers | 07c0763 | 2011-07-14 23:21:45 +0000 | [diff] [blame] | 99 | |
| 100 | BUG_ON(strlen(name) >= MDIO_NAME_LEN); |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 101 | |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 102 | /* check if we have unique name */ |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 103 | new_dev = miiphy_get_dev_by_name(name); |
Mike Frysinger | 0daac97 | 2010-07-27 18:35:09 -0400 | [diff] [blame] | 104 | if (new_dev) { |
| 105 | printf("miiphy_register: non unique device name '%s'\n", name); |
| 106 | return; |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 107 | } |
| 108 | |
| 109 | /* allocate memory */ |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 110 | new_dev = mdio_alloc(); |
| 111 | ldev = malloc(sizeof(*ldev)); |
| 112 | |
| 113 | if (new_dev == NULL || ldev == NULL) { |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 114 | printf("miiphy_register: cannot allocate memory for '%s'\n", |
Larry Johnson | 298035d | 2007-10-31 11:21:29 -0500 | [diff] [blame] | 115 | name); |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 116 | return; |
| 117 | } |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 118 | |
| 119 | /* initalize mii_dev struct fields */ |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 120 | new_dev->read = legacy_miiphy_read; |
| 121 | new_dev->write = legacy_miiphy_write; |
Laurence Withers | 07c0763 | 2011-07-14 23:21:45 +0000 | [diff] [blame] | 122 | strncpy(new_dev->name, name, MDIO_NAME_LEN); |
| 123 | new_dev->name[MDIO_NAME_LEN - 1] = 0; |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 124 | ldev->read = read; |
| 125 | ldev->write = write; |
| 126 | new_dev->priv = ldev; |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 127 | |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 128 | debug("miiphy_register: added '%s', read=0x%08lx, write=0x%08lx\n", |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 129 | new_dev->name, ldev->read, ldev->write); |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 130 | |
| 131 | /* add it to the list */ |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 132 | list_add_tail(&new_dev->link, &mii_devs); |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 133 | |
| 134 | if (!current_mii) |
| 135 | current_mii = new_dev; |
| 136 | } |
| 137 | |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 138 | struct mii_dev *mdio_alloc(void) |
| 139 | { |
| 140 | struct mii_dev *bus; |
| 141 | |
| 142 | bus = malloc(sizeof(*bus)); |
| 143 | if (!bus) |
| 144 | return bus; |
| 145 | |
| 146 | memset(bus, 0, sizeof(*bus)); |
| 147 | |
| 148 | /* initalize mii_dev struct fields */ |
| 149 | INIT_LIST_HEAD(&bus->link); |
| 150 | |
| 151 | return bus; |
| 152 | } |
| 153 | |
| 154 | int mdio_register(struct mii_dev *bus) |
| 155 | { |
| 156 | if (!bus || !bus->name || !bus->read || !bus->write) |
| 157 | return -1; |
| 158 | |
| 159 | /* check if we have unique name */ |
| 160 | if (miiphy_get_dev_by_name(bus->name)) { |
| 161 | printf("mdio_register: non unique device name '%s'\n", |
| 162 | bus->name); |
| 163 | return -1; |
| 164 | } |
| 165 | |
| 166 | /* add it to the list */ |
| 167 | list_add_tail(&bus->link, &mii_devs); |
| 168 | |
| 169 | if (!current_mii) |
| 170 | current_mii = bus; |
| 171 | |
| 172 | return 0; |
| 173 | } |
| 174 | |
| 175 | void mdio_list_devices(void) |
| 176 | { |
| 177 | struct list_head *entry; |
| 178 | |
| 179 | list_for_each(entry, &mii_devs) { |
| 180 | int i; |
| 181 | struct mii_dev *bus = list_entry(entry, struct mii_dev, link); |
| 182 | |
| 183 | printf("%s:\n", bus->name); |
| 184 | |
| 185 | for (i = 0; i < PHY_MAX_ADDR; i++) { |
| 186 | struct phy_device *phydev = bus->phymap[i]; |
| 187 | |
| 188 | if (phydev) { |
| 189 | printf("%d - %s", i, phydev->drv->name); |
| 190 | |
| 191 | if (phydev->dev) |
| 192 | printf(" <--> %s\n", phydev->dev->name); |
| 193 | else |
| 194 | printf("\n"); |
| 195 | } |
| 196 | } |
| 197 | } |
| 198 | } |
| 199 | |
Mike Frysinger | 5700bb6 | 2010-07-27 18:35:08 -0400 | [diff] [blame] | 200 | int miiphy_set_current_dev(const char *devname) |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 201 | { |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 202 | struct mii_dev *dev; |
| 203 | |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 204 | dev = miiphy_get_dev_by_name(devname); |
Mike Frysinger | 0daac97 | 2010-07-27 18:35:09 -0400 | [diff] [blame] | 205 | if (dev) { |
| 206 | current_mii = dev; |
| 207 | return 0; |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 208 | } |
| 209 | |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 210 | printf("No such device: %s\n", devname); |
| 211 | |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 212 | return 1; |
| 213 | } |
| 214 | |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 215 | struct mii_dev *mdio_get_current_dev(void) |
| 216 | { |
| 217 | return current_mii; |
| 218 | } |
| 219 | |
| 220 | struct phy_device *mdio_phydev_for_ethname(const char *ethname) |
| 221 | { |
| 222 | struct list_head *entry; |
| 223 | struct mii_dev *bus; |
| 224 | |
| 225 | list_for_each(entry, &mii_devs) { |
| 226 | int i; |
| 227 | bus = list_entry(entry, struct mii_dev, link); |
| 228 | |
| 229 | for (i = 0; i < PHY_MAX_ADDR; i++) { |
| 230 | if (!bus->phymap[i] || !bus->phymap[i]->dev) |
| 231 | continue; |
| 232 | |
| 233 | if (strcmp(bus->phymap[i]->dev->name, ethname) == 0) |
| 234 | return bus->phymap[i]; |
| 235 | } |
| 236 | } |
| 237 | |
| 238 | printf("%s is not a known ethernet\n", ethname); |
| 239 | return NULL; |
| 240 | } |
| 241 | |
Mike Frysinger | 5700bb6 | 2010-07-27 18:35:08 -0400 | [diff] [blame] | 242 | const char *miiphy_get_current_dev(void) |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 243 | { |
| 244 | if (current_mii) |
| 245 | return current_mii->name; |
| 246 | |
| 247 | return NULL; |
| 248 | } |
| 249 | |
Mike Frysinger | ede16ea | 2010-07-27 18:35:10 -0400 | [diff] [blame] | 250 | static struct mii_dev *miiphy_get_active_dev(const char *devname) |
| 251 | { |
| 252 | /* If the current mii is the one we want, return it */ |
| 253 | if (current_mii) |
| 254 | if (strcmp(current_mii->name, devname) == 0) |
| 255 | return current_mii; |
| 256 | |
| 257 | /* Otherwise, set the active one to the one we want */ |
| 258 | if (miiphy_set_current_dev(devname)) |
| 259 | return NULL; |
| 260 | else |
| 261 | return current_mii; |
| 262 | } |
| 263 | |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 264 | /***************************************************************************** |
| 265 | * |
| 266 | * Read to variable <value> from the PHY attached to device <devname>, |
| 267 | * use PHY address <addr> and register <reg>. |
| 268 | * |
Andy Fleming | 1cdabc4 | 2011-10-31 09:46:13 -0500 | [diff] [blame] | 269 | * This API is deprecated. Use phy_read on a phy_device found via phy_connect |
| 270 | * |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 271 | * Returns: |
| 272 | * 0 on success |
| 273 | */ |
Wolfgang Denk | f915c93 | 2011-12-07 08:35:14 +0100 | [diff] [blame] | 274 | int miiphy_read(const char *devname, unsigned char addr, unsigned char reg, |
Larry Johnson | 298035d | 2007-10-31 11:21:29 -0500 | [diff] [blame] | 275 | unsigned short *value) |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 276 | { |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 277 | struct mii_dev *bus; |
Anatolij Gustschin | d67d5d5 | 2011-04-30 02:17:44 +0000 | [diff] [blame] | 278 | int ret; |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 279 | |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 280 | bus = miiphy_get_active_dev(devname); |
Anatolij Gustschin | d67d5d5 | 2011-04-30 02:17:44 +0000 | [diff] [blame] | 281 | if (!bus) |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 282 | return 1; |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 283 | |
Anatolij Gustschin | d67d5d5 | 2011-04-30 02:17:44 +0000 | [diff] [blame] | 284 | ret = bus->read(bus, addr, MDIO_DEVAD_NONE, reg); |
| 285 | if (ret < 0) |
| 286 | return 1; |
| 287 | |
| 288 | *value = (unsigned short)ret; |
| 289 | return 0; |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 290 | } |
| 291 | |
| 292 | /***************************************************************************** |
| 293 | * |
| 294 | * Write <value> to the PHY attached to device <devname>, |
| 295 | * use PHY address <addr> and register <reg>. |
| 296 | * |
Andy Fleming | 1cdabc4 | 2011-10-31 09:46:13 -0500 | [diff] [blame] | 297 | * This API is deprecated. Use phy_write on a phy_device found by phy_connect |
| 298 | * |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 299 | * Returns: |
| 300 | * 0 on success |
| 301 | */ |
Wolfgang Denk | f915c93 | 2011-12-07 08:35:14 +0100 | [diff] [blame] | 302 | int miiphy_write(const char *devname, unsigned char addr, unsigned char reg, |
Larry Johnson | 298035d | 2007-10-31 11:21:29 -0500 | [diff] [blame] | 303 | unsigned short value) |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 304 | { |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 305 | struct mii_dev *bus; |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 306 | |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 307 | bus = miiphy_get_active_dev(devname); |
| 308 | if (bus) |
| 309 | return bus->write(bus, addr, MDIO_DEVAD_NONE, reg, value); |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 310 | |
Mike Frysinger | 0daac97 | 2010-07-27 18:35:09 -0400 | [diff] [blame] | 311 | return 1; |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 312 | } |
| 313 | |
| 314 | /***************************************************************************** |
| 315 | * |
| 316 | * Print out list of registered MII capable devices. |
| 317 | */ |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 318 | void miiphy_listdev(void) |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 319 | { |
| 320 | struct list_head *entry; |
| 321 | struct mii_dev *dev; |
| 322 | |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 323 | puts("MII devices: "); |
| 324 | list_for_each(entry, &mii_devs) { |
| 325 | dev = list_entry(entry, struct mii_dev, link); |
| 326 | printf("'%s' ", dev->name); |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 327 | } |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 328 | puts("\n"); |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 329 | |
| 330 | if (current_mii) |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 331 | printf("Current device: '%s'\n", current_mii->name); |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 332 | } |
| 333 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 334 | /***************************************************************************** |
| 335 | * |
| 336 | * Read the OUI, manufacture's model number, and revision number. |
| 337 | * |
| 338 | * OUI: 22 bits (unsigned int) |
| 339 | * Model: 6 bits (unsigned char) |
| 340 | * Revision: 4 bits (unsigned char) |
| 341 | * |
Andy Fleming | 1cdabc4 | 2011-10-31 09:46:13 -0500 | [diff] [blame] | 342 | * This API is deprecated. |
| 343 | * |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 344 | * Returns: |
| 345 | * 0 on success |
| 346 | */ |
Mike Frysinger | 5700bb6 | 2010-07-27 18:35:08 -0400 | [diff] [blame] | 347 | int miiphy_info(const char *devname, unsigned char addr, unsigned int *oui, |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 348 | unsigned char *model, unsigned char *rev) |
| 349 | { |
| 350 | unsigned int reg = 0; |
wdenk | 8bf3b00 | 2003-12-06 23:20:41 +0000 | [diff] [blame] | 351 | unsigned short tmp; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 352 | |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 353 | if (miiphy_read(devname, addr, MII_PHYSID2, &tmp) != 0) { |
| 354 | debug("PHY ID register 2 read failed\n"); |
| 355 | return -1; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 356 | } |
wdenk | 8bf3b00 | 2003-12-06 23:20:41 +0000 | [diff] [blame] | 357 | reg = tmp; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 358 | |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 359 | debug("MII_PHYSID2 @ 0x%x = 0x%04x\n", addr, reg); |
Shinya Kuribayashi | 26c7bab | 2008-01-19 10:25:59 +0900 | [diff] [blame] | 360 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 361 | if (reg == 0xFFFF) { |
| 362 | /* No physical device present at this address */ |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 363 | return -1; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 364 | } |
| 365 | |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 366 | if (miiphy_read(devname, addr, MII_PHYSID1, &tmp) != 0) { |
| 367 | debug("PHY ID register 1 read failed\n"); |
| 368 | return -1; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 369 | } |
wdenk | 8bf3b00 | 2003-12-06 23:20:41 +0000 | [diff] [blame] | 370 | reg |= tmp << 16; |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 371 | debug("PHY_PHYIDR[1,2] @ 0x%x = 0x%08x\n", addr, reg); |
Shinya Kuribayashi | 26c7bab | 2008-01-19 10:25:59 +0900 | [diff] [blame] | 372 | |
Larry Johnson | 298035d | 2007-10-31 11:21:29 -0500 | [diff] [blame] | 373 | *oui = (reg >> 10); |
| 374 | *model = (unsigned char)((reg >> 4) & 0x0000003F); |
| 375 | *rev = (unsigned char)(reg & 0x0000000F); |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 376 | return 0; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 377 | } |
| 378 | |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 379 | #ifndef CONFIG_PHYLIB |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 380 | /***************************************************************************** |
| 381 | * |
| 382 | * Reset the PHY. |
Andy Fleming | 1cdabc4 | 2011-10-31 09:46:13 -0500 | [diff] [blame] | 383 | * |
| 384 | * This API is deprecated. Use PHYLIB. |
| 385 | * |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 386 | * Returns: |
| 387 | * 0 on success |
| 388 | */ |
Mike Frysinger | 5700bb6 | 2010-07-27 18:35:08 -0400 | [diff] [blame] | 389 | int miiphy_reset(const char *devname, unsigned char addr) |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 390 | { |
| 391 | unsigned short reg; |
Stefan Roese | ab5a0dc | 2010-02-02 13:43:48 +0100 | [diff] [blame] | 392 | int timeout = 500; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 393 | |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 394 | if (miiphy_read(devname, addr, MII_BMCR, ®) != 0) { |
| 395 | debug("PHY status read failed\n"); |
| 396 | return -1; |
Wolfgang Denk | f89920c | 2005-08-12 23:15:53 +0200 | [diff] [blame] | 397 | } |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 398 | if (miiphy_write(devname, addr, MII_BMCR, reg | BMCR_RESET) != 0) { |
| 399 | debug("PHY reset failed\n"); |
| 400 | return -1; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 401 | } |
wdenk | 5653fc3 | 2004-02-08 22:55:38 +0000 | [diff] [blame] | 402 | #ifdef CONFIG_PHY_RESET_DELAY |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 403 | udelay(CONFIG_PHY_RESET_DELAY); /* Intel LXT971A needs this */ |
wdenk | 5653fc3 | 2004-02-08 22:55:38 +0000 | [diff] [blame] | 404 | #endif |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 405 | /* |
| 406 | * Poll the control register for the reset bit to go to 0 (it is |
| 407 | * auto-clearing). This should happen within 0.5 seconds per the |
| 408 | * IEEE spec. |
| 409 | */ |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 410 | reg = 0x8000; |
Stefan Roese | ab5a0dc | 2010-02-02 13:43:48 +0100 | [diff] [blame] | 411 | while (((reg & 0x8000) != 0) && timeout--) { |
Mike Frysinger | 8ef583a | 2010-12-23 15:40:12 -0500 | [diff] [blame] | 412 | if (miiphy_read(devname, addr, MII_BMCR, ®) != 0) { |
Stefan Roese | ab5a0dc | 2010-02-02 13:43:48 +0100 | [diff] [blame] | 413 | debug("PHY status read failed\n"); |
| 414 | return -1; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 415 | } |
Stefan Roese | ab5a0dc | 2010-02-02 13:43:48 +0100 | [diff] [blame] | 416 | udelay(1000); |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 417 | } |
| 418 | if ((reg & 0x8000) == 0) { |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 419 | return 0; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 420 | } else { |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 421 | puts("PHY reset timed out\n"); |
| 422 | return -1; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 423 | } |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 424 | return 0; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 425 | } |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 426 | #endif /* !PHYLIB */ |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 427 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 428 | /***************************************************************************** |
| 429 | * |
Larry Johnson | 71bc6e6 | 2007-11-01 08:46:50 -0500 | [diff] [blame] | 430 | * Determine the ethernet speed (10/100/1000). Return 10 on error. |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 431 | */ |
Mike Frysinger | 5700bb6 | 2010-07-27 18:35:08 -0400 | [diff] [blame] | 432 | int miiphy_speed(const char *devname, unsigned char addr) |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 433 | { |
Larry Johnson | 71bc6e6 | 2007-11-01 08:46:50 -0500 | [diff] [blame] | 434 | u16 bmcr, anlpar; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 435 | |
wdenk | 6fb6af6 | 2004-03-23 23:20:24 +0000 | [diff] [blame] | 436 | #if defined(CONFIG_PHY_GIGE) |
Larry Johnson | 71bc6e6 | 2007-11-01 08:46:50 -0500 | [diff] [blame] | 437 | u16 btsr; |
| 438 | |
| 439 | /* |
| 440 | * Check for 1000BASE-X. If it is supported, then assume that the speed |
| 441 | * is 1000. |
| 442 | */ |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 443 | if (miiphy_is_1000base_x(devname, addr)) |
Larry Johnson | 71bc6e6 | 2007-11-01 08:46:50 -0500 | [diff] [blame] | 444 | return _1000BASET; |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 445 | |
Larry Johnson | 71bc6e6 | 2007-11-01 08:46:50 -0500 | [diff] [blame] | 446 | /* |
| 447 | * No 1000BASE-X, so assume 1000BASE-T/100BASE-TX/10BASE-T register set. |
| 448 | */ |
| 449 | /* Check for 1000BASE-T. */ |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 450 | if (miiphy_read(devname, addr, MII_STAT1000, &btsr)) { |
| 451 | printf("PHY 1000BT status"); |
Larry Johnson | 71bc6e6 | 2007-11-01 08:46:50 -0500 | [diff] [blame] | 452 | goto miiphy_read_failed; |
| 453 | } |
| 454 | if (btsr != 0xFFFF && |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 455 | (btsr & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD))) |
Larry Johnson | 71bc6e6 | 2007-11-01 08:46:50 -0500 | [diff] [blame] | 456 | return _1000BASET; |
wdenk | 6fb6af6 | 2004-03-23 23:20:24 +0000 | [diff] [blame] | 457 | #endif /* CONFIG_PHY_GIGE */ |
wdenk | 855a496 | 2004-03-14 18:23:55 +0000 | [diff] [blame] | 458 | |
wdenk | a56bd92 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 459 | /* Check Basic Management Control Register first. */ |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 460 | if (miiphy_read(devname, addr, MII_BMCR, &bmcr)) { |
| 461 | printf("PHY speed"); |
Larry Johnson | 71bc6e6 | 2007-11-01 08:46:50 -0500 | [diff] [blame] | 462 | goto miiphy_read_failed; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 463 | } |
wdenk | a56bd92 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 464 | /* Check if auto-negotiation is on. */ |
Mike Frysinger | 8ef583a | 2010-12-23 15:40:12 -0500 | [diff] [blame] | 465 | if (bmcr & BMCR_ANENABLE) { |
wdenk | a56bd92 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 466 | /* Get auto-negotiation results. */ |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 467 | if (miiphy_read(devname, addr, MII_LPA, &anlpar)) { |
| 468 | printf("PHY AN speed"); |
Larry Johnson | 71bc6e6 | 2007-11-01 08:46:50 -0500 | [diff] [blame] | 469 | goto miiphy_read_failed; |
wdenk | a56bd92 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 470 | } |
Mike Frysinger | 8ef583a | 2010-12-23 15:40:12 -0500 | [diff] [blame] | 471 | return (anlpar & LPA_100) ? _100BASET : _10BASET; |
wdenk | a56bd92 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 472 | } |
| 473 | /* Get speed from basic control settings. */ |
Mike Frysinger | 8ef583a | 2010-12-23 15:40:12 -0500 | [diff] [blame] | 474 | return (bmcr & BMCR_SPEED100) ? _100BASET : _10BASET; |
wdenk | a56bd92 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 475 | |
Michael Zaidman | 5f84195 | 2010-02-28 16:28:25 +0200 | [diff] [blame] | 476 | miiphy_read_failed: |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 477 | printf(" read failed, assuming 10BASE-T\n"); |
Larry Johnson | 71bc6e6 | 2007-11-01 08:46:50 -0500 | [diff] [blame] | 478 | return _10BASET; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 479 | } |
| 480 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 481 | /***************************************************************************** |
| 482 | * |
Larry Johnson | 71bc6e6 | 2007-11-01 08:46:50 -0500 | [diff] [blame] | 483 | * Determine full/half duplex. Return half on error. |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 484 | */ |
Mike Frysinger | 5700bb6 | 2010-07-27 18:35:08 -0400 | [diff] [blame] | 485 | int miiphy_duplex(const char *devname, unsigned char addr) |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 486 | { |
Larry Johnson | 71bc6e6 | 2007-11-01 08:46:50 -0500 | [diff] [blame] | 487 | u16 bmcr, anlpar; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 488 | |
wdenk | 6fb6af6 | 2004-03-23 23:20:24 +0000 | [diff] [blame] | 489 | #if defined(CONFIG_PHY_GIGE) |
Larry Johnson | 71bc6e6 | 2007-11-01 08:46:50 -0500 | [diff] [blame] | 490 | u16 btsr; |
| 491 | |
| 492 | /* Check for 1000BASE-X. */ |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 493 | if (miiphy_is_1000base_x(devname, addr)) { |
Larry Johnson | 71bc6e6 | 2007-11-01 08:46:50 -0500 | [diff] [blame] | 494 | /* 1000BASE-X */ |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 495 | if (miiphy_read(devname, addr, MII_LPA, &anlpar)) { |
| 496 | printf("1000BASE-X PHY AN duplex"); |
Larry Johnson | 71bc6e6 | 2007-11-01 08:46:50 -0500 | [diff] [blame] | 497 | goto miiphy_read_failed; |
| 498 | } |
| 499 | } |
| 500 | /* |
| 501 | * No 1000BASE-X, so assume 1000BASE-T/100BASE-TX/10BASE-T register set. |
| 502 | */ |
| 503 | /* Check for 1000BASE-T. */ |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 504 | if (miiphy_read(devname, addr, MII_STAT1000, &btsr)) { |
| 505 | printf("PHY 1000BT status"); |
Larry Johnson | 71bc6e6 | 2007-11-01 08:46:50 -0500 | [diff] [blame] | 506 | goto miiphy_read_failed; |
| 507 | } |
| 508 | if (btsr != 0xFFFF) { |
| 509 | if (btsr & PHY_1000BTSR_1000FD) { |
| 510 | return FULL; |
| 511 | } else if (btsr & PHY_1000BTSR_1000HD) { |
| 512 | return HALF; |
wdenk | 855a496 | 2004-03-14 18:23:55 +0000 | [diff] [blame] | 513 | } |
| 514 | } |
wdenk | 6fb6af6 | 2004-03-23 23:20:24 +0000 | [diff] [blame] | 515 | #endif /* CONFIG_PHY_GIGE */ |
wdenk | 855a496 | 2004-03-14 18:23:55 +0000 | [diff] [blame] | 516 | |
wdenk | a56bd92 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 517 | /* Check Basic Management Control Register first. */ |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 518 | if (miiphy_read(devname, addr, MII_BMCR, &bmcr)) { |
| 519 | puts("PHY duplex"); |
Larry Johnson | 71bc6e6 | 2007-11-01 08:46:50 -0500 | [diff] [blame] | 520 | goto miiphy_read_failed; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 521 | } |
wdenk | a56bd92 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 522 | /* Check if auto-negotiation is on. */ |
Mike Frysinger | 8ef583a | 2010-12-23 15:40:12 -0500 | [diff] [blame] | 523 | if (bmcr & BMCR_ANENABLE) { |
wdenk | a56bd92 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 524 | /* Get auto-negotiation results. */ |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 525 | if (miiphy_read(devname, addr, MII_LPA, &anlpar)) { |
| 526 | puts("PHY AN duplex"); |
Larry Johnson | 71bc6e6 | 2007-11-01 08:46:50 -0500 | [diff] [blame] | 527 | goto miiphy_read_failed; |
wdenk | a56bd92 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 528 | } |
Mike Frysinger | 8ef583a | 2010-12-23 15:40:12 -0500 | [diff] [blame] | 529 | return (anlpar & (LPA_10FULL | LPA_100FULL)) ? |
Larry Johnson | 71bc6e6 | 2007-11-01 08:46:50 -0500 | [diff] [blame] | 530 | FULL : HALF; |
wdenk | a56bd92 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 531 | } |
| 532 | /* Get speed from basic control settings. */ |
Mike Frysinger | 8ef583a | 2010-12-23 15:40:12 -0500 | [diff] [blame] | 533 | return (bmcr & BMCR_FULLDPLX) ? FULL : HALF; |
wdenk | a56bd92 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 534 | |
Michael Zaidman | 5f84195 | 2010-02-28 16:28:25 +0200 | [diff] [blame] | 535 | miiphy_read_failed: |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 536 | printf(" read failed, assuming half duplex\n"); |
Larry Johnson | 71bc6e6 | 2007-11-01 08:46:50 -0500 | [diff] [blame] | 537 | return HALF; |
| 538 | } |
| 539 | |
| 540 | /***************************************************************************** |
| 541 | * |
| 542 | * Return 1 if PHY supports 1000BASE-X, 0 if PHY supports 10BASE-T/100BASE-TX/ |
| 543 | * 1000BASE-T, or on error. |
| 544 | */ |
Mike Frysinger | 5700bb6 | 2010-07-27 18:35:08 -0400 | [diff] [blame] | 545 | int miiphy_is_1000base_x(const char *devname, unsigned char addr) |
Larry Johnson | 71bc6e6 | 2007-11-01 08:46:50 -0500 | [diff] [blame] | 546 | { |
| 547 | #if defined(CONFIG_PHY_GIGE) |
| 548 | u16 exsr; |
| 549 | |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 550 | if (miiphy_read(devname, addr, MII_ESTATUS, &exsr)) { |
| 551 | printf("PHY extended status read failed, assuming no " |
Larry Johnson | 71bc6e6 | 2007-11-01 08:46:50 -0500 | [diff] [blame] | 552 | "1000BASE-X\n"); |
| 553 | return 0; |
| 554 | } |
Mike Frysinger | 8ef583a | 2010-12-23 15:40:12 -0500 | [diff] [blame] | 555 | return 0 != (exsr & (ESTATUS_1000XF | ESTATUS_1000XH)); |
Larry Johnson | 71bc6e6 | 2007-11-01 08:46:50 -0500 | [diff] [blame] | 556 | #else |
| 557 | return 0; |
| 558 | #endif |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 559 | } |
| 560 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 561 | #ifdef CONFIG_SYS_FAULT_ECHO_LINK_DOWN |
wdenk | fc3e216 | 2003-10-08 22:33:00 +0000 | [diff] [blame] | 562 | /***************************************************************************** |
| 563 | * |
| 564 | * Determine link status |
| 565 | */ |
Mike Frysinger | 5700bb6 | 2010-07-27 18:35:08 -0400 | [diff] [blame] | 566 | int miiphy_link(const char *devname, unsigned char addr) |
wdenk | fc3e216 | 2003-10-08 22:33:00 +0000 | [diff] [blame] | 567 | { |
| 568 | unsigned short reg; |
| 569 | |
wdenk | a3d991b | 2004-04-15 21:48:45 +0000 | [diff] [blame] | 570 | /* dummy read; needed to latch some phys */ |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 571 | (void)miiphy_read(devname, addr, MII_BMSR, ®); |
| 572 | if (miiphy_read(devname, addr, MII_BMSR, ®)) { |
| 573 | puts("MII_BMSR read failed, assuming no link\n"); |
| 574 | return 0; |
wdenk | fc3e216 | 2003-10-08 22:33:00 +0000 | [diff] [blame] | 575 | } |
| 576 | |
| 577 | /* Determine if a link is active */ |
Mike Frysinger | 8ef583a | 2010-12-23 15:40:12 -0500 | [diff] [blame] | 578 | if ((reg & BMSR_LSTATUS) != 0) { |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 579 | return 1; |
wdenk | fc3e216 | 2003-10-08 22:33:00 +0000 | [diff] [blame] | 580 | } else { |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 581 | return 0; |
wdenk | fc3e216 | 2003-10-08 22:33:00 +0000 | [diff] [blame] | 582 | } |
| 583 | } |
| 584 | #endif |