blob: 8a59496051a795b54819692b1c24005822eb5c73 [file] [log] [blame]
wdenkbf9e3b32004-02-12 00:47:09 +00001/*
2 * Copyright (C) 2003 Josef Baumgartner <josef.baumgartner@telex.de>
3 * Based on code from Bernhard Kuhn <bkuhn@metrowerks.com>
4 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
wdenkbf9e3b32004-02-12 00:47:09 +00006 */
7
Wolfgang Denk25ddd1f2010-10-26 14:34:52 +02008#include <asm-offsets.h>
wdenkbf9e3b32004-02-12 00:47:09 +00009#include <config.h>
10#include "version.h"
TsiChung Liewdd9f0542010-03-11 22:12:53 -060011#include <asm/cache.h>
wdenkbf9e3b32004-02-12 00:47:09 +000012
13#ifndef CONFIG_IDENT_STRING
14#define CONFIG_IDENT_STRING ""
15#endif
16
wdenkbf9e3b32004-02-12 00:47:09 +000017#define _START _start
18#define _FAULT _fault
19
20
21#define SAVE_ALL \
22 move.w #0x2700,%sr; /* disable intrs */ \
23 subl #60,%sp; /* space for 15 regs */ \
24 moveml %d0-%d7/%a0-%a6,%sp@; \
25
26#define RESTORE_ALL \
27 moveml %sp@,%d0-%d7/%a0-%a6; \
28 addl #60,%sp; /* space for 15 regs */ \
29 rte
30
31/* If we come from a pre-loader we don't need an initial exception
32 * table.
33 */
34#if !defined(CONFIG_MONITOR_IS_IN_RAM)
35
36.text
37/*
38 * Vector table. This is used for initial platform startup.
39 * These vectors are to catch any un-intended traps.
40 */
41_vectors:
42
Wolfgang Denk4176c792006-06-10 19:27:47 +020043.long 0x00000000 /* Flash offset is 0 until we setup CS0 */
Wolfgang Denk14d0a022010-10-07 21:51:12 +020044#if defined(CONFIG_M5282) && (CONFIG_SYS_TEXT_BASE == CONFIG_SYS_INT_FLASH_BASE)
45.long _start - CONFIG_SYS_TEXT_BASE
Zachary P. Landaueacbd312006-01-26 17:35:56 -050046#else
Wolfgang Denk4176c792006-06-10 19:27:47 +020047.long _START
Zachary P. Landaueacbd312006-01-26 17:35:56 -050048#endif
Wolfgang Denk4176c792006-06-10 19:27:47 +020049
wdenkbf9e3b32004-02-12 00:47:09 +000050.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
51.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
52.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
53.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
54.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
55.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
56.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
57.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
58
59.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
60.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
61.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
62.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
63.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
64.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
65.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
66.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
67
68.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
69.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
70.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
71.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
72.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
73.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
74.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
75.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
76
77.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
78.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
79.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
80.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
81.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
82.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
83.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
84.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
85
86#endif
87
88 .text
89
Heiko Schocher9acb6262006-04-20 08:42:42 +020090
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020091#if defined(CONFIG_SYS_INT_FLASH_BASE) && \
Heiko Schocher9acb6262006-04-20 08:42:42 +020092 (defined(CONFIG_M5282) || defined(CONFIG_M5281))
Wolfgang Denk14d0a022010-10-07 21:51:12 +020093 #if (CONFIG_SYS_TEXT_BASE == CONFIG_SYS_INT_FLASH_BASE)
Heiko Schocher9acb6262006-04-20 08:42:42 +020094 .long 0x55AA55AA,0xAA55AA55 /* CFM Backdoorkey */
95 .long 0xFFFFFFFF /* all sectors protected */
96 .long 0x00000000 /* supervisor/User restriction */
97 .long 0x00000000 /* programm/data space restriction */
98 .long 0x00000000 /* Flash security */
99 #endif
100#endif
wdenkbf9e3b32004-02-12 00:47:09 +0000101 .globl _start
102_start:
103 nop
104 nop
105 move.w #0x2700,%sr
106
TsiChung Liewbf9a5212009-06-12 11:29:00 +0000107#if defined(CONFIG_M5208)
108 /* Initialize RAMBAR: locate SRAM and validate it */
109 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0
110 movec %d0, %RAMBAR1
111#endif
112
TsiChungLiewa1436a82007-08-16 13:20:50 -0500113#if defined(CONFIG_M5272) || defined(CONFIG_M5249) || defined(CONFIG_M5253)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200114 move.l #(CONFIG_SYS_MBAR + 1), %d0 /* set MBAR address + valid flag */
wdenkbf9e3b32004-02-12 00:47:09 +0000115 move.c %d0, %MBAR
116
stroese8c725b92004-12-16 18:09:49 +0000117 /*** The 5249 has MBAR2 as well ***/
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200118#ifdef CONFIG_SYS_MBAR2
119 move.l #(CONFIG_SYS_MBAR2 + 1), %d0 /* Get MBAR2 address */
stroese8c725b92004-12-16 18:09:49 +0000120 movec %d0, #0xc0e /* Set MBAR2 */
121#endif
122
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200123 move.l #(CONFIG_SYS_INIT_RAM_ADDR + 1), %d0
wdenkbf9e3b32004-02-12 00:47:09 +0000124 movec %d0, %RAMBAR0
TsiChungLiewa1436a82007-08-16 13:20:50 -0500125#endif /* CONFIG_M5272 || CONFIG_M5249 || CONFIG_M5253 */
wdenkbf9e3b32004-02-12 00:47:09 +0000126
Wolfgang Denk4176c792006-06-10 19:27:47 +0200127#if defined(CONFIG_M5282) || defined(CONFIG_M5271)
wdenkbf9e3b32004-02-12 00:47:09 +0000128 /* Initialize IPSBAR */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200129 move.l #(CONFIG_SYS_MBAR + 1), %d0 /* set IPSBAR address + valid flag */
wdenkbf9e3b32004-02-12 00:47:09 +0000130 move.l %d0, 0x40000000
131
wdenkbf9e3b32004-02-12 00:47:09 +0000132 /* Initialize RAMBAR1: locate SRAM and validate it */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200133 move.l #(CONFIG_SYS_INIT_RAM_ADDR + 0x21), %d0
wdenkbf9e3b32004-02-12 00:47:09 +0000134 movec %d0, %RAMBAR1
Heiko Schocher9acb6262006-04-20 08:42:42 +0200135
Bartlomiej Siekadaa6e412006-12-20 00:27:32 +0100136#if defined(CONFIG_M5282)
Wolfgang Denk14d0a022010-10-07 21:51:12 +0200137#if (CONFIG_SYS_TEXT_BASE == CONFIG_SYS_INT_FLASH_BASE)
Heiko Schocher9acb6262006-04-20 08:42:42 +0200138 /* Setup code in SRAM to initialize FLASHBAR, if start from internal Flash */
139
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200140 move.l #(_flashbar_setup-CONFIG_SYS_INT_FLASH_BASE), %a0
141 move.l #(_flashbar_setup_end-CONFIG_SYS_INT_FLASH_BASE), %a1
142 move.l #(CONFIG_SYS_INIT_RAM_ADDR), %a2
Heiko Schocher9acb6262006-04-20 08:42:42 +0200143_copy_flash:
144 move.l (%a0)+, (%a2)+
145 cmp.l %a0, %a1
146 bgt.s _copy_flash
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200147 jmp CONFIG_SYS_INIT_RAM_ADDR
Heiko Schocher9acb6262006-04-20 08:42:42 +0200148
149_flashbar_setup:
150 /* Initialize FLASHBAR: locate internal Flash and validate it */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200151 move.l #(CONFIG_SYS_INT_FLASH_BASE + CONFIG_SYS_INT_FLASH_ENABLE), %d0
TsiChung Liew43d60642008-03-13 14:26:32 -0500152 movec %d0, %FLASHBAR
Heiko Schocher9acb6262006-04-20 08:42:42 +0200153 jmp _after_flashbar_copy.L /* Force jump to absolute address */
154_flashbar_setup_end:
155 nop
156_after_flashbar_copy:
157#else
158 /* Setup code to initialize FLASHBAR, if start from external Memory */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200159 move.l #(CONFIG_SYS_INT_FLASH_BASE + CONFIG_SYS_INT_FLASH_ENABLE), %d0
TsiChung Liew4cb4e652008-08-11 15:54:25 +0000160 movec %d0, %FLASHBAR
Wolfgang Denk14d0a022010-10-07 21:51:12 +0200161#endif /* (CONFIG_SYS_TEXT_BASE == CONFIG_SYS_INT_FLASH_BASE) */
Heiko Schocher9acb6262006-04-20 08:42:42 +0200162
163#endif
Wolfgang Denk6741ae92006-09-04 01:03:57 +0200164#endif
Heiko Schocher9acb6262006-04-20 08:42:42 +0200165 /* if we come from a pre-loader we have no exception table and
166 * therefore no VBR to set
167 */
168#if !defined(CONFIG_MONITOR_IS_IN_RAM)
Wolfgang Denk14d0a022010-10-07 21:51:12 +0200169#if defined(CONFIG_M5282) && (CONFIG_SYS_TEXT_BASE == CONFIG_SYS_INT_FLASH_BASE)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200170 move.l #CONFIG_SYS_INT_FLASH_BASE, %d0
TsiChungLiew2acefa72007-10-25 17:09:17 -0500171#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200172 move.l #CONFIG_SYS_FLASH_BASE, %d0
TsiChungLiew2acefa72007-10-25 17:09:17 -0500173#endif
Heiko Schocher9acb6262006-04-20 08:42:42 +0200174 movec %d0, %VBR
Marian Balakowicz6f5155a2006-05-09 11:51:51 +0200175#endif
176
Matthew Fettkef71d9d92008-02-04 15:38:20 -0600177#ifdef CONFIG_M5275
178 /* Initialize IPSBAR */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200179 move.l #(CONFIG_SYS_MBAR + 1), %d0 /* set IPSBAR address + valid flag */
Matthew Fettkef71d9d92008-02-04 15:38:20 -0600180 move.l %d0, 0x40000000
181/* movec %d0, %MBAR */
182
183 /* Initialize RAMBAR: locate SRAM and validate it */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200184 move.l #(CONFIG_SYS_INIT_RAM_ADDR + 0x21), %d0
Matthew Fettkef71d9d92008-02-04 15:38:20 -0600185 movec %d0, %RAMBAR1
186#endif
187
TsiChung Liewdd9f0542010-03-11 22:12:53 -0600188 /* initialize general use internal ram */
189 move.l #0, %d0
190 move.l #(ICACHE_STATUS), %a1 /* icache */
191 move.l #(DCACHE_STATUS), %a2 /* icache */
192 move.l %d0, (%a1)
193 move.l %d0, (%a2)
194
wdenkbf9e3b32004-02-12 00:47:09 +0000195 /* set stackpointer to end of internal ram to get some stackspace for the first c-code */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200196 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET), %sp
wdenkbf9e3b32004-02-12 00:47:09 +0000197 clr.l %sp@-
198
199 move.l #__got_start, %a5 /* put relocation table address to a5 */
200
201 bsr cpu_init_f /* run low-level CPU init code (from flash) */
202 bsr board_init_f /* run low-level board init code (from flash) */
203
Marian Balakowicz6f5155a2006-05-09 11:51:51 +0200204 /* board_init_f() does not return */
wdenkbf9e3b32004-02-12 00:47:09 +0000205
206/*------------------------------------------------------------------------------*/
207
208/*
209 * void relocate_code (addr_sp, gd, addr_moni)
210 *
211 * This "function" does not return, instead it continues in RAM
212 * after relocating the monitor code.
213 *
214 * r3 = dest
215 * r4 = src
216 * r5 = length in bytes
217 * r6 = cachelinesize
218 */
219 .globl relocate_code
220relocate_code:
221 link.w %a6,#0
222 move.l 8(%a6), %sp /* set new stack pointer */
223
224 move.l 12(%a6), %d0 /* Save copy of Global Data pointer */
225 move.l 16(%a6), %a0 /* Save copy of Destination Address */
226
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200227 move.l #CONFIG_SYS_MONITOR_BASE, %a1
wdenkbf9e3b32004-02-12 00:47:09 +0000228 move.l #__init_end, %a2
229 move.l %a0, %a3
wdenkbf9e3b32004-02-12 00:47:09 +0000230 /* copy the code to RAM */
2311:
232 move.l (%a1)+, (%a3)+
233 cmp.l %a1,%a2
234 bgt.s 1b
235
236/*
237 * We are done. Do not return, instead branch to second part of board
238 * initialization, now running from RAM.
239 */
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200240 move.l %a0, %a1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200241 add.l #(in_ram - CONFIG_SYS_MONITOR_BASE), %a1
wdenkbf9e3b32004-02-12 00:47:09 +0000242 jmp (%a1)
243
244in_ram:
245
246clear_bss:
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200247 /*
wdenkbf9e3b32004-02-12 00:47:09 +0000248 * Now clear BSS segment
249 */
250 move.l %a0, %a1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200251 add.l #(_sbss - CONFIG_SYS_MONITOR_BASE),%a1
wdenkbf9e3b32004-02-12 00:47:09 +0000252 move.l %a0, %d1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200253 add.l #(_ebss - CONFIG_SYS_MONITOR_BASE),%d1
wdenkbf9e3b32004-02-12 00:47:09 +00002546:
255 clr.l (%a1)+
256 cmp.l %a1,%d1
257 bgt.s 6b
258
259 /*
260 * fix got table in RAM
261 */
262 move.l %a0, %a1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200263 add.l #(__got_start - CONFIG_SYS_MONITOR_BASE),%a1
wdenkbf9e3b32004-02-12 00:47:09 +0000264 move.l %a1,%a5 /* * fix got pointer register a5 */
265
266 move.l %a0, %a2
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200267 add.l #(__got_end - CONFIG_SYS_MONITOR_BASE),%a2
wdenkbf9e3b32004-02-12 00:47:09 +0000268
2697:
270 move.l (%a1),%d1
271 sub.l #_start,%d1
272 add.l %a0,%d1
273 move.l %d1,(%a1)+
274 cmp.l %a2, %a1
275 bne 7b
276
277 /* calculate relative jump to board_init_r in ram */
278 move.l %a0, %a1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200279 add.l #(board_init_r - CONFIG_SYS_MONITOR_BASE), %a1
wdenkbf9e3b32004-02-12 00:47:09 +0000280
281 /* set parameters for board_init_r */
282 move.l %a0,-(%sp) /* dest_addr */
283 move.l %d0,-(%sp) /* gd */
Wolfgang Denk14d0a022010-10-07 21:51:12 +0200284#if defined(DEBUG) && (CONFIG_SYS_TEXT_BASE != CONFIG_SYS_INT_FLASH_BASE) && \
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200285 defined(CONFIG_SYS_HALT_BEFOR_RAM_JUMP)
TsiChungLiew83ec20b2007-08-15 19:21:21 -0500286 halt
287#endif
wdenkbf9e3b32004-02-12 00:47:09 +0000288 jsr (%a1)
289
290/*------------------------------------------------------------------------------*/
291/* exception code */
292 .globl _fault
293_fault:
Marek Vasut37d6cc32012-10-03 13:28:43 +0000294 bra _fault
wdenkbf9e3b32004-02-12 00:47:09 +0000295
296 .globl _exc_handler
297_exc_handler:
298 SAVE_ALL
299 movel %sp,%sp@-
300 bsr exc_handler
301 addql #4,%sp
302 RESTORE_ALL
303
304 .globl _int_handler
305_int_handler:
306 SAVE_ALL
307 movel %sp,%sp@-
308 bsr int_handler
309 addql #4,%sp
310 RESTORE_ALL
311
312/*------------------------------------------------------------------------------*/
wdenkbf9e3b32004-02-12 00:47:09 +0000313
314 .globl version_string
315version_string:
Andreas Bießmann09c2e902011-07-18 20:24:04 +0200316 .ascii U_BOOT_VERSION_STRING, "\0"
TsiChung Liew9b464322008-03-28 08:47:45 -0500317 .align 4