| Shengzhou Liu | ae6b03f | 2011-11-22 16:51:13 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2011 Freescale Semiconductor, Inc. |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or |
| 5 | * modify it under the terms of the GNU General Public License as |
| 6 | * published by the Free Software Foundation; either version 2 of |
| 7 | * the License, or (at your option) any later version. |
| 8 | * |
| 9 | * This program is distributed in the hope that it will be useful, |
| 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 12 | * GNU General Public License for more details. |
| 13 | * |
| 14 | * You should have received a copy of the GNU General Public License |
| 15 | * along with this program; if not, write to the Free Software |
| 16 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 17 | * MA 02111-1307 USA |
| 18 | */ |
| 19 | |
| 20 | #ifndef __P3060QDS_QIXIS_H__ |
| 21 | #define __P3060QDS_QIXIS_H__ |
| 22 | |
| 23 | /* Definitions of QIXIS Registers for P3060QDS */ |
| 24 | |
| 25 | /* BRDCFG4[4:7]] select EC1 and EC2 as a pair */ |
| 26 | #define BRDCFG4_EC_MODE_MASK 0x0F |
| 27 | #define BRDCFG4_EC2_MII_EC1_MII 0x00 |
| 28 | #define BRDCFG4_EC2_MII_EC1_USB 0x03 |
| 29 | #define BRDCFG4_EC2_USB_EC1_MII 0x0C |
| 30 | #define BRDCFG4_EC2_USB_EC1_USB 0x0F |
| 31 | #define BRDCFG4_EC2_USB_EC1_RGMII 0x0E |
| 32 | #define BRDCFG4_EC2_RGMII_EC1_USB 0x0B |
| 33 | #define BRDCFG4_EC2_RGMII_EC1_RGMII 0x0A |
| 34 | #define BRDCFG4_EMISEL_MASK 0xF0 |
| 35 | |
| 36 | #define BRDCFG5_ECLKS_MASK 0x80 |
| 37 | #define BRDCFG5_USB1ID_MASK 0x40 |
| 38 | #define BRDCFG5_USB2ID_MASK 0x20 |
| 39 | #define BRDCFG5_GC2MX_MASK 0x0C |
| 40 | #define BRDCFG5_T15MX_MASK 0x03 |
| 41 | #define BRDCFG5_ECLKS_IEEE1588_CM 0x80 |
| 42 | #define BRDCFG5_USB1ID_CTRL 0x40 |
| 43 | #define BRDCFG5_USB2ID_CTRL 0x20 |
| 44 | |
| 45 | #define BRDCFG6_SD1MX_A 0x01 |
| 46 | #define BRDCFG6_SD1MX_B 0x00 |
| 47 | #define BRDCFG6_SD2MX_A 0x02 |
| 48 | #define BRDCFG6_SD2MX_B 0x00 |
| 49 | #define BRDCFG6_SD3MX_A 0x04 |
| 50 | #define BRDCFG6_SD3MX_B 0x00 |
| 51 | #define BRDCFG6_SD4MX_A 0x08 |
| 52 | #define BRDCFG6_SD4MX_B 0x00 |
| 53 | |
| 54 | #define BRDCFG7_JTAGMX_MASK 0xC0 |
| 55 | #define BRDCFG7_IQ1MX_MASK 0x20 |
| 56 | #define BRDCFG7_G1MX_MASK 0x10 |
| 57 | #define BRDCFG7_D1MX_MASK 0x0C |
| 58 | #define BRDCFG7_I3MX_MASK 0x03 |
| 59 | #define BRDCFG7_JTAGMX_AURORA 0x00 |
| 60 | #define BRDCFG7_JTAGMX_FPGA 0x80 |
| 61 | #define BRDCFG7_JTAGMX_COP_JTAG 0xC0 |
| 62 | #define BRDCFG7_IQ1MX_IRQ_EVT 0x00 |
| 63 | #define BRDCFG7_IQ1MX_USB2 0x20 |
| 64 | #define BRDCFG7_G1MX_USB1 0x00 |
| 65 | #define BRDCFG7_G1MX_TSEC3 0x10 |
| 66 | #define BRDCFG7_D1MX_DMA 0x00 |
| 67 | #define BRDCFG7_D1MX_TSEC3USB 0x04 |
| 68 | #define BRDCFG7_D1MX_HDLC2 0x08 |
| 69 | #define BRDCFG7_I3MX_UART2_I2C34 0x00 |
| 70 | #define BRDCFG7_I3MX_GPIO_EVT 0x01 |
| 71 | #define BRDCFG7_I3MX_USB1 0x02 |
| 72 | #define BRDCFG7_I3MX_TSEC3 0x03 |
| 73 | |
| 74 | #endif |