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wdenk7ebf7442002-11-02 23:17:16 +00001/*
2 * (C) Copyright 2002 ELTEC Elektronik AG
3 * Frank Gottschling <fgottschling@eltec.de>
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <common.h>
25#include <command.h>
26#include <mpc106.h>
27#include <video_fb.h>
28
29/* ------------------------------------------------------------------------- */
30
31int checkboard (void)
32{
wdenk8bde7f72003-06-27 21:31:46 +000033 puts ("Board: ELTEC PowerPC\n");
34 return (0);
wdenk7ebf7442002-11-02 23:17:16 +000035}
36
37/* ------------------------------------------------------------------------- */
38
39int checkflash (void)
40{
wdenk8bde7f72003-06-27 21:31:46 +000041 /* TODO */
42 printf ("Test not implemented !\n");
43 return (0);
wdenk7ebf7442002-11-02 23:17:16 +000044}
45
46/* ------------------------------------------------------------------------- */
47
48static unsigned int mpc106_read_cfg_dword (unsigned int reg)
49{
wdenk8bde7f72003-06-27 21:31:46 +000050 unsigned int reg_addr = MPC106_REG | (reg & 0xFFFFFFFC);
wdenk7ebf7442002-11-02 23:17:16 +000051
wdenk8bde7f72003-06-27 21:31:46 +000052 out32r (MPC106_REG_ADDR, reg_addr);
wdenk7ebf7442002-11-02 23:17:16 +000053
wdenk8bde7f72003-06-27 21:31:46 +000054 return (in32r (MPC106_REG_DATA | (reg & 0x3)));
wdenk7ebf7442002-11-02 23:17:16 +000055}
56
57/* ------------------------------------------------------------------------- */
58
59long int dram_size (int board_type)
60{
wdenk8bde7f72003-06-27 21:31:46 +000061 /*
62 * No actual initialisation to do - done when setting up
63 * PICRs MCCRs ME/SARs etc in asm_init.S.
64 */
wdenk7ebf7442002-11-02 23:17:16 +000065
wdenk8bde7f72003-06-27 21:31:46 +000066 register unsigned long i, msar1, mear1, memSize;
wdenk7ebf7442002-11-02 23:17:16 +000067
68#if defined(CFG_MEMTEST)
wdenk8bde7f72003-06-27 21:31:46 +000069 register unsigned long reg;
wdenk7ebf7442002-11-02 23:17:16 +000070
wdenk8bde7f72003-06-27 21:31:46 +000071 printf ("Testing DRAM\n");
wdenk7ebf7442002-11-02 23:17:16 +000072
wdenk8bde7f72003-06-27 21:31:46 +000073 /* write each mem addr with it's address */
74 for (reg = CFG_MEMTEST_START; reg < CFG_MEMTEST_END; reg += 4)
75 *reg = reg;
wdenk7ebf7442002-11-02 23:17:16 +000076
wdenk8bde7f72003-06-27 21:31:46 +000077 for (reg = CFG_MEMTEST_START; reg < CFG_MEMTEST_END; reg += 4) {
78 if (*reg != reg)
79 return -1;
80 }
wdenk7ebf7442002-11-02 23:17:16 +000081#endif
82
wdenk8bde7f72003-06-27 21:31:46 +000083 /*
84 * Since MPC107 memory controller chip has already been set to
85 * control all memory, just read and interpret its memory boundery register.
86 */
87 memSize = 0;
88 msar1 = mpc106_read_cfg_dword (MPC106_MSAR1);
89 mear1 = mpc106_read_cfg_dword (MPC106_MEAR1);
90 i = mpc106_read_cfg_dword (MPC106_MBER) & 0xf;
wdenk7ebf7442002-11-02 23:17:16 +000091
wdenk8bde7f72003-06-27 21:31:46 +000092 do {
93 if (i & 0x01) /* is bank enabled ? */
94 memSize += (mear1 & 0xff) - (msar1 & 0xff) + 1;
95 msar1 >>= 8;
96 mear1 >>= 8;
97 i >>= 1;
98 } while (i);
wdenk7ebf7442002-11-02 23:17:16 +000099
wdenk8bde7f72003-06-27 21:31:46 +0000100 return (memSize * 0x100000);
wdenk7ebf7442002-11-02 23:17:16 +0000101}
wdenk8bde7f72003-06-27 21:31:46 +0000102
wdenk7ebf7442002-11-02 23:17:16 +0000103/* ------------------------------------------------------------------------- */
104
wdenk8bde7f72003-06-27 21:31:46 +0000105long int initdram (int board_type)
wdenk7ebf7442002-11-02 23:17:16 +0000106{
wdenk8bde7f72003-06-27 21:31:46 +0000107 return dram_size (board_type);
wdenk7ebf7442002-11-02 23:17:16 +0000108}
109
110/* ------------------------------------------------------------------------- */
111
112/*
113 * The BAB 911 can be reset by writing bit 0 of the Processor Initialization
114 * Register PI in the MPC 107 (at offset 0x41090 of the Embedded Utilities
115 * Memory Block).
116 */
wdenk8bde7f72003-06-27 21:31:46 +0000117int do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
wdenk7ebf7442002-11-02 23:17:16 +0000118{
wdenk8bde7f72003-06-27 21:31:46 +0000119 out8 (MPC107_EUMB_PI, 1);
120 return (0);
wdenk7ebf7442002-11-02 23:17:16 +0000121}
122
123/* ------------------------------------------------------------------------- */
124
125#if defined(CONFIG_WATCHDOG)
126
127/*
128 * Since the 7xx CPUs don't have an internal watchdog, this function is
129 * board specific.
130 */
wdenk8bde7f72003-06-27 21:31:46 +0000131void watchdog_reset (void)
wdenk7ebf7442002-11-02 23:17:16 +0000132{
133}
wdenk8bde7f72003-06-27 21:31:46 +0000134#endif /* CONFIG_WATCHDOG */
wdenk7ebf7442002-11-02 23:17:16 +0000135
136/* ------------------------------------------------------------------------- */
137
138void after_reloc (ulong dest_addr)
139{
wdenk8bde7f72003-06-27 21:31:46 +0000140 DECLARE_GLOBAL_DATA_PTR;
wdenk7ebf7442002-11-02 23:17:16 +0000141
wdenk8bde7f72003-06-27 21:31:46 +0000142 /*
143 * Jump to the main U-Boot board init code
144 */
wdenk27b207f2003-07-24 23:38:38 +0000145 board_init_r ((gd_t *)gd, dest_addr);
wdenk7ebf7442002-11-02 23:17:16 +0000146}
147
148/* ------------------------------------------------------------------------- */
149
150#ifdef CONFIG_CONSOLE_EXTRA_INFO
151extern GraphicDevice smi;
152
153void video_get_info_str (int line_number, char *info)
154{
wdenk8bde7f72003-06-27 21:31:46 +0000155 /* init video info strings for graphic console */
156 switch (line_number) {
157 case 1:
158 sprintf (info, " MPC7xx V%d.%d at %d / %d MHz",
159 (get_pvr () >> 8) & 0xFF, get_pvr () & 0xFF, 400, 100);
160 return;
161 case 2:
162 sprintf (info, " ELTEC ELPPC with %ld MB DRAM and %ld MB FLASH",
163 dram_size (0) / 0x100000, flash_init () / 0x100000);
164 return;
165 case 3:
166 sprintf (info, " %s", smi.modeIdent);
167 return;
168 }
wdenk7ebf7442002-11-02 23:17:16 +0000169
wdenk8bde7f72003-06-27 21:31:46 +0000170 /* no more info lines */
171 *info = 0;
172 return;
wdenk7ebf7442002-11-02 23:17:16 +0000173}
174#endif