Stefan Roese | 2bae75a | 2015-04-25 06:29:56 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2014 Stefan Roese <sr@denx.de> |
| 3 | * |
| 4 | * SPDX-License-Identifier: GPL-2.0+ |
| 5 | */ |
| 6 | |
| 7 | #ifndef _CONFIG_DB_88F6820_GP_H |
| 8 | #define _CONFIG_DB_88F6820_GP_H |
| 9 | |
| 10 | /* |
| 11 | * High Level Configuration Options (easy to change) |
| 12 | */ |
Stefan Roese | 2bae75a | 2015-04-25 06:29:56 +0200 | [diff] [blame] | 13 | |
Stefan Roese | 2bae75a | 2015-04-25 06:29:56 +0200 | [diff] [blame] | 14 | #define CONFIG_DISPLAY_BOARDINFO_LATE |
| 15 | |
Stefan Roese | 2923c2d | 2015-08-06 14:27:36 +0200 | [diff] [blame] | 16 | /* |
| 17 | * TEXT_BASE needs to be below 16MiB, since this area is scrubbed |
| 18 | * for DDR ECC byte filling in the SPL before loading the main |
| 19 | * U-Boot into it. |
| 20 | */ |
| 21 | #define CONFIG_SYS_TEXT_BASE 0x00800000 |
Stefan Roese | 2bae75a | 2015-04-25 06:29:56 +0200 | [diff] [blame] | 22 | #define CONFIG_SYS_TCLK 250000000 /* 250MHz */ |
| 23 | |
| 24 | /* |
| 25 | * Commands configuration |
| 26 | */ |
| 27 | #define CONFIG_SYS_NO_FLASH /* Declare no flash (NOR/SPI) */ |
Stefan Roese | 2bae75a | 2015-04-25 06:29:56 +0200 | [diff] [blame] | 28 | #define CONFIG_CMD_ENV |
Stefan Roese | ce2cb1d | 2015-08-11 12:50:58 +0200 | [diff] [blame] | 29 | #define CONFIG_CMD_PCI |
Simon Glass | c649e3c | 2016-05-01 11:36:02 -0600 | [diff] [blame] | 30 | #define CONFIG_SCSI |
Stefan Roese | 2bae75a | 2015-04-25 06:29:56 +0200 | [diff] [blame] | 31 | |
| 32 | /* I2C */ |
| 33 | #define CONFIG_SYS_I2C |
| 34 | #define CONFIG_SYS_I2C_MVTWSI |
| 35 | #define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE |
| 36 | #define CONFIG_SYS_I2C_SLAVE 0x0 |
| 37 | #define CONFIG_SYS_I2C_SPEED 100000 |
| 38 | |
| 39 | /* SPI NOR flash default params, used by sf commands */ |
| 40 | #define CONFIG_SF_DEFAULT_SPEED 1000000 |
| 41 | #define CONFIG_SF_DEFAULT_MODE SPI_MODE_3 |
Stefan Roese | 2bae75a | 2015-04-25 06:29:56 +0200 | [diff] [blame] | 42 | |
Stefan Roese | e80f1e8 | 2015-06-29 14:58:11 +0200 | [diff] [blame] | 43 | /* |
| 44 | * SDIO/MMC Card Configuration |
| 45 | */ |
| 46 | #define CONFIG_MMC |
| 47 | #define CONFIG_MMC_SDMA |
| 48 | #define CONFIG_GENERIC_MMC |
| 49 | #define CONFIG_SDHCI |
| 50 | #define CONFIG_MV_SDHCI |
| 51 | #define CONFIG_SYS_MMC_BASE MVEBU_SDIO_BASE |
| 52 | |
Stefan Roese | 7cbaff9 | 2015-06-29 14:58:14 +0200 | [diff] [blame] | 53 | /* |
| 54 | * SATA/SCSI/AHCI configuration |
| 55 | */ |
| 56 | #define CONFIG_LIBATA |
| 57 | #define CONFIG_SCSI_AHCI |
| 58 | #define CONFIG_SCSI_AHCI_PLAT |
| 59 | #define CONFIG_SYS_SCSI_MAX_SCSI_ID 2 |
| 60 | #define CONFIG_SYS_SCSI_MAX_LUN 1 |
| 61 | #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ |
| 62 | CONFIG_SYS_SCSI_MAX_LUN) |
| 63 | |
Stefan Roese | e80f1e8 | 2015-06-29 14:58:11 +0200 | [diff] [blame] | 64 | /* Partition support */ |
| 65 | #define CONFIG_DOS_PARTITION |
| 66 | #define CONFIG_EFI_PARTITION |
| 67 | |
| 68 | /* Additional FS support/configuration */ |
| 69 | #define CONFIG_SUPPORT_VFAT |
| 70 | |
Stefan Roese | 5956573 | 2015-06-29 14:58:16 +0200 | [diff] [blame] | 71 | /* USB/EHCI configuration */ |
Stefan Roese | 5956573 | 2015-06-29 14:58:16 +0200 | [diff] [blame] | 72 | #define CONFIG_EHCI_IS_TDI |
| 73 | |
Stefan Roese | 2bae75a | 2015-04-25 06:29:56 +0200 | [diff] [blame] | 74 | /* Environment in SPI NOR flash */ |
| 75 | #define CONFIG_ENV_IS_IN_SPI_FLASH |
| 76 | #define CONFIG_ENV_OFFSET (1 << 20) /* 1MiB in */ |
| 77 | #define CONFIG_ENV_SIZE (64 << 10) /* 64KiB */ |
| 78 | #define CONFIG_ENV_SECT_SIZE (256 << 10) /* 256KiB sectors */ |
| 79 | |
| 80 | #define CONFIG_PHY_MARVELL /* there is a marvell phy */ |
Stefan Roese | 2bae75a | 2015-04-25 06:29:56 +0200 | [diff] [blame] | 81 | #define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */ |
| 82 | |
Stefan Roese | ce2cb1d | 2015-08-11 12:50:58 +0200 | [diff] [blame] | 83 | /* PCIe support */ |
Stefan Roese | 6451223 | 2015-11-25 07:37:00 +0100 | [diff] [blame] | 84 | #ifndef CONFIG_SPL_BUILD |
Stefan Roese | ce2cb1d | 2015-08-11 12:50:58 +0200 | [diff] [blame] | 85 | #define CONFIG_PCI |
| 86 | #define CONFIG_PCI_MVEBU |
| 87 | #define CONFIG_PCI_PNP |
| 88 | #define CONFIG_PCI_SCAN_SHOW |
Stefan Roese | 6451223 | 2015-11-25 07:37:00 +0100 | [diff] [blame] | 89 | #endif |
Stefan Roese | ce2cb1d | 2015-08-11 12:50:58 +0200 | [diff] [blame] | 90 | |
Stefan Roese | 2bae75a | 2015-04-25 06:29:56 +0200 | [diff] [blame] | 91 | #define CONFIG_SYS_ALT_MEMTEST |
| 92 | |
Kevin Smith | 3fd38af | 2015-05-18 16:09:46 +0000 | [diff] [blame] | 93 | /* Keep device tree and initrd in lower memory so the kernel can access them */ |
| 94 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
| 95 | "fdt_high=0x10000000\0" \ |
| 96 | "initrd_high=0x10000000\0" |
| 97 | |
Stefan Roese | 9e30b31 | 2015-03-25 13:35:15 +0100 | [diff] [blame] | 98 | /* SPL */ |
Stefan Roese | 7853c50 | 2015-07-20 11:20:40 +0200 | [diff] [blame] | 99 | /* |
| 100 | * Select the boot device here |
| 101 | * |
| 102 | * Currently supported are: |
| 103 | * SPL_BOOT_SPI_NOR_FLASH - Booting via SPI NOR flash |
| 104 | * SPL_BOOT_SDIO_MMC_CARD - Booting via SDIO/MMC card (partition 1) |
| 105 | */ |
| 106 | #define SPL_BOOT_SPI_NOR_FLASH 1 |
| 107 | #define SPL_BOOT_SDIO_MMC_CARD 2 |
| 108 | #define CONFIG_SPL_BOOT_DEVICE SPL_BOOT_SPI_NOR_FLASH |
| 109 | |
Stefan Roese | 9e30b31 | 2015-03-25 13:35:15 +0100 | [diff] [blame] | 110 | /* Defines for SPL */ |
| 111 | #define CONFIG_SPL_FRAMEWORK |
| 112 | #define CONFIG_SPL_SIZE (140 << 10) |
| 113 | #define CONFIG_SPL_TEXT_BASE 0x40000030 |
| 114 | #define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - 0x0030) |
| 115 | |
| 116 | #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE) |
| 117 | #define CONFIG_SPL_BSS_MAX_SIZE (16 << 10) |
| 118 | |
Stefan Roese | 6451223 | 2015-11-25 07:37:00 +0100 | [diff] [blame] | 119 | #ifdef CONFIG_SPL_BUILD |
| 120 | #define CONFIG_SYS_MALLOC_SIMPLE |
| 121 | #endif |
Stefan Roese | 9e30b31 | 2015-03-25 13:35:15 +0100 | [diff] [blame] | 122 | |
| 123 | #define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10)) |
| 124 | #define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4) |
| 125 | |
Stefan Roese | 7853c50 | 2015-07-20 11:20:40 +0200 | [diff] [blame] | 126 | #if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SPI_NOR_FLASH |
Stefan Roese | 9e30b31 | 2015-03-25 13:35:15 +0100 | [diff] [blame] | 127 | /* SPL related SPI defines */ |
Stefan Roese | 9e30b31 | 2015-03-25 13:35:15 +0100 | [diff] [blame] | 128 | #define CONFIG_SPL_SPI_LOAD |
Stefan Roese | 09a54c0 | 2015-11-20 13:51:57 +0100 | [diff] [blame] | 129 | #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x24000 |
Stefan Roese | 7853c50 | 2015-07-20 11:20:40 +0200 | [diff] [blame] | 130 | #define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS |
| 131 | #endif |
| 132 | |
| 133 | #if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SDIO_MMC_CARD |
| 134 | /* SPL related MMC defines */ |
Stefan Roese | 7853c50 | 2015-07-20 11:20:40 +0200 | [diff] [blame] | 135 | #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION 1 |
| 136 | #define CONFIG_SYS_MMC_U_BOOT_OFFS (160 << 10) |
| 137 | #define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_MMC_U_BOOT_OFFS |
| 138 | #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR (CONFIG_SYS_U_BOOT_OFFS / 512) |
| 139 | #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS ((512 << 10) / 512) /* 512KiB */ |
| 140 | #ifdef CONFIG_SPL_BUILD |
| 141 | #define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER 0x00180000 /* in SDRAM */ |
| 142 | #endif |
| 143 | #endif |
Stefan Roese | 9e30b31 | 2015-03-25 13:35:15 +0100 | [diff] [blame] | 144 | |
Stefan Roese | 2bae75a | 2015-04-25 06:29:56 +0200 | [diff] [blame] | 145 | /* |
| 146 | * mv-common.h should be defined after CMD configs since it used them |
| 147 | * to enable certain macros |
| 148 | */ |
| 149 | #include "mv-common.h" |
| 150 | |
| 151 | #endif /* _CONFIG_DB_88F6820_GP_H */ |