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Stefan Roese2bae75a2015-04-25 06:29:56 +02001/*
2 * Copyright (C) 2014 Stefan Roese <sr@denx.de>
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7#ifndef _CONFIG_DB_88F6820_GP_H
8#define _CONFIG_DB_88F6820_GP_H
9
10/*
11 * High Level Configuration Options (easy to change)
12 */
13#define CONFIG_ARMADA_XP /* SOC Family Name */
Stefan Roese9e30b312015-03-25 13:35:15 +010014#define CONFIG_ARMADA_38X
Stefan Roese2bae75a2015-04-25 06:29:56 +020015#define CONFIG_DB_88F6820_GP /* Board target name for DDR training */
16
17#define CONFIG_SYS_L2_PL310
18
19#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */
20#define CONFIG_SYS_GENERIC_BOARD
21#define CONFIG_DISPLAY_BOARDINFO_LATE
22
23#define CONFIG_SYS_TEXT_BASE 0x04000000
24#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
25
26/*
27 * Commands configuration
28 */
29#define CONFIG_SYS_NO_FLASH /* Declare no flash (NOR/SPI) */
Stefan Roese2bae75a2015-04-25 06:29:56 +020030#define CONFIG_CMD_CACHE
31#define CONFIG_CMD_DHCP
32#define CONFIG_CMD_ENV
Stefan Roesee80f1e82015-06-29 14:58:11 +020033#define CONFIG_CMD_EXT2
34#define CONFIG_CMD_EXT4
35#define CONFIG_CMD_FAT
36#define CONFIG_CMD_FS_GENERIC
Stefan Roese2bae75a2015-04-25 06:29:56 +020037#define CONFIG_CMD_I2C
Stefan Roesee80f1e82015-06-29 14:58:11 +020038#define CONFIG_CMD_MMC
Stefan Roese2bae75a2015-04-25 06:29:56 +020039#define CONFIG_CMD_PING
Stefan Roese4d991cb2015-06-29 14:58:13 +020040#define CONFIG_CMD_SCSI
Stefan Roese2bae75a2015-04-25 06:29:56 +020041#define CONFIG_CMD_SF
42#define CONFIG_CMD_SPI
43#define CONFIG_CMD_TFTPPUT
44#define CONFIG_CMD_TIME
Stefan Roese59565732015-06-29 14:58:16 +020045#define CONFIG_CMD_USB
Stefan Roese2bae75a2015-04-25 06:29:56 +020046
47/* I2C */
48#define CONFIG_SYS_I2C
49#define CONFIG_SYS_I2C_MVTWSI
50#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
51#define CONFIG_SYS_I2C_SLAVE 0x0
52#define CONFIG_SYS_I2C_SPEED 100000
53
54/* SPI NOR flash default params, used by sf commands */
55#define CONFIG_SF_DEFAULT_SPEED 1000000
56#define CONFIG_SF_DEFAULT_MODE SPI_MODE_3
57#define CONFIG_SPI_FLASH_STMICRO
58
Stefan Roesee80f1e82015-06-29 14:58:11 +020059/*
60 * SDIO/MMC Card Configuration
61 */
62#define CONFIG_MMC
63#define CONFIG_MMC_SDMA
64#define CONFIG_GENERIC_MMC
65#define CONFIG_SDHCI
66#define CONFIG_MV_SDHCI
67#define CONFIG_SYS_MMC_BASE MVEBU_SDIO_BASE
68
Stefan Roese7cbaff92015-06-29 14:58:14 +020069/*
70 * SATA/SCSI/AHCI configuration
71 */
72#define CONFIG_LIBATA
73#define CONFIG_SCSI_AHCI
74#define CONFIG_SCSI_AHCI_PLAT
75#define CONFIG_SYS_SCSI_MAX_SCSI_ID 2
76#define CONFIG_SYS_SCSI_MAX_LUN 1
77#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
78 CONFIG_SYS_SCSI_MAX_LUN)
79
Stefan Roesee80f1e82015-06-29 14:58:11 +020080/* Partition support */
81#define CONFIG_DOS_PARTITION
82#define CONFIG_EFI_PARTITION
83
84/* Additional FS support/configuration */
85#define CONFIG_SUPPORT_VFAT
86
Stefan Roese59565732015-06-29 14:58:16 +020087/* USB/EHCI configuration */
88#define CONFIG_USB_EHCI
89#define CONFIG_USB_STORAGE
90#define CONFIG_USB_EHCI_MARVELL
91#define CONFIG_EHCI_IS_TDI
92
Stefan Roese2bae75a2015-04-25 06:29:56 +020093/* Environment in SPI NOR flash */
94#define CONFIG_ENV_IS_IN_SPI_FLASH
95#define CONFIG_ENV_OFFSET (1 << 20) /* 1MiB in */
96#define CONFIG_ENV_SIZE (64 << 10) /* 64KiB */
97#define CONFIG_ENV_SECT_SIZE (256 << 10) /* 256KiB sectors */
98
99#define CONFIG_PHY_MARVELL /* there is a marvell phy */
100#define CONFIG_PHY_ADDR { 1, 0 }
101#define CONFIG_SYS_NETA_INTERFACE_TYPE PHY_INTERFACE_MODE_RGMII
102#define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */
103
104#define CONFIG_SYS_CONSOLE_INFO_QUIET /* don't print console @ startup */
105#define CONFIG_SYS_ALT_MEMTEST
106
Kevin Smith3fd38af2015-05-18 16:09:46 +0000107/* Keep device tree and initrd in lower memory so the kernel can access them */
108#define CONFIG_EXTRA_ENV_SETTINGS \
109 "fdt_high=0x10000000\0" \
110 "initrd_high=0x10000000\0"
111
Stefan Roese9e30b312015-03-25 13:35:15 +0100112/* SPL */
113/* Defines for SPL */
114#define CONFIG_SPL_FRAMEWORK
115#define CONFIG_SPL_SIZE (140 << 10)
116#define CONFIG_SPL_TEXT_BASE 0x40000030
117#define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - 0x0030)
118
119#define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE)
120#define CONFIG_SPL_BSS_MAX_SIZE (16 << 10)
121
122#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \
123 CONFIG_SPL_BSS_MAX_SIZE)
124#define CONFIG_SYS_SPL_MALLOC_SIZE (16 << 10)
125
126#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10))
127#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
128
129#define CONFIG_SPL_LIBCOMMON_SUPPORT
130#define CONFIG_SPL_LIBGENERIC_SUPPORT
131#define CONFIG_SPL_SERIAL_SUPPORT
132#define CONFIG_SPL_I2C_SUPPORT
133
134/* SPL related SPI defines */
135#define CONFIG_SPL_SPI_SUPPORT
136#define CONFIG_SPL_SPI_FLASH_SUPPORT
137#define CONFIG_SPL_SPI_LOAD
138#define CONFIG_SPL_SPI_BUS 0
139#define CONFIG_SPL_SPI_CS 0
140#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
141
142/* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */
143#define CONFIG_SYS_MVEBU_DDR_A38X
144#define CONFIG_DDR3
145
Stefan Roese2bae75a2015-04-25 06:29:56 +0200146/*
147 * mv-common.h should be defined after CMD configs since it used them
148 * to enable certain macros
149 */
150#include "mv-common.h"
151
152#endif /* _CONFIG_DB_88F6820_GP_H */