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Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Soeren Moch05d492a2014-11-03 13:57:01 +01002/*
3 * Copyright (C) 2014 Soeren Moch <smoch@web.de>
4 *
5 * Configuration settings for the TBS2910 MatrixARM board.
Soeren Moch05d492a2014-11-03 13:57:01 +01006 */
7
8#ifndef __TBS2910_CONFIG_H
9#define __TBS2910_CONFIG_H
10
11#include "mx6_common.h"
Soeren Moch05d492a2014-11-03 13:57:01 +010012
13/* General configuration */
Soeren Moch05d492a2014-11-03 13:57:01 +010014
15#define CONFIG_MACH_TYPE 3980
16
Soeren Moch05d492a2014-11-03 13:57:01 +010017#define CONFIG_SYS_HZ 1000
18
Adrian Alonso1368f992015-09-02 13:54:13 -050019#define CONFIG_IMX_THERMAL
Soeren Mochfbd18aa2015-05-29 20:32:41 +020020
Soeren Moch05d492a2014-11-03 13:57:01 +010021/* Physical Memory Map */
Soeren Moch05d492a2014-11-03 13:57:01 +010022#define CONFIG_SYS_SDRAM_BASE MMDC0_ARB_BASE_ADDR
23
24#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
25#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
26#define CONFIG_SYS_INIT_SP_OFFSET \
27 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
28#define CONFIG_SYS_INIT_SP_ADDR \
29 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
30
31#define CONFIG_SYS_MALLOC_LEN (128 * 1024 * 1024)
32
33#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
34#define CONFIG_SYS_MEMTEST_END \
35 (CONFIG_SYS_MEMTEST_START + 500 * 1024 * 1024)
36
Soeren Moch29138c62016-09-21 13:16:21 +020037#define CONFIG_SYS_BOOTMAPSZ 0x10000000
Soeren Moch05d492a2014-11-03 13:57:01 +010038
39/* Serial console */
40#define CONFIG_MXC_UART
41#define CONFIG_MXC_UART_BASE UART1_BASE /* select UART1/UART2 */
Soeren Moch05d492a2014-11-03 13:57:01 +010042
Soeren Moch05d492a2014-11-03 13:57:01 +010043/* Framebuffer */
Soeren Moch05d492a2014-11-03 13:57:01 +010044#ifdef CONFIG_VIDEO
Soeren Moch05d492a2014-11-03 13:57:01 +010045#define CONFIG_VIDEO_BMP_RLE8
46#define CONFIG_IMX_HDMI
47#define CONFIG_IMX_VIDEO_SKIP
Soeren Moch05d492a2014-11-03 13:57:01 +010048#endif
49
50/* PCI */
Soeren Moch05d492a2014-11-03 13:57:01 +010051#ifdef CONFIG_CMD_PCI
Soeren Moch05d492a2014-11-03 13:57:01 +010052#define CONFIG_PCI_SCAN_SHOW
53#define CONFIG_PCIE_IMX
54#define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12)
55#endif
56
57/* SATA */
Soeren Moch05d492a2014-11-03 13:57:01 +010058#ifdef CONFIG_CMD_SATA
Soeren Moch05d492a2014-11-03 13:57:01 +010059#define CONFIG_SYS_SATA_MAX_DEVICE 1
60#define CONFIG_DWC_AHSATA_PORT_ID 0
61#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
62#define CONFIG_LBA48
Soeren Moch186d9532019-03-01 13:11:00 +010063#define CONFIG_SYS_64BIT_LBA
Soeren Moch05d492a2014-11-03 13:57:01 +010064#endif
65
66/* USB */
Soeren Moch05d492a2014-11-03 13:57:01 +010067#ifdef CONFIG_CMD_USB
Soeren Mochd8962762015-05-05 23:09:18 +020068#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
Soeren Moch05d492a2014-11-03 13:57:01 +010069#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
Soeren Moch6628aa52015-02-26 19:50:02 +010070#ifdef CONFIG_CMD_USB_MASS_STORAGE
Soeren Moch6628aa52015-02-26 19:50:02 +010071#define CONFIG_USBD_HS
Soeren Moch6628aa52015-02-26 19:50:02 +010072#endif /* CONFIG_CMD_USB_MASS_STORAGE */
Soeren Moch05d492a2014-11-03 13:57:01 +010073#endif /* CONFIG_CMD_USB */
74
Peter Robinson056845c2015-05-22 17:30:45 +010075/* Environment organization */
Soeren Mocha6684362016-02-04 14:41:16 +010076#define CONFIG_SYS_MMC_ENV_DEV 2 /* overwritten on SD boot */
77#define CONFIG_SYS_MMC_ENV_PART 1 /* overwritten on SD boot */
Soeren Moch05d492a2014-11-03 13:57:01 +010078#define CONFIG_ENV_SIZE (8 * 1024)
79#define CONFIG_ENV_OFFSET (384 * 1024)
80#define CONFIG_ENV_OVERWRITE
81
Soeren Mochb82c7c32019-01-05 09:31:17 +010082#define CONFIG_BOARD_SIZE_LIMIT 392192 /* (CONFIG_ENV_OFFSET - 1024) */
83
Soeren Moch05d492a2014-11-03 13:57:01 +010084#define CONFIG_EXTRA_ENV_SETTINGS \
85 "bootargs_mmc1=console=ttymxc0,115200 di0_primary console=tty1\0" \
86 "bootargs_mmc2=video=mxcfb0:dev=hdmi,1920x1080M@60 " \
87 "video=mxcfb1:off video=mxcfb2:off fbmem=28M\0" \
88 "bootargs_mmc3=root=/dev/mmcblk0p1 rootwait consoleblank=0 quiet\0" \
89 "bootargs_mmc=setenv bootargs ${bootargs_mmc1} ${bootargs_mmc2} " \
90 "${bootargs_mmc3}\0" \
91 "bootargs_upd=setenv bootargs console=ttymxc0,115200 " \
92 "rdinit=/sbin/init enable_wait_mode=off\0" \
93 "bootcmd_mmc=run bootargs_mmc; mmc dev 2; " \
Soeren Mochb9a16092015-10-01 22:48:04 +020094 "mmc read 0x10800000 0x800 0x4000; bootm 0x10800000\0" \
Soeren Moch05d492a2014-11-03 13:57:01 +010095 "bootcmd_up1=load mmc 1 0x10800000 uImage\0" \
96 "bootcmd_up2=load mmc 1 0x10d00000 uramdisk.img; " \
97 "run bootargs_upd; " \
98 "bootm 0x10800000 0x10d00000\0" \
99 "console=ttymxc0\0" \
100 "fan=gpio set 92\0" \
Soeren Moch8741a372016-07-27 16:07:16 +0200101 "set_con_serial=setenv stdout serial; " \
Soeren Moch4b387de2019-03-01 13:10:52 +0100102 "setenv stderr serial\0" \
Soeren Moch8741a372016-07-27 16:07:16 +0200103 "set_con_hdmi=setenv stdout serial,vga; " \
Soeren Moch4b387de2019-03-01 13:10:52 +0100104 "setenv stderr serial,vga\0" \
105 "stderr=serial,vga\0" \
106 "stdin=serial,usbkbd\0" \
107 "stdout=serial,vga\0"
Soeren Moch05d492a2014-11-03 13:57:01 +0100108
109#define CONFIG_BOOTCOMMAND \
110 "mmc rescan; " \
111 "if run bootcmd_up1; then " \
112 "run bootcmd_up2; " \
113 "else " \
114 "run bootcmd_mmc; " \
115 "fi"
116
117#endif /* __TBS2910_CONFIG_H * */