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Simon Glassdde3b702012-02-23 03:28:41 +00001/*
2 * Copyright (c) 2004-2008 Texas Instruments
3 *
4 * (C) Copyright 2002
5 * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
6 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02007 * SPDX-License-Identifier: GPL-2.0+
Simon Glassdde3b702012-02-23 03:28:41 +00008 */
9
Marc Zyngierbf433af2014-07-12 14:24:02 +010010#include <config.h>
11
Simon Glassdde3b702012-02-23 03:28:41 +000012OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
13OUTPUT_ARCH(arm)
14ENTRY(_start)
15SECTIONS
16{
Peng Fand47cb0b2015-10-23 10:13:03 +080017 /*
18 * Discard the relocation entries for secure text.
19 * The secure code is bundled with u-boot image, so there will
20 * be relocations entries for the secure code, since we use
21 * "-mword-relocations" to compile and "-pie" to link into the
22 * final image. We do not need the relocation entries for secure
23 * code, because secure code will not be relocated, it only needs
24 * to be copied from loading address to CONFIG_ARMV7_SECURE_BASE,
25 * which is the linking and running address for secure code.
26 * If keep the relocation entries in .rel.dyn section,
27 * "relocation offset + linking address" may locates into an
28 * address that is reserved by SoC, then will trigger data abort.
29 *
30 * The reason that move .rel._secure at the beginning, is to
31 * avoid hole in the final image.
32 */
33 /DISCARD/ : { *(.rel._secure*) }
Simon Glassdde3b702012-02-23 03:28:41 +000034 . = 0x00000000;
35
36 . = ALIGN(4);
37 .text :
38 {
Albert ARIBAUDd026dec2013-06-11 14:17:33 +020039 *(.__image_copy_start)
Albert ARIBAUD41623c92014-04-15 16:13:51 +020040 *(.vectors)
Stephen Warrenb68d6712012-10-22 06:19:32 +000041 CPUDIR/start.o (.text*)
42 *(.text*)
Simon Glassdde3b702012-02-23 03:28:41 +000043 }
44
Jan Kiszka104d6fb2015-04-21 07:18:24 +020045#ifdef CONFIG_ARMV7_NONSEC
Marc Zyngierbf433af2014-07-12 14:24:02 +010046
47#ifndef CONFIG_ARMV7_SECURE_BASE
48#define CONFIG_ARMV7_SECURE_BASE
49#endif
50
51 .__secure_start : {
52 . = ALIGN(0x1000);
53 *(.__secure_start)
54 }
55
56 .secure_text CONFIG_ARMV7_SECURE_BASE :
57 AT(ADDR(.__secure_start) + SIZEOF(.__secure_start))
58 {
59 *(._secure.text)
60 }
61
62 . = LOADADDR(.__secure_start) +
63 SIZEOF(.__secure_start) +
64 SIZEOF(.secure_text);
65
66 __secure_end_lma = .;
67 .__secure_end : AT(__secure_end_lma) {
68 *(.__secure_end)
69 LONG(0x1d1071c); /* Must output something to reset LMA */
70 }
71#endif
72
Simon Glassdde3b702012-02-23 03:28:41 +000073 . = ALIGN(4);
74 .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
75
76 . = ALIGN(4);
77 .data : {
Stephen Warrenb68d6712012-10-22 06:19:32 +000078 *(.data*)
Simon Glassdde3b702012-02-23 03:28:41 +000079 }
80
81 . = ALIGN(4);
82
83 . = .;
Simon Glassdde3b702012-02-23 03:28:41 +000084
85 . = ALIGN(4);
Marek Vasut55675142012-10-12 10:27:03 +000086 .u_boot_list : {
Albert ARIBAUDef123c52013-02-25 00:59:00 +000087 KEEP(*(SORT(.u_boot_list*)));
Marek Vasut55675142012-10-12 10:27:03 +000088 }
89
90 . = ALIGN(4);
Simon Glassdde3b702012-02-23 03:28:41 +000091
Albert ARIBAUDd026dec2013-06-11 14:17:33 +020092 .image_copy_end :
93 {
94 *(.__image_copy_end)
95 }
Simon Glassdde3b702012-02-23 03:28:41 +000096
Albert ARIBAUD47bd65e2013-06-11 14:17:34 +020097 .rel_dyn_start :
98 {
99 *(.__rel_dyn_start)
100 }
101
Simon Glassdde3b702012-02-23 03:28:41 +0000102 .rel.dyn : {
Simon Glassdde3b702012-02-23 03:28:41 +0000103 *(.rel*)
Albert ARIBAUD47bd65e2013-06-11 14:17:34 +0200104 }
105
106 .rel_dyn_end :
107 {
108 *(.__rel_dyn_end)
Simon Glassdde3b702012-02-23 03:28:41 +0000109 }
110
Albert ARIBAUDd0b5d9d2014-02-22 17:53:42 +0100111 .end :
112 {
113 *(.__end)
114 }
115
116 _image_binary_end = .;
Simon Glassdde3b702012-02-23 03:28:41 +0000117
118 /*
119 * Deprecated: this MMU section is used by pxa at present but
120 * should not be used by new boards/CPUs.
121 */
122 . = ALIGN(4096);
123 .mmutable : {
124 *(.mmutable)
125 }
126
Albert ARIBAUDf84a7b82013-04-11 05:43:21 +0000127/*
128 * Compiler-generated __bss_start and __bss_end, see arch/arm/lib/bss.c
129 * __bss_base and __bss_limit are for linker only (overlay ordering)
130 */
131
Albert ARIBAUD3ebd1cb2013-02-25 00:58:59 +0000132 .bss_start __rel_dyn_start (OVERLAY) : {
133 KEEP(*(.__bss_start));
Albert ARIBAUDf84a7b82013-04-11 05:43:21 +0000134 __bss_base = .;
Albert ARIBAUD3ebd1cb2013-02-25 00:58:59 +0000135 }
136
Albert ARIBAUDf84a7b82013-04-11 05:43:21 +0000137 .bss __bss_base (OVERLAY) : {
Stephen Warrenb68d6712012-10-22 06:19:32 +0000138 *(.bss*)
Simon Glassdde3b702012-02-23 03:28:41 +0000139 . = ALIGN(4);
Albert ARIBAUDf84a7b82013-04-11 05:43:21 +0000140 __bss_limit = .;
Albert ARIBAUD3ebd1cb2013-02-25 00:58:59 +0000141 }
Tom Rini0ce033d2013-03-18 12:31:00 -0400142
Albert ARIBAUDf84a7b82013-04-11 05:43:21 +0000143 .bss_end __bss_limit (OVERLAY) : {
144 KEEP(*(.__bss_end));
Simon Glassdde3b702012-02-23 03:28:41 +0000145 }
146
Albert ARIBAUDd0b5d9d2014-02-22 17:53:42 +0100147 .dynsym _image_binary_end : { *(.dynsym) }
Albert ARIBAUD47ed5dd2013-11-07 14:21:46 +0100148 .dynbss : { *(.dynbss) }
149 .dynstr : { *(.dynstr*) }
150 .dynamic : { *(.dynamic*) }
151 .plt : { *(.plt*) }
152 .interp : { *(.interp*) }
Andreas Färber2c67e0e2014-01-27 05:48:11 +0100153 .gnu.hash : { *(.gnu.hash) }
Albert ARIBAUD47ed5dd2013-11-07 14:21:46 +0100154 .gnu : { *(.gnu*) }
155 .ARM.exidx : { *(.ARM.exidx*) }
Albert ARIBAUDb02bfc42014-01-13 14:57:05 +0100156 .gnu.linkonce.armexidx : { *(.gnu.linkonce.armexidx.*) }
Simon Glassdde3b702012-02-23 03:28:41 +0000157}