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Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0 */
Simon Glass50dd3da2016-03-11 22:06:58 -07002/*
Simon Glass2f0c2f02019-09-25 08:56:38 -06003 * Common code for Intel CPUs
4 *
Simon Glass50dd3da2016-03-11 22:06:58 -07005 * Copyright (c) 2016 Google, Inc
Simon Glass50dd3da2016-03-11 22:06:58 -07006 */
7
8#ifndef __ASM_CPU_COMMON_H
9#define __ASM_CPU_COMMON_H
10
Simon Glass55a6b132019-09-25 08:56:37 -060011/* Standard Intel bus clock is fixed at 100MHz */
12enum {
13 INTEL_BCLK_MHZ = 100
14};
15
Simon Glassd3abc5d2019-09-25 08:11:35 -060016struct cpu_info;
Simon Glass401d1c42020-10-30 21:38:53 -060017struct udevice;
Simon Glassd3abc5d2019-09-25 08:11:35 -060018
Simon Glass50dd3da2016-03-11 22:06:58 -070019/**
20 * cpu_common_init() - Set up common CPU init
21 *
22 * This reports BIST failure, enables the LAPIC, updates microcode, enables
23 * the upper 128-bytes of CROM RAM, probes the northbridge, PCH, LPC and SATA.
24 *
Heinrich Schuchardt185f8122022-01-19 18:05:50 +010025 * Return: 0 if OK, -ve on error
Simon Glass50dd3da2016-03-11 22:06:58 -070026 */
27int cpu_common_init(void);
28
29/**
30 * cpu_set_flex_ratio_to_tdp_nominal() - Set up the maximum non-turbo rate
31 *
32 * If a change is needed, this function will do a soft reset so it takes
33 * effect.
34 *
35 * Some details are available here:
36 * http://forum.hwbot.org/showthread.php?t=76092
37 *
Heinrich Schuchardt185f8122022-01-19 18:05:50 +010038 * Return: 0 if OK, -ve on error
Simon Glass50dd3da2016-03-11 22:06:58 -070039 */
40int cpu_set_flex_ratio_to_tdp_nominal(void);
41
Simon Glassd3abc5d2019-09-25 08:11:35 -060042/**
43 * cpu_intel_get_info() - Obtain CPU info for Intel CPUs
44 *
45 * Most Intel CPUs use the same MSR to obtain the clock speed, and use the same
46 * features. This function fills in these values, given the value of the base
47 * clock in MHz (typically this should be set to 100).
48 *
49 * @info: cpu_info struct to fill in
50 * @bclk_mz: the base clock in MHz
51 *
Heinrich Schuchardt185f8122022-01-19 18:05:50 +010052 * Return: 0 always
Simon Glassd3abc5d2019-09-25 08:11:35 -060053 */
54int cpu_intel_get_info(struct cpu_info *info, int bclk_mz);
55
Simon Glass246ac082019-09-25 08:56:36 -060056/**
57 * cpu_configure_thermal_target() - Set the thermal target for a CPU
58 *
59 * This looks up the tcc-offset property and uses it to set the
60 * MSR_TEMPERATURE_TARGET value.
61 *
62 * @dev: CPU device
Heinrich Schuchardt185f8122022-01-19 18:05:50 +010063 * Return: 0 if OK, -ENOENT if no target is given in device tree
Simon Glass246ac082019-09-25 08:56:36 -060064 */
65int cpu_configure_thermal_target(struct udevice *dev);
66
Simon Glass2f0c2f02019-09-25 08:56:38 -060067/**
68 * cpu_set_perf_control() - Set the nominal CPU clock speed
69 *
70 * This sets the clock speed as a multiplier of BCLK
71 *
72 * @clk_ratio: Ratio to use
73 */
74void cpu_set_perf_control(uint clk_ratio);
75
76/**
77 * cpu_config_tdp_levels() - Check for configurable TDP option
78 *
Heinrich Schuchardt185f8122022-01-19 18:05:50 +010079 * Return: true if the CPU has configurable TDP (Thermal-design power)
Simon Glass2f0c2f02019-09-25 08:56:38 -060080 */
81bool cpu_config_tdp_levels(void);
82
Simon Glassa2752092019-09-25 08:56:40 -060083/** enum burst_mode_t - Burst-mode states */
84enum burst_mode_t {
85 BURST_MODE_UNKNOWN,
86 BURST_MODE_UNAVAILABLE,
87 BURST_MODE_DISABLED,
88 BURST_MODE_ENABLED
89};
90
91/*
92 * cpu_get_burst_mode_state() - Get the Burst/Turbo Mode State
93 *
94 * This reads MSR IA32_MISC_ENABLE 0x1A0
95 * Bit 38 - TURBO_MODE_DISABLE Bit to get state ENABLED / DISABLED.
96 * Also checks cpuid 0x6 to see whether burst mode is supported.
97 *
Heinrich Schuchardt185f8122022-01-19 18:05:50 +010098 * Return: current burst mode status
Simon Glassa2752092019-09-25 08:56:40 -060099 */
100enum burst_mode_t cpu_get_burst_mode_state(void);
101
102/**
103 * cpu_set_burst_mode() - Set CPU burst mode
104 *
105 * @burst_mode: true to enable burst mode, false to disable
106 */
107void cpu_set_burst_mode(bool burst_mode);
108
109/**
110 * cpu_set_eist() - Enable Enhanced Intel Speed Step Technology
111 *
112 * @eist_status: true to enable EIST, false to disable
113 */
114void cpu_set_eist(bool eist_status);
115
116/**
117 * cpu_set_p_state_to_turbo_ratio() - Set turbo ratio
118 *
119 * TURBO_RATIO_LIMIT MSR (0x1AD) Bits 31:0 indicates the
120 * factory configured values for of 1-core, 2-core, 3-core
121 * and 4-core turbo ratio limits for all processors.
122 *
123 * 7:0 - MAX_TURBO_1_CORE
124 * 15:8 - MAX_TURBO_2_CORES
125 * 23:16 - MAX_TURBO_3_CORES
126 * 31:24 - MAX_TURBO_4_CORES
127 *
128 * Set PERF_CTL MSR (0x199) P_Req with that value.
129 */
130void cpu_set_p_state_to_turbo_ratio(void);
131
Simon Glass6c0da2d2020-09-22 12:45:08 -0600132/**
133 * cpu_get_coord_type() - Get the type of coordination for P-State transition
134 *
135 * See ACPI spec v6.3 section 8.4.6.5 _PSD (P-State Dependency)
136 *
Heinrich Schuchardt185f8122022-01-19 18:05:50 +0100137 * Return: HW_ALL (always)
Simon Glass6c0da2d2020-09-22 12:45:08 -0600138 */
139int cpu_get_coord_type(void);
140
141/**
142 * cpu_get_min_ratio() - get minimum support frequency ratio for CPU
143 *
Heinrich Schuchardt185f8122022-01-19 18:05:50 +0100144 * Return: minimum ratio
Simon Glass6c0da2d2020-09-22 12:45:08 -0600145 */
146int cpu_get_min_ratio(void);
147
148/**
149 * cpu_get_max_ratio() - get nominal TDP ration or max non-turbo ratio
150 *
151 * If a nominal TDP ratio is available, it is returned. Otherwise this returns
152 * the maximum non-turbo frequency ratio for this processor
153 *
Heinrich Schuchardt185f8122022-01-19 18:05:50 +0100154 * Return: max ratio
Simon Glass6c0da2d2020-09-22 12:45:08 -0600155 */
156int cpu_get_max_ratio(void);
157
158/**
159 * cpu_get_bus_clock_khz() - Get the bus clock frequency in KHz
160 *
161 * This is the value the clock ratio is multiplied with
162 *
Heinrich Schuchardt185f8122022-01-19 18:05:50 +0100163 * Return: bus-block frequency in KHz
Simon Glass6c0da2d2020-09-22 12:45:08 -0600164 */
165int cpu_get_bus_clock_khz(void);
166
167/**
168 * cpu_get_power_max() - Get maximum CPU TDP
169 *
Heinrich Schuchardt185f8122022-01-19 18:05:50 +0100170 * Return: maximum CPU TDP (Thermal-design power) in mW
Simon Glass6c0da2d2020-09-22 12:45:08 -0600171 */
172int cpu_get_power_max(void);
173
174/**
175 * cpu_get_max_turbo_ratio() - Get maximum turbo ratio
176 *
Heinrich Schuchardt185f8122022-01-19 18:05:50 +0100177 * Return: maximum ratio
Simon Glass6c0da2d2020-09-22 12:45:08 -0600178 */
179int cpu_get_max_turbo_ratio(void);
180
Simon Glass9b3e6d42020-09-22 12:45:14 -0600181/**
182 * cpu_get_cores_per_package() - Get the number of CPU cores in each package
183 *
Heinrich Schuchardt185f8122022-01-19 18:05:50 +0100184 * Return: number of cores
Simon Glass9b3e6d42020-09-22 12:45:14 -0600185 */
186int cpu_get_cores_per_package(void);
187
Simon Glass6571d872020-11-04 09:57:15 -0700188/**
189 * cpu_mca_configure() - Set up machine-check exceptions ready for use
190 *
191 * These allow the SoC to report errors while running. See here for details:
192 *
193 * https://www.intel.com/content/dam/www/public/us/en/documents/white-papers/machine-check-exceptions-debug-paper.pdf
194 */
195void cpu_mca_configure(void);
196
Simon Glass50dd3da2016-03-11 22:06:58 -0700197#endif