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Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0 */
Simon Glass50dd3da2016-03-11 22:06:58 -07002/*
Simon Glass2f0c2f02019-09-25 08:56:38 -06003 * Common code for Intel CPUs
4 *
Simon Glass50dd3da2016-03-11 22:06:58 -07005 * Copyright (c) 2016 Google, Inc
Simon Glass50dd3da2016-03-11 22:06:58 -07006 */
7
8#ifndef __ASM_CPU_COMMON_H
9#define __ASM_CPU_COMMON_H
10
Simon Glass55a6b132019-09-25 08:56:37 -060011/* Standard Intel bus clock is fixed at 100MHz */
12enum {
13 INTEL_BCLK_MHZ = 100
14};
15
Simon Glassd3abc5d2019-09-25 08:11:35 -060016struct cpu_info;
17
Simon Glass50dd3da2016-03-11 22:06:58 -070018/**
19 * cpu_common_init() - Set up common CPU init
20 *
21 * This reports BIST failure, enables the LAPIC, updates microcode, enables
22 * the upper 128-bytes of CROM RAM, probes the northbridge, PCH, LPC and SATA.
23 *
24 * @return 0 if OK, -ve on error
25 */
26int cpu_common_init(void);
27
28/**
29 * cpu_set_flex_ratio_to_tdp_nominal() - Set up the maximum non-turbo rate
30 *
31 * If a change is needed, this function will do a soft reset so it takes
32 * effect.
33 *
34 * Some details are available here:
35 * http://forum.hwbot.org/showthread.php?t=76092
36 *
37 * @return 0 if OK, -ve on error
38 */
39int cpu_set_flex_ratio_to_tdp_nominal(void);
40
Simon Glassd3abc5d2019-09-25 08:11:35 -060041/**
42 * cpu_intel_get_info() - Obtain CPU info for Intel CPUs
43 *
44 * Most Intel CPUs use the same MSR to obtain the clock speed, and use the same
45 * features. This function fills in these values, given the value of the base
46 * clock in MHz (typically this should be set to 100).
47 *
48 * @info: cpu_info struct to fill in
49 * @bclk_mz: the base clock in MHz
50 *
51 * @return 0 always
52 */
53int cpu_intel_get_info(struct cpu_info *info, int bclk_mz);
54
Simon Glass246ac082019-09-25 08:56:36 -060055/**
56 * cpu_configure_thermal_target() - Set the thermal target for a CPU
57 *
58 * This looks up the tcc-offset property and uses it to set the
59 * MSR_TEMPERATURE_TARGET value.
60 *
61 * @dev: CPU device
62 * @return 0 if OK, -ENOENT if no target is given in device tree
63 */
64int cpu_configure_thermal_target(struct udevice *dev);
65
Simon Glass2f0c2f02019-09-25 08:56:38 -060066/**
67 * cpu_set_perf_control() - Set the nominal CPU clock speed
68 *
69 * This sets the clock speed as a multiplier of BCLK
70 *
71 * @clk_ratio: Ratio to use
72 */
73void cpu_set_perf_control(uint clk_ratio);
74
75/**
76 * cpu_config_tdp_levels() - Check for configurable TDP option
77 *
78 * @return true if the CPU has configurable TDP (Thermal-design power)
79 */
80bool cpu_config_tdp_levels(void);
81
Simon Glassa2752092019-09-25 08:56:40 -060082/** enum burst_mode_t - Burst-mode states */
83enum burst_mode_t {
84 BURST_MODE_UNKNOWN,
85 BURST_MODE_UNAVAILABLE,
86 BURST_MODE_DISABLED,
87 BURST_MODE_ENABLED
88};
89
90/*
91 * cpu_get_burst_mode_state() - Get the Burst/Turbo Mode State
92 *
93 * This reads MSR IA32_MISC_ENABLE 0x1A0
94 * Bit 38 - TURBO_MODE_DISABLE Bit to get state ENABLED / DISABLED.
95 * Also checks cpuid 0x6 to see whether burst mode is supported.
96 *
97 * @return current burst mode status
98 */
99enum burst_mode_t cpu_get_burst_mode_state(void);
100
101/**
102 * cpu_set_burst_mode() - Set CPU burst mode
103 *
104 * @burst_mode: true to enable burst mode, false to disable
105 */
106void cpu_set_burst_mode(bool burst_mode);
107
108/**
109 * cpu_set_eist() - Enable Enhanced Intel Speed Step Technology
110 *
111 * @eist_status: true to enable EIST, false to disable
112 */
113void cpu_set_eist(bool eist_status);
114
115/**
116 * cpu_set_p_state_to_turbo_ratio() - Set turbo ratio
117 *
118 * TURBO_RATIO_LIMIT MSR (0x1AD) Bits 31:0 indicates the
119 * factory configured values for of 1-core, 2-core, 3-core
120 * and 4-core turbo ratio limits for all processors.
121 *
122 * 7:0 - MAX_TURBO_1_CORE
123 * 15:8 - MAX_TURBO_2_CORES
124 * 23:16 - MAX_TURBO_3_CORES
125 * 31:24 - MAX_TURBO_4_CORES
126 *
127 * Set PERF_CTL MSR (0x199) P_Req with that value.
128 */
129void cpu_set_p_state_to_turbo_ratio(void);
130
Simon Glass6c0da2d2020-09-22 12:45:08 -0600131/**
132 * cpu_get_coord_type() - Get the type of coordination for P-State transition
133 *
134 * See ACPI spec v6.3 section 8.4.6.5 _PSD (P-State Dependency)
135 *
136 * @return HW_ALL (always)
137 */
138int cpu_get_coord_type(void);
139
140/**
141 * cpu_get_min_ratio() - get minimum support frequency ratio for CPU
142 *
143 * @return minimum ratio
144 */
145int cpu_get_min_ratio(void);
146
147/**
148 * cpu_get_max_ratio() - get nominal TDP ration or max non-turbo ratio
149 *
150 * If a nominal TDP ratio is available, it is returned. Otherwise this returns
151 * the maximum non-turbo frequency ratio for this processor
152 *
153 * @return max ratio
154 */
155int cpu_get_max_ratio(void);
156
157/**
158 * cpu_get_bus_clock_khz() - Get the bus clock frequency in KHz
159 *
160 * This is the value the clock ratio is multiplied with
161 *
162 * @return bus-block frequency in KHz
163 */
164int cpu_get_bus_clock_khz(void);
165
166/**
167 * cpu_get_power_max() - Get maximum CPU TDP
168 *
169 * @return maximum CPU TDP (Thermal-design power) in mW
170 */
171int cpu_get_power_max(void);
172
173/**
174 * cpu_get_max_turbo_ratio() - Get maximum turbo ratio
175 *
176 * @return maximum ratio
177 */
178int cpu_get_max_turbo_ratio(void);
179
Simon Glass50dd3da2016-03-11 22:06:58 -0700180#endif