Gitiles
Code Review Sign In
gerrit.cesnet.cz / github / trini / u-boot / 0468afff3097c09f7f462591cf0edb8b3519892f / . / doc / README.nios_DK
blob: b119d7668297b8572b5f87ba2e924226ecdb3852 [file] [log] [blame]
wdenkc935d3b2004-01-03 19:43:48 +0000[diff] [blame]1
2===============================================================================
3 H A R D W A R E O V E R V I E W
4===============================================================================
5===============|===============|===============|===============|===============
6 | DK20K200 | DK1C20 | DK1S10 | DK1S40
7---------------|---------------|---------------|---------------|---------------
8 | | | |
9 Schem. Nr. | Nios Dev.Brd. | P06-08713-00 | P06-08468-01 | P06-09178-00
10 Rev. | pilot. | 01 | 01 | 00
11 Date | 2001/02/06 | 2003/02/20 | 2003/02/14 | 2003/05/14
12[1] | | | |
13===============|===============|===============|===============|===============
14 | | | |
15 FPGA | "APEX" | "Cyclon" | "Stratix" | "Stratix"
16 | EP20K200E | EP1C20 | EP1S10 | EP1S40
17 | | |
18 | (484 FBGA) | (400 FBGA) | (780 FBGA)
19[2],[3],[4] | | |
20---------------|---------------|---------------|---------------|---------------
21 | |
22 Clock (OSC) | 33.333 MHz | 50 MHz
23 | | (with ext. supply)
24 |
25 | PI49FCT3805
26[5] |
27---------------|---------------|---------------|---------------|---------------
28 | |
29 Flash | 1 MByte | 8 MByte
30 | |
31 | AM29LV800BB | AM29LV065DU120REI
32 | 8/16 bit bus | 8 bit bus
33 | 1 chip | 1 chip
34[6],[7] | |
35---------------|---------------|---------------|---------------|---------------
36 | | |
37 serial | no such | 4 MBits | no such
38 Flash | | |
39 | | EPCS4SI8 |
40[8] | | |
41---------------|---------------|---------------|---------------|---------------
42 | |
43 Compact | no such, as | see below: prototype adapter
44 Flash (CF) | module only |
45 | |
46---------------|---------------|---------------|---------------|---------------
47 | |
48 SRAM | 256 KByte | 1 MByte
49 | |
50 | IDT71V016S | IDT71V416S10PH
51 | 32 bit bus | 32 bit bus
52 | 2 chips | 2 chips
53 | interlaced | interlaced
54[9],[10] | |
55---------------|---------------|---------------|---------------|---------------
56 | |
57 SDRAM | SODIMM only | 16 MByte
58 | |
59 | | MT48LC4M32B2TG-7
60 | 64 bit bus | 32 bit bus
61 | | 1 chip
62[11] | |
63===============|===============|===============|===============|===============
64 | |
65 serial I/O | 1 RS232 | 2 RS232
66 | |
67 | LTC1386 | MAX3237CAI
68 | |
69 | port 1: | port 1:
70 | RxD / TxD, | RxD / TxD,
71 | RTS / CTS | RTS / CTS, DTR / DSR, DCD, RI
72 | |
73 | ! ! ! ! ! ! | port 2: | port 2:
74 | RTS/CTS can | RxD / TxD | RxD / TxD
75 | be RxD/TxD | | RTS / CTS, DTR / DSR
76 | of 2nd port | | DCD, RI
77[12],[13] | ! ! ! ! ! ! | |
78---------------|---------------|---------------|---------------|---------------
79 | |
80 Ethernet | no such, as | 1 10BaseT / 100BaseT
81 | module only |
82 | | LAN91C111-NE
83 | | 32 bit bus
84 | | no external EEPROM
85 | | LEDA# for link
86 | | LEDB# for Rx / Tx
87[14] | |
88===============|===============|===============|===============|===============
89 | |
90 user | 8 | no such
91 switches | SW[7..0] |
92 | |
93---------------|---------------|---------------|---------------|---------------
94 |
95 user push | 4
96 buttons | PB[3..0]
97 |
98---------------|---------------|---------------|---------------|---------------
99 | |
100 user LEDs | 2 | 8
101 | LED[1..0] | LED[7..0]
102 | |
103---------------|---------------|---------------|---------------|---------------
104 |
105 user seven | 2
106 segment | HEX[1..0][G..A,DP]
107 |
108===============|===============|===============|===============|===============
109 | |
110 3.3V proto- | w/o level | no such -- only 5V
111 type adapter | shift buffer |
112 | |
113 | 40 I/O pins |
114 | 1 card sel. |
115 | 1 reset out. |
116 | 1 OSC clock |
117 | 1 CPU clock |
118 | 1 clock out. |
119 | |
120---------------|---------------|---------------|---------------|---------------
121 | |
122 5V prototype | with level | 2 ports -- both card ports supplied with its
123 adapter | shift buffer | own level shift buffer
124 | |
125 | 40 I/O pins | port 1 & 2:
126 | 1 card sel. | 41 I/O pins
127 | 1 Vee ? ? ? | 1 card select
128 | 1 reset out. | 1 reset output (from dev/board)
129 | 1 OSC clock | 1 OSC clock (from dev/board)
130 | 1 CPU clock | 1 CPU clock (from dev/board)
131 | 1 clock inp. | 1 clock input (to dev/board)
132 | |
133 | | (special) port 1:
134 | | 1 CF select
135 | | 1 CF present
136 | | 1 CF ATA select
137 | | 1 CF power
138 | |
139 | | NOTE: Both card ports are prepared for raw
140 | | IDE working. You can connect such
141 | | devices directly to the 40 pin header.
142 | | The signal PDIAG (passed diagnostic)
143 | | is not connected to any I/O signal.
144 | | Card port 1 is hard wired to the on
145 | | board Copact Flash adapter together
146 | | with all other signals needed by CF
147 | | cards. Hot plug should be working too.
148[15],[16] | |
149===============|===============|===============|===============|===============
150 | |
151 config. CPLD | EPM7064 | EPM7128
152 | |
153 (alternative | decition by | decision by
154 FPGA conf.) | jumper | push button
155 | |
156 | FPGA config. | FPGA config. | FPGA config.
157 | from Flash | from Flash | from Flash
158 | only | and EPCS4 | only
159 | | |
160===============|===============|===============|===============|===============
161===============================================================================
162
163
164===============================================================================
165 R E F E R E N C E S
166===============================================================================
167[1] http://www.altera.com/literature/lit-nio.jsp
168[2] http://www.altera.com/literature/lit-apx.jsp
169[3] http://www.altera.com/literature/lit-cyc.jsp
170[4] http://www.altera.com/literature/lit-stx.jsp
171[5] http://www.pericom.com/pdf/datasheets/PI49FCT3805.pdf
172 http://www.pericom.com/products/clock/psempart.php?productID=PI49FCT3805
173[6] http://www.amd.com/us-en/FlashMemory/ProductInformation/0,,37_1447_1623_1468^1532,00.html
174 http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/21490.pdf
175[7] http://www.amd.com/us-en/FlashMemory/ProductInformation/0,,37_1447_1623_1468^1596,00.html
176 http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/23544b.pdf
177[8] http://www.altera.com/literature/lit-config.html
178 http://preview.altera.com/literature/ds/micron.pdf
179[9] http://www.idt.com/products/pages/Asynchronous_SRAMs-71V016SA.html
180[10] http://www.idt.com/products/pages/Asynchronous_SRAMs-71V416SL.html
181[11] http://www.micron.com/products/dram/sdram/part.aspx?part=MT48LC4M32B2TG-7
182[12] http://www.linear.com/prod/datasheet.html?datasheet=33
183 http://www.linear.com/pdf/1386fa.pdf
184[13] http://www.maxim-ic.com/quick_view2.cfm/qv_pk/1068/ln/en
185 http://pdfserv.maxim-ic.com/en/ds/MAX3222-MAX3241.pdf
186[14] http://www.smsc.com/main/catalog/lan91c111.html
187[15] http://www.t13.org/index.html
188[16] http://www.compactflash.org/faqs/faq.htm
189
190
191===============================================================================
192Stephan Linz <linz@li-pro.net>