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Haavard Skinnemoen64ff2352007-10-29 13:02:54 +01001/*
2 * Copyright (C) 2007 Atmel Corporation
3 *
4 * Configuration settings for the ATSTK1003 CPU daughterboard
5 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02006 * SPDX-License-Identifier: GPL-2.0+
Haavard Skinnemoen64ff2352007-10-29 13:02:54 +01007 */
8#ifndef __CONFIG_H
9#define __CONFIG_H
10
Andreas Bießmann5d73bc72010-11-04 23:15:30 +000011#include <asm/arch/hardware.h>
Haavard Skinnemoena23e2772008-05-19 11:36:28 +020012
Andreas Bießmann4de58bc2011-04-18 04:12:38 +000013#define CONFIG_AT32AP
14#define CONFIG_AT32AP7002
15#define CONFIG_ATSTK1004
16#define CONFIG_ATSTK1000
Haavard Skinnemoen64ff2352007-10-29 13:02:54 +010017
Haavard Skinnemoen64ff2352007-10-29 13:02:54 +010018/*
Haavard Skinnemoen64ff2352007-10-29 13:02:54 +010019 * Set up the PLL to run at 140 MHz, the CPU to run at the PLL
20 * frequency, the HSB and PBB at 1/2, and the PBA to run at 1/4 the
21 * PLL frequency.
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020022 * (CONFIG_SYS_OSC0_HZ * CONFIG_SYS_PLL0_MUL) / CONFIG_SYS_PLL0_DIV = PLL MHz
Haavard Skinnemoen64ff2352007-10-29 13:02:54 +010023 */
Andreas Bießmann4de58bc2011-04-18 04:12:38 +000024#define CONFIG_PLL
25#define CONFIG_SYS_POWER_MANAGER
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020026#define CONFIG_SYS_OSC0_HZ 20000000
27#define CONFIG_SYS_PLL0_DIV 1
28#define CONFIG_SYS_PLL0_MUL 7
29#define CONFIG_SYS_PLL0_SUPPRESS_CYCLES 16
Haavard Skinnemoen64ff2352007-10-29 13:02:54 +010030/*
31 * Set the CPU running at:
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020032 * PLL / (2^CONFIG_SYS_CLKDIV_CPU) = CPU MHz
Haavard Skinnemoen64ff2352007-10-29 13:02:54 +010033 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020034#define CONFIG_SYS_CLKDIV_CPU 0
Haavard Skinnemoen64ff2352007-10-29 13:02:54 +010035/*
36 * Set the HSB running at:
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020037 * PLL / (2^CONFIG_SYS_CLKDIV_HSB) = HSB MHz
Haavard Skinnemoen64ff2352007-10-29 13:02:54 +010038 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020039#define CONFIG_SYS_CLKDIV_HSB 1
Haavard Skinnemoen64ff2352007-10-29 13:02:54 +010040/*
41 * Set the PBA running at:
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020042 * PLL / (2^CONFIG_SYS_CLKDIV_PBA) = PBA MHz
Haavard Skinnemoen64ff2352007-10-29 13:02:54 +010043 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020044#define CONFIG_SYS_CLKDIV_PBA 2
Haavard Skinnemoen64ff2352007-10-29 13:02:54 +010045/*
46 * Set the PBB running at:
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020047 * PLL / (2^CONFIG_SYS_CLKDIV_PBB) = PBB MHz
Haavard Skinnemoen64ff2352007-10-29 13:02:54 +010048 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020049#define CONFIG_SYS_CLKDIV_PBB 1
Haavard Skinnemoen64ff2352007-10-29 13:02:54 +010050
Haavard Skinnemoen1f36f732010-08-12 13:52:54 +070051/* Reserve VM regions for SDRAM and NOR flash */
52#define CONFIG_SYS_NR_VM_REGIONS 2
53
Haavard Skinnemoen64ff2352007-10-29 13:02:54 +010054/*
55 * The PLLOPT register controls the PLL like this:
56 * icp = PLLOPT<2>
57 * ivco = PLLOPT<1:0>
58 *
59 * We want icp=1 (default) and ivco=0 (80-160 MHz) or ivco=2 (150-240MHz).
60 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020061#define CONFIG_SYS_PLL0_OPT 0x04
Haavard Skinnemoen64ff2352007-10-29 13:02:54 +010062
Andreas Bießmannf4278b72010-11-04 23:15:31 +000063#define CONFIG_USART_BASE ATMEL_BASE_USART1
64#define CONFIG_USART_ID 1
Haavard Skinnemoen64ff2352007-10-29 13:02:54 +010065
66/* User serviceable stuff */
Andreas Bießmann4de58bc2011-04-18 04:12:38 +000067#define CONFIG_DOS_PARTITION
Haavard Skinnemoen64ff2352007-10-29 13:02:54 +010068
Andreas Bießmann4de58bc2011-04-18 04:12:38 +000069#define CONFIG_CMDLINE_TAG
70#define CONFIG_SETUP_MEMORY_TAGS
71#define CONFIG_INITRD_TAG
Haavard Skinnemoen64ff2352007-10-29 13:02:54 +010072
73#define CONFIG_STACKSIZE (2048)
74
75#define CONFIG_BAUDRATE 115200
76#define CONFIG_BOOTARGS \
77 "console=ttyS0 root=/dev/mmcblk0p1 rootwait"
78
79#define CONFIG_BOOTCOMMAND \
Sven Schnelle72fa4672011-10-21 14:49:25 +020080 "mmc rescan; ext2load mmc 0:1 0x10200000 /boot/uImage; bootm"
Haavard Skinnemoen64ff2352007-10-29 13:02:54 +010081
82/*
83 * Only interrupt autoboot if <space> is pressed. Otherwise, garbage
84 * data on the serial line may interrupt the boot sequence.
85 */
86#define CONFIG_BOOTDELAY 1
Andreas Bießmann4de58bc2011-04-18 04:12:38 +000087#define CONFIG_AUTOBOOT
88#define CONFIG_AUTOBOOT_KEYED
Wolfgang Denkc37207d2008-07-16 16:38:59 +020089#define CONFIG_AUTOBOOT_PROMPT \
90 "Press SPACE to abort autoboot in %d seconds\n", bootdelay
Haavard Skinnemoen64ff2352007-10-29 13:02:54 +010091#define CONFIG_AUTOBOOT_DELAY_STR "d"
92#define CONFIG_AUTOBOOT_STOP_STR " "
93
94/*
95 * Command line configuration.
96 */
97#include <config_cmd_default.h>
98
99#define CONFIG_CMD_ASKENV
100#define CONFIG_CMD_EXT2
101#define CONFIG_CMD_FAT
102#define CONFIG_CMD_JFFS2
103#define CONFIG_CMD_MMC
104
105#undef CONFIG_CMD_FPGA
Haavard Skinnemoen64ff2352007-10-29 13:02:54 +0100106#undef CONFIG_CMD_NFS
107#undef CONFIG_CMD_SETGETDCR
108#undef CONFIG_CMD_XIMG
109
Andreas Bießmann4de58bc2011-04-18 04:12:38 +0000110#define CONFIG_ATMEL_USART
111#define CONFIG_PORTMUX_PIO
112#define CONFIG_SYS_HSDRAMC
113#define CONFIG_MMC
Sven Schnelle72fa4672011-10-21 14:49:25 +0200114#define CONFIG_GENERIC_ATMEL_MCI
115#define CONFIG_GENERIC_MMC
Haavard Skinnemoen64ff2352007-10-29 13:02:54 +0100116
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200117#define CONFIG_SYS_DCACHE_LINESZ 32
118#define CONFIG_SYS_ICACHE_LINESZ 32
Haavard Skinnemoen64ff2352007-10-29 13:02:54 +0100119
120#define CONFIG_NR_DRAM_BANKS 1
121
Andreas Bießmann22178652011-06-28 04:15:58 +0000122#define CONFIG_SYS_FLASH_CFI
123#define CONFIG_FLASH_CFI_DRIVER
Haavard Skinnemoen64ff2352007-10-29 13:02:54 +0100124
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200125#define CONFIG_SYS_FLASH_BASE 0x00000000
126#define CONFIG_SYS_FLASH_SIZE 0x800000
127#define CONFIG_SYS_MAX_FLASH_BANKS 1
128#define CONFIG_SYS_MAX_FLASH_SECT 135
Haavard Skinnemoen64ff2352007-10-29 13:02:54 +0100129
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200130#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
Andreas Bießmann47293c12011-04-18 04:12:44 +0000131#define CONFIG_SYS_TEXT_BASE 0x00000000
Haavard Skinnemoen64ff2352007-10-29 13:02:54 +0100132
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200133#define CONFIG_SYS_INTRAM_BASE INTERNAL_SRAM_BASE
134#define CONFIG_SYS_INTRAM_SIZE INTERNAL_SRAM_SIZE
135#define CONFIG_SYS_SDRAM_BASE EBI_SDRAM_BASE
Haavard Skinnemoen64ff2352007-10-29 13:02:54 +0100136
Andreas Bießmann4de58bc2011-04-18 04:12:38 +0000137#define CONFIG_ENV_IS_IN_FLASH
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200138#define CONFIG_ENV_SIZE 65536
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200139#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE - CONFIG_ENV_SIZE)
Haavard Skinnemoen64ff2352007-10-29 13:02:54 +0100140
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200141#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INTRAM_BASE + CONFIG_SYS_INTRAM_SIZE)
Haavard Skinnemoen64ff2352007-10-29 13:02:54 +0100142
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200143#define CONFIG_SYS_MALLOC_LEN (256*1024)
Haavard Skinnemoen64ff2352007-10-29 13:02:54 +0100144
Haavard Skinnemoenb2e1d5b2007-11-22 17:04:13 +0100145/* Allow 2MB for the kernel run-time image */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200146#define CONFIG_SYS_LOAD_ADDR (EBI_SDRAM_BASE + 0x00200000)
147#define CONFIG_SYS_BOOTPARAMS_LEN (16 * 1024)
Haavard Skinnemoen64ff2352007-10-29 13:02:54 +0100148
149/* Other configuration settings that shouldn't have to change all that often */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200150#define CONFIG_SYS_PROMPT "U-Boot> "
151#define CONFIG_SYS_CBSIZE 256
152#define CONFIG_SYS_MAXARGS 16
153#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
Andreas Bießmann4de58bc2011-04-18 04:12:38 +0000154#define CONFIG_SYS_LONGHELP
Haavard Skinnemoen64ff2352007-10-29 13:02:54 +0100155
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200156#define CONFIG_SYS_MEMTEST_START EBI_SDRAM_BASE
157#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x700000)
158#define CONFIG_SYS_BAUDRATE_TABLE { 115200, 38400, 19200, 9600, 2400 }
Haavard Skinnemoen64ff2352007-10-29 13:02:54 +0100159
160#endif /* __CONFIG_H */