blob: fe3182be5561a11063272862dfa145d980b09c53 [file] [log] [blame]
Jan Kundrát04d102b2017-10-19 12:04:06 +02001diff --git a/board/solidrun/clearfog/clearfog.c b/board/solidrun/clearfog/clearfog.c
Jan Kundrátc2ade032018-08-21 08:06:13 +02002index 4e1386c8a2..be54ae0b78 100644
Jan Kundrát04d102b2017-10-19 12:04:06 +02003--- a/board/solidrun/clearfog/clearfog.c
4+++ b/board/solidrun/clearfog/clearfog.c
Jan Kundrátbe552612018-05-21 22:45:32 +02005@@ -10,10 +10,15 @@
Jan Kundrát04d102b2017-10-19 12:04:06 +02006 #include <asm/io.h>
7 #include <asm/arch/cpu.h>
8 #include <asm/arch/soc.h>
9+#include <dm/uclass.h>
10
Jan Kundrátbe552612018-05-21 22:45:32 +020011 #include "../drivers/ddr/marvell/a38x/ddr3_init.h"
Jan Kundrát04d102b2017-10-19 12:04:06 +020012 #include <../serdes/a38x/high_speed_env_spec.h>
13
14+#ifdef CONFIG_WDT_ORION
15+# include <wdt.h>
16+#endif
17+
18 DECLARE_GLOBAL_DATA_PTR;
19
20 #define ETH_PHY_CTRL_REG 0
Jan Kundrátc2ade032018-08-21 08:06:13 +020021@@ -108,11 +113,95 @@ int board_early_init_f(void)
Jan Kundrát04d102b2017-10-19 12:04:06 +020022 return 0;
23 }
24
25+#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_WDT_ORION)
26+static struct udevice *watchdog_dev = NULL;
27+#endif
28+
Jan Kundrátcdc2ece2018-08-20 14:52:17 +020029+#define TLC59XXX_REG_MODE1 0x00
30+#define TLC59XXX_REG_MODE2 0x01
31+#define TLC59XXX_REG_PWM(LED) (LED + 0x02)
32+#define TLC59XXX_REG_GRPPWM 0x12
33+#define TLC59XXX_REG_GRPFREQ 0x13
34+#define TLC59XXX_REG_LEDOUT0 0x14
35+#define TLC59XXX_REG_LEDOUT1 0x15
36+#define TLC59XXX_REG_LEDOUT2 0x16
37+#define TLC59XXX_REG_LEDOUT3 0x17
38+#define TLC59XXX_CHIP_RESET_ADDR 0x6b
39+#define TLC59XXX_RESET_BYTE_0 0xa5
40+#define TLC59XXX_RESET_BYTE_1 0x5a
41+#define CLA_LED_CHIP_ADDR 0x60
42+#define CLA_LED_STATUS_RED 8
43+#define CLA_LED_STATUS_GREEN 9
44+#define CLA_LED_STATUS_BLUE 10
45+
Jan Kundrátc2ade032018-08-21 08:06:13 +020046+struct cla_led_config {
47+ u8 reg;
48+ u8 val;
49+};
50+
51+static struct cla_led_config led_reset_config[] = {
52+ { TLC59XXX_RESET_BYTE_0, TLC59XXX_RESET_BYTE_1 },
53+};
54+
55+static struct cla_led_config led_config[] = {
56+ { TLC59XXX_REG_MODE1, 0x01 }, /* enable oscillator */
57+ { TLC59XXX_REG_MODE2, 0x20 }, /* DMBLINK */
58+ { TLC59XXX_REG_GRPPWM, 0x40 }, /* 25% duty cycle */
59+ { TLC59XXX_REG_GRPFREQ, 0x03 }, /* very fast blinking */
60+ { TLC59XXX_REG_PWM(CLA_LED_STATUS_RED), 0x80 }, /* 50% brightness */
61+ { TLC59XXX_REG_PWM(CLA_LED_STATUS_GREEN), 0x80 }, /* 50% brightness */
62+ { TLC59XXX_REG_PWM(CLA_LED_STATUS_BLUE), 0x80 }, /* 50% brightness */
63+ { TLC59XXX_REG_LEDOUT2, 0x3f }, /* LEDs #8, 9, 10: mode 0b11 -> group blinking */
Jan Kundrátcdc2ece2018-08-20 14:52:17 +020064+};
65+
66+int cla_setup_leds(void)
67+{
Jan Kundrátc2ade032018-08-21 08:06:13 +020068+ struct udevice *bus, *dev;
69+
70+ if (uclass_get_device_by_seq(UCLASS_I2C, 1, &bus)) {
71+ puts("Cannot find I2C bus for LEDs\n");
72+ return 1;
73+ }
74+
75+ if (i2c_get_chip(bus, TLC59XXX_CHIP_RESET_ADDR, 1, &dev)) {
76+ puts("Cannot request I2C chip for SWRST\n");
77+ return 1;
78+ }
79+ if (dm_i2c_write(dev, led_reset_config[0].reg, &led_reset_config[0].val, 1)) {
80+ puts("LED reset failed\n");
81+ return 1;
82+ }
83+
84+ if (i2c_get_chip(bus, CLA_LED_CHIP_ADDR, 1, &dev)) {
85+ puts("Cannot request I2C chip for LEDs\n");
Jan Kundrátcdc2ece2018-08-20 14:52:17 +020086+ return 1;
87+ }
88+ for (int i = 0; i < ARRAY_SIZE(led_config); i++) {
Jan Kundrátc2ade032018-08-21 08:06:13 +020089+ if (dm_i2c_write(dev, led_config[i].reg, &led_config[i].val, 1)) {
90+ printf("LED config operation #%d failed\n", i);
Jan Kundrátcdc2ece2018-08-20 14:52:17 +020091+ return 1;
92+ }
93+ }
94+ return 0;
95+}
96+
Jan Kundrát04d102b2017-10-19 12:04:06 +020097 int board_init(void)
98 {
Jan Kundrát04d102b2017-10-19 12:04:06 +020099 /* Address of boot parameters */
100 gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
101
102+#ifndef CONFIG_SPL_BUILD
103+# ifdef CONFIG_WDT_ORION
104+ if (uclass_get_device(UCLASS_WDT, 0, &watchdog_dev)) {
105+ puts("Cannot find Armada 385 watchdog!\n");
106+ } else {
107+ puts("Enabling Armada 385 watchdog.\n");
108+ /* one minute */
109+ wdt_start(watchdog_dev, (u32) 25000000 * 60, 0);
110+ }
111+# endif
112+#endif
113+
114 /* Toggle GPIO41 to reset onboard switch and phy */
115 clrbits_le32(MVEBU_GPIO1_BASE + 0x0, BIT(9));
116 clrbits_le32(MVEBU_GPIO1_BASE + 0x4, BIT(9));
Jan Kundrátc2ade032018-08-21 08:06:13 +0200117@@ -124,9 +213,33 @@ int board_init(void)
118 setbits_le32(MVEBU_GPIO0_BASE + 0x0, BIT(19));
119 mdelay(10);
Jan Kundrátcdc2ece2018-08-20 14:52:17 +0200120
121+ cla_setup_leds();
122+
Jan Kundrát04d102b2017-10-19 12:04:06 +0200123 return 0;
124 }
125
126+#ifdef CONFIG_WATCHDOG
127+/* Called by macro WATCHDOG_RESET */
128+void watchdog_reset(void)
129+{
130+# if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_WDT_ORION)
131+ static ulong next_reset = 0;
132+ ulong now;
133+
134+ if (!watchdog_dev)
135+ return;
136+
137+ now = timer_get_us();
138+
139+ /* Do not reset the watchdog too often */
140+ if (now > next_reset) {
141+ wdt_reset(watchdog_dev);
142+ next_reset = now + 1000;
143+ }
144+# endif
145+}
146+#endif
147+
148 int checkboard(void)
149 {
150 puts("Board: SolidRun ClearFog\n");
151diff --git a/configs/clearfog_defconfig b/configs/clearfog_defconfig
Jan Kundrátc2ade032018-08-21 08:06:13 +0200152index 53dbd9fb81..784f56c76e 100644
Jan Kundrát04d102b2017-10-19 12:04:06 +0200153--- a/configs/clearfog_defconfig
154+++ b/configs/clearfog_defconfig
Jan Kundrátc2ade032018-08-21 08:06:13 +0200155@@ -63,3 +63,5 @@ CONFIG_USB=y
Jan Kundrát04d102b2017-10-19 12:04:06 +0200156 CONFIG_DM_USB=y
Jan Kundrát6fa87502018-01-12 15:09:58 +0100157 CONFIG_USB_XHCI_HCD=y
Jan Kundrát04d102b2017-10-19 12:04:06 +0200158 CONFIG_USB_STORAGE=y
159+CONFIG_WDT=y
160+CONFIG_WDT_ORION=y
161diff --git a/include/configs/clearfog.h b/include/configs/clearfog.h
Jan Kundrátc2ade032018-08-21 08:06:13 +0200162index 7d56dfd86e..e92b07871d 100644
Jan Kundrát04d102b2017-10-19 12:04:06 +0200163--- a/include/configs/clearfog.h
164+++ b/include/configs/clearfog.h
Jan Kundrátc2ade032018-08-21 08:06:13 +0200165@@ -21,6 +21,14 @@
166 * Commands configuration
167 */
168
Jan Kundrát04d102b2017-10-19 12:04:06 +0200169+/* Watchdog */
170+#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_WDT_ORION)
171+# define CONFIG_WATCHDOG
172+#endif
Jan Kundrátc2ade032018-08-21 08:06:13 +0200173+
174+/* CzechLight: we have a 128kB EEPROM */
175+#define CONFIG_SYS_EEPROM_SIZE (128 * 1024)
176+
Jan Kundrát04d102b2017-10-19 12:04:06 +0200177 /* SPI NOR flash default params, used by sf commands */
Jan Kundrát6fa87502018-01-12 15:09:58 +0100178 #define CONFIG_SF_DEFAULT_BUS 1
Jan Kundrátc2ade032018-08-21 08:06:13 +0200179
180@@ -47,6 +55,9 @@
Jan Kundrát04d102b2017-10-19 12:04:06 +0200181 #define CONFIG_ENV_OFFSET 0xf0000
182 #define CONFIG_ENV_ADDR CONFIG_ENV_OFFSET
183
184+#define CONFIG_ENV_OFFSET_REDUND 0xe0000
185+#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
186+
Jan Kundrát04d102b2017-10-19 12:04:06 +0200187 #define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */
188
Jan Kundrátbe552612018-05-21 22:45:32 +0200189 /* PCIe support */
Jan Kundrátc2ade032018-08-21 08:06:13 +0200190@@ -139,14 +150,45 @@
Jan Kundrátbe552612018-05-21 22:45:32 +0200191 "scriptaddr=" SCRIPT_ADDR_R "\0" \
Jan Kundrát04d102b2017-10-19 12:04:06 +0200192 "pxefile_addr_r=" PXEFILE_ADDR_R "\0"
193
194-#include <config_distro_bootcmd.h>
195-
196 #define CONFIG_EXTRA_ENV_SETTINGS \
197 RELOCATION_LIMITS_ENV_SETTINGS \
198 LOAD_ADDRESS_ENV_SETTINGS \
199- "fdtfile=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \
200 "console=ttyS0,115200\0" \
201- BOOTENV
Jan Kundrátbe552612018-05-21 22:45:32 +0200202+ "usbboot=usb start; fatload usb 0:1 ${scriptaddr} boot.scr; source ${scriptaddr}\0" \
Jan Kundrát04d102b2017-10-19 12:04:06 +0200203+ "bootcmd=test -n \"${BOOT_A_LEFT}\" || setenv BOOT_A_LEFT 3;" \
204+ "test -n \"${BOOT_B_LEFT}\" || setenv BOOT_B_LEFT 3;" \
Jan Kundráta98768a2017-10-20 17:08:23 +0200205+ "test -n \"${BOOT_ORDER}\" || setenv BOOT_ORDER \"A B\";" \
Jan Kundrát04d102b2017-10-19 12:04:06 +0200206+ "setenv rauc_part;" \
Jan Kundráta98768a2017-10-20 17:08:23 +0200207+ "for BOOT_SLOT in \"${BOOT_ORDER}\"; do" \
Jan Kundrát04d102b2017-10-19 12:04:06 +0200208+ " if test \"x${rauc_part}\" != \"x\"; then" \
209+ " ;" \
210+ " elif test \"x${BOOT_SLOT}\" = \"xA\"; then" \
211+ " if test ${BOOT_A_LEFT} -gt 0; then" \
212+ " setexpr BOOT_A_LEFT ${BOOT_A_LEFT} - 1;" \
213+ " echo \"Found valid slot A, ${BOOT_A_LEFT} attempts remaining\";" \
214+ " setenv rauc_part 1;" \
215+ " setenv rauc_slot A;" \
216+ " fi;" \
217+ " elif test \"x${BOOT_SLOT}\" = \"xB\"; then" \
218+ " if test ${BOOT_B_LEFT} -gt 0; then" \
219+ " setexpr BOOT_B_LEFT ${BOOT_B_LEFT} - 1;" \
220+ " echo \"Found valid slot B, ${BOOT_B_LEFT} attempts remaining\";" \
Jan Kundrátb425ea82017-10-19 17:56:36 +0200221+ " setenv rauc_part 3;" \
Jan Kundrát04d102b2017-10-19 12:04:06 +0200222+ " setenv rauc_slot B;" \
223+ " fi;" \
224+ " fi;" \
225+ "done;" \
226+ "if test -n \"${rauc_part}\"; then" \
227+ " saveenv ;" \
228+ "else" \
229+ " echo \"No valid slot found, resetting tries to 3\";" \
230+ " setenv BOOT_A_LEFT 3;" \
231+ " setenv BOOT_B_LEFT 3;" \
232+ " saveenv;" \
233+ " reset;" \
234+ "fi;" \
Jan Kundrátbe552612018-05-21 22:45:32 +0200235+ "load mmc 0:${rauc_part} ${scriptaddr} /boot/boot.scr || reset;" \
236+ "source ${scriptaddr} || reset\0"
Jan Kundrát04d102b2017-10-19 12:04:06 +0200237
238 #endif /* CONFIG_SPL_BUILD */
239